DETAILED ACTION
1.This communication is in response to the application filed on 8/21/2024. The present application is being examined under the AIA first to invent provisions. A new non-final is made.
2. Status of the claims:
Claims 1-14 are pending.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention
is not identically disclosed as set forth in section 102 of this title, if the differences between the
claimed invention and the prior art are such that the claimed invention as a whole would
have been obvious before the effective filing date of the claimed invention to a person having
ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated
by the manner in which the invention was made.
4. Claims 1 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Li et al. (hereinafter “Li”) (US 2021/0303340 A1) in view of JPdocument (JP 3877526 B2)), an further in view of Sun et al. (hereinafter “Sun”) (CN 110019057 B)).
Regarding claim 1, Li discloses a computer implementation method using a device for managing a priority in a memory disaggregation network, the computer implementation method comprising:
classifying received read requests by priority (commands received have high priority and low priority, where a command is associated with a request, the requests by having low and high priority are classified by priority Li [0014]; the request is associated with command as it is disclosed in [0013]) and storing the read requests in a request queue of a memory module ( the commands (requests) are located in of the queue of memory die that stores data, Li [0014]; the request associated with command is disclosed in [0013]);
Li does not disclose classifying the received read requests by response path indicating an output port of the memory module and storing the read requests in a response queue of the memory queue.
JPdocument discloses classifying the received read requests by response path indicating an output port of the memory module and storing the read requests in a response queue of the memory queue , requests that have responses are allocated two channels and are stored in a DMA request queue of an intended buffer memory that is connected to the device the request is coming from using output port specified by the incoming request, JP document [0194]; [0202]).
It would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to incorporate JP document’s teachings with Li’s teachings. One skilled in the art would be motivated to combine them in order to efficiently identify a request that receives a response by associated the response to the request with an output port that identified the request that receives the response.
Li in view of JPdocument do not disclose performing scheduling in consideration of states of the request queue and response queues .
Sun discloses performing scheduling in consideration of states of the request queue and response queues (when the request queue is in waiting state and processing state the response queue is locked when the request queue finishes processing the request, the response queue starts processing the request, Sun, page 14 first full starting with “based on the processing process, as show in FIG. 5”) .
It would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to incorporate Sun document’s teachings with Li’s teachings in view of JP document’s teachings. One skilled in the art would be motivated to combine them in order to efficiently process data in the request queue and in the response queue effectively by processing data in the response queue when the request queue finishes the processing step of the request.
Regarding claim 8, Li discloses a device for managing a priority in a memory disaggregation network, the device comprising: a memory configured to store instructions; and a processor configured to execute the instructions ( a memory storing programs that are executed by a processor, Li, [0025]) ; in addition, claim 8 is substantially similar to claim 1, thus the same rationale applies.
4a. Claims 2 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Li in view of JPdocument, in view of Sun, and further in view of Yi et al. (hereinafter “Yi”) (CN 109298936 A).
Regarding claim 2, Li, JPdocument, and Sun disclose the method of claim 1.
Li in view of JPdocument and in view of Sun do not disclose wherein the performing of the scheduling includes not performing the scheduling on the request when a size of the response queue is greater than a predetermined threshold.
Yi discloses wherein the performing of the scheduling includes not performing the scheduling on the request when a size of the response queue is greater than a predetermined threshold ( scheduling message is sent when a load reaches a first threshold,Yi page 9 paragraph 11 starting with step 807: load control module is determined to be corresponding….)
It would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to incorporate Yi document’s teachings with Li’s teachings in view of JP document’s teachings and Sun document’s teachings. One skilled in the art would be motivated to combine them in order to efficiently schedule a request of resource pools when the jobs waiting in a queue reach a first threshold.
Regarding claim 9, claim 9 is substantially similar to claim 2, thus the same rationale applies.
4b. Claims 3 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Li in view of JPdocument, in view of Sun, and further in view of Zhu et al. (hereinafter “Zhu”) (CN 101539872 B).
Regarding claim 3, Li, JPdocument, and Sun disclose the method of claim 1.
Li in view of JPdocument and in view of Sun do not disclose wherein the number (Pmax) of priorities considering the response queue is expressed as shown in the following equation [Equation]
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Bmem represents a memory bandwidth, and Bnet represents a network bandwidth.
Zhu discloses wherein the number (Pmax) of priorities considering the response queue is expressed as shown in the following equation [Equation]
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Bmem represents a memory bandwidth, and Bnet represents a network bandwidth ( priority calculation is a function of network bandwidth and memory capacity, where memory capacity is equated to memory bandwidth, Zhu, [0030]).
It would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to incorporate Zhu’s teachings with Li’s teachings in view of JP document’s teachings and in view of Sun document’s teachings. One skilled in the art would be motivated to combine them in order to efficiently perform a response queue by using a priority to respond that is a function of network bandwidth and memory capacity.
Regarding claim 10, claim 810is substantially similar to claim 3, thus the same rationale applies.
4c. Claims 4 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Li in view of JPdocument, in view of Sun, in view of Zhu , and further in view of Maruyama et al. (hereinafter “Maruyama”) (US 11,228,499 B1).
Regarding claim 4, Li, JPdocument, Sun, and Zhu disclose the method of claim 3.
Li in view of JPdocument in view of Sun and in view of Zhu do not disclose wherein the performing of the scheduling includes connecting the memory module to the CPU module on the basis of the number of priorities.
Maruyama discloses wherein the performing of the scheduling includes connecting the memory module to the CPU module on the basis of the number of priorities ( control of communication of devices with a CPU is related to the number of priorities associated with a VLAN, column 8 , lines 38-52 ).
It would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to incorporate Maruyama’s teachings with Li’s teachings in view of JP document’s teachings in view of Sun document’s teachings and in view of Zhu’s teachings. One skilled in the art would be motivated to combine them in order to efficiently perform a response queue by using efficiently a CPU based on the number of priorities associated with a VLAN .
Regarding claim 11, claim 11 is substantially similar to claim 4, thus the same rationale applies.
4d. Claims 5 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Li in view of JPdocument, in view of Sun, in view of Zhu , and further in view of Sailor et al. (hereinafter “Sailor”) (US 7,212,524 B1).
Regarding claim 5, Li, JPdocument, Sun, and Zhu disclose the method of claim 3.
Li in view of JPdocument in view of Sun and in view of Zhu do not disclose wherein the performing of the scheduling includes connecting the memory module to the CPU module when the number of output ports is smaller than Pmax.
Sailor discloses wherein the performing of the scheduling includes connecting the memory module to the CPU module when the number of output ports is smaller than Pmax . ( scheduling the number of outputs in preserving available bandwidth , by preserving available bandwidth the number of output should be less than a number, Sailor column 11, lines 40-42).
It would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to incorporate Sailor’s teachings with Li’s teachings in view of JP document’s teachings in view of Sun document’s teachings and in view of Zhu’s teachings. One skilled in the art would be motivated to combine them in order to efficiently perform a response queue by using efficiently a CPU based on a number of output requests that preserve the bandwidth available.
Regarding claim 12, claim 12 is substantially similar to claim 5, thus the same rationale applies.
4e. Claims 6 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Li in view of JPdocument, in view of Sun, and further in view of JUN et al. (hereinafter “JUN”) (US 2017/0024132 A1).
Regarding claim 6, Li, JPdocument, and Sun disclose the method of claim 1.
Li in view of JPdocument and in view of Sun do not disclose wherein the request queue and the response queue include a virtual output queue (VoQ).
JUN discloses wherein the request queue and the response queue include a virtual output queue (VoQ). ( in scheduling request, a virtual function output queue is associated with a request queue and a virtual queue associated to response to a request , JUN, [0111]).
It would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to incorporate JUN’s teachings with Li’s teachings in view of JP document’s teachings and in view of Sun document’s teachings. One skilled in the art would be motivated to combine them in order to efficiently perform a response queue by using a virtual output queue for scheduling requests in a virtual network effectively.
Regarding claim 13, claim 13 is substantially similar to claim 6, thus the same rationale applies.
4f. Claims 7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Li in view of JPdocument, in view of Sun, and further in view of Furutono et al. (hereinafter “Furutono”) (US 20080043989 A1).
Regarding claim 7, Li, JPdocument, and Sun disclose the method of claim 1.
Li in view of JPdocument and in view of Su do not disclose wherein the number (Pmax) of priorities without considering the response queue is expressed as shown in the following equation, [Equation]
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Sreq represents a size of the request message stored in the request queue, Sresp represents a size of the response message stored in the response queue, Bmem represents a memory bandwidth, Bnet represents a network bandwidth, Treq represents a transmission time taken to transfer the request message using the network bandwidth (Treq = Sreq/Bnet), and Tmem represents a transmission time taken to transfer the response message using the memory bandwidth (Tmem = Sresp/Bmem).
Furutono discloses wherein the number (Pmax) of priorities without considering the response queue is expressed as shown in the following equation, [Equation]
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Sreq represents a size of the request message stored in the request queue, Sresp represents a size of the response message stored in the response queue, Bmem represents a memory bandwidth, Bnet represents a network bandwidth, Treq represents a transmission time taken to transfer the request message using the network bandwidth (Treq = Sreq/Bnet), and Tmem represents a transmission time taken to transfer the response message using the memory bandwidth (Tmem = Sresp/Bmem). ( Furutono discloses a function that establish priority for request is a function priority [0027] of request transmission time [0028]; memory capacity and network card [0159]; wait time for transmission response [0185])
It would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to incorporate Furutono’s teachings with Li’s teachings in view of JP document’s teachings and in view of Sun document’s teachings. One skilled in the art would be motivated to combine them in order to efficiently perform a response queue by using efficiently a function that is based on request transmission time and wait time to respond, memory capacity and network resources
Regarding claim 14, claim 14 is substantially similar to claim 7, thus the same rationale applies.
Conclusion
5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARIEGEORGES A HENRY whose telephone number is (571)270-3226. The examiner can normally be reached on 11:00am -8:00pm East M-F.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Emmanuel Moise can be reached on 571 272-8365. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MARIEGEORGES A HENRY/Examiner, Art Unit 2455
/EMMANUEL L MOISE/Supervisory Patent Examiner, Art Unit 2455