Prosecution Insights
Last updated: April 19, 2026
Application No. 18/812,025

MULTI-PHASE SWITCHED-CAPACITOR OVERLAPPING GATE DRIVE

Non-Final OA §102
Filed
Aug 22, 2024
Examiner
CHEN, SIBIN
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
92%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
886 granted / 1023 resolved
+18.6% vs TC avg
Moderate +5% lift
Without
With
+5.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
16 currently pending
Career history
1039
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
42.2%
+2.2% vs TC avg
§102
40.9%
+0.9% vs TC avg
§112
14.2%
-25.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1023 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 8 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Liu (US 2024/0297580). Regarding claim 8, fig. 2A of Liu discloses a power converter, comprising: a switch circuit having an input voltage terminal [V1], an output voltage terminal [V2], and a plurality of control inputs, the switch circuit comprising a plurality of transistors and; a first capacitor [C1] having first and second terminals coupled to the switch circuit; a second capacitor [C2] having a first and second terminals coupled to the switch circuit; and a control signal generator [202] coupled to the plurality of control inputs, the control signal generator configured to sequence the plurality of transistors through first, second, third, fourth, fifth, and sixth control phases for which: in the first control phase [e.g. as shown in fig. 2D], the first capacitor at least partially charges and the second capacitor at least partially discharges; in the second control phase [fig. 2F], the first and second capacitors at least partially charge; in the third control phase [fig. 2K], the second capacitor at least partially charges; in the fourth control phase [fig. 2E], the first capacitor at least partially discharges and the second capacitor at least partially charges; in the fifth control phase [fig. 2F], the first and second capacitors at least partially charge; and in the sixth control phase [fig. 2J], the first capacitor at least partially charges. Allowable Subject Matter Claims 1-7 are allowed. Claims 9-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Pulawa-Podgurski describes a multi-phase hybrid power converter. Ge describes a switched bus based resonant switched capacitor converter. Lesso describes a DC-DC converter. Kesarwani describes a two-phase interleaved DC-DC converter. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SIBIN CHEN whose telephone number is (571)270-5768. The examiner can normally be reached 9:00am - 5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached at (571) 272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SIBIN CHEN/Primary Examiner, Art Unit 2896
Read full office action

Prosecution Timeline

Aug 22, 2024
Application Filed
Feb 16, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603645
DISCHARGE CONTROL CIRCUIT
2y 5m to grant Granted Apr 14, 2026
Patent 12592685
FLIP-FLOPS AND INTEGRATED CIRCUITS INCLUDING THE SAME
2y 5m to grant Granted Mar 31, 2026
Patent 12587181
CLOCK SIGNAL CIRCUITS
2y 5m to grant Granted Mar 24, 2026
Patent 12587175
REDUCED POWER CONSUMPTION COMPUTE-IN-MEMORY SYSTEM, METHOD OF OPERATING SAME
2y 5m to grant Granted Mar 24, 2026
Patent 12580555
PHASE INTERPOLATOR AND NON-OVERLAPPING CLOCK GENERATOR
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
92%
With Interview (+5.1%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 1023 resolved cases by this examiner. Grant probability derived from career allow rate.

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