Prosecution Insights
Last updated: April 19, 2026
Application No. 18/812,076

LIGHT DETECTING DEVICE AND SYSTEM

Non-Final OA §101§102§103§DP
Filed
Aug 22, 2024
Examiner
TABA, MONICA TERESA
Art Unit
2878
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
95%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
171 granted / 191 resolved
+21.5% vs TC avg
Moderate +5% lift
Without
With
+5.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
30 currently pending
Career history
221
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
54.8%
+14.8% vs TC avg
§102
27.1%
-12.9% vs TC avg
§112
13.0%
-27.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 191 resolved cases

Office Action

§101 §102 §103 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co., 151 U.S. 186 (1894); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert, 245 F.2d 467, 114 USPQ 330 (CCPA 1957). A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101. Claim 1 is rejected under 35 U.S.C. 101 as claiming the same invention as that of claim 1 of prior U.S. Patent No. 11,818,481. This is a statutory double patenting rejection. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1 and 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 10, and claim 12 and 18 of U.S. Patent No. 11,533,445; claim 13 of U.S. Patent No. 11,818,481; and claim 1 of U.S. Patent No 12,207,008. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims are claiming a first pixel circuitry including a first avalanche photodiode, the first pixel circuitry configured to output a first output signal; second pixel circuitry including a second avalanche photodiode, the second pixel circuitry configured to output a second output signal; and control circuitry configured to receive the second output signal, wherein an output of the control circuitry is coupled to a second terminal of the first avalanche photodiode and a second terminal of the second avalanche photodiode. Claims 2-19 are rejected based on their dependency on rejected claim 1. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim 1-2 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by U.S. Patent Publication No. 2019/0189827 ("Haraguchi"). Regarding claim 1, Haraguchi discloses a light detecting device, comprising: a first pixel circuitry (203, Fig. 3) including a first avalanche photodiode (302, Fig. 3) and a first inverter (304, Fig. 3), the first pixel circuitry configured to output a first output signal (PLS, Fig. 3); and a second pixel circuitry including a second avalanche photodiode and a second inverter (see Fig. 2, a plurality of pixels, each having the same circuitry illustrated in Fig. 3), the second pixel circuitry configured to output a second output signal (PLS, Fig. 3); and control circuitry (205, Fig. 3, paragraph [0063]) configured to receive the second output signal (PLS, Fig. 3), wherein an output (PDEF, Fig. 3) of the control circuitry (205, Fig. 3) is coupled to the anode of the first avalanche photodiode (anode of 302, Fig. 3) and the anode of the second avalanche photodiode (anode of 302, Fig. 3, paragraphs [0051], [0053]). Regarding claim 2, Haraguchi discloses the light detecting device according to claim 1, wherein the control circuitry (205, Fig. 3) is configured to control a potential of the anode of the first avalanche photodiode (PDEF level controls linear or avalanche mode, paragraphs [0056], for example, first avalanche photodiode can be any of the normal pixels, see paragraph [0054]) and a potential of the anode of the second avalanche photodiode (paragraph [0056]) based on the output of the second pixel circuitry (paragraph [0056], PDEF control signal is sent to both first and second avalanche photodiodes based PLS exceeding a threshold value, those pixels exceeding the threshold are interpreted to be the second pixel circuitry, see paragraph [0054]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3-5 and 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Haraguchi in view of U.S. Patent Publication No. 2020/0044109 ("Azuma"). Regarding claim 3, Haraguchi discloses the light detecting device according to claim 1, but does not disclose that the control circuitry includes an inter-pixel averaging section. However, Azuma discloses the control circuitry (20, Fig. 3) includes an inter-pixel averaging section (22, Fig. 3, paragraph [paragraph [0068]-[0069]). It would have been obvious to one of ordinary skill in the art before the effective filing date to include an inter-pixel averaging section as disclosed by Azuma in the device of Haraguchi in order to adjust the sensitivity of the light detecting device, as an example. Regarding claim 4, Haraguchi in view of Azuma discloses the light detecting device according to claim 3, and Azuma further discloses that the control circuitry further includes time averaging circuit (22, Fig. 3, paragraph [0068]). It would have been obvious to one of ordinary skill in the art before the effective filing date to include an time averaging circuit as disclosed by Azuma in the device of Haraguchi in order to adjust the sensitivity of the light detecting device, as an example. Regarding claim 5, Haraguchi in view of Azuma discloses the light detecting device according to claim 4, and Haraguchi further discloses that the control circuitry (205, Fig. 3) further includes a potential controller (implicit within 205, Fig. 3, given that it controls the switch 303 that selects either first potential LVDD or a second potential MVDD, see paragraph [0039]). Regarding claim 7, Haraguchi in view of Azuma discloses the light detecting device according to claim 5, and Haraguchi further discloses the anode of the first avalanche photodiode and the anode of the second avalanche photodiode (anodes of 302, Fig. 3, in all pixels of the array) are connected to the potential controller (implicit within 205, Fig. 3, which all pixels are connected to). Regarding claim 8, Haraguchi in view of Azuma discloses the light detecting device according to claim 7, and Haraguchi further discloses that the potential controller controls an electric potential of the anodes (implicit within 205, Fig. 3, given that it controls the switch 303 that selects either first potential LVDD or a second potential MVDD, see paragraph [0039]). Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Haraguchi in view of U.S. Patent Publication No. 2012/0013887 ("Xu"). Regarding claim 20, Haraguchi discloses a system, comprising: a light detecting device (Figs. 2-3), including: first pixel circuitry (203, Fig. 3) including a first avalanche photodiode (302, Fig. 3) and a first inverter (304, Fig. 3), the first pixel circuitry configured to output a first output signal (PLS, Fig. 3); second pixel circuitry including a second avalanche photodiode and a second inverter (see Fig. 2, a plurality of pixels, each having the same circuitry illustrated in Fig. 3), the second pixel circuitry configured to output a second output signal (PLS, Fig. 3); and control circuitry (205, Fig. 3, paragraph [0063]) configured to receive the second output signal (PLS, Fig. 3), wherein an output (PDEF, Fig. 3) of the control circuitry (205, Fig. 3) is coupled to the anode of the first avalanche photodiode (anode of 302, Fig. 3) and the anode of the second avalanche photodiode (anode of 302, Fig. 3, paragraphs [0051], [0053]). Haraguchi does not disclose a light source. However, Xu discloses a light source (120, Fig. 2, paragraph [0050]). It would have been obvious to one of ordinary skill in the art before the effective filing date to include a light source as disclosed by Xu in the system of Haraguchi in order to create a TOF system that can acquire distance information from an object, as an example application. Allowable Subject Matter Claims 6 and 9-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, and if the double patenting rejections are overcome. The following is a statement of reasons for the indication of allowable subject matter: The invention as claimed, specifically in combination with: the second pixel circuitry supplies a holding potential to the inter-pixel averaging section; or the second pixel circuitry further includes a sample and hold circuit, are not taught or made obvious by the prior art of record. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MONICA T. TABA whose telephone number is (571)272-1583. The examiner can normally be reached Monday - Friday 9 am - 6 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Georgia Epps can be reached at 571-272-2328. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MONICA T TABA/Examiner, Art Unit 2878
Read full office action

Prosecution Timeline

Aug 22, 2024
Application Filed
Mar 07, 2026
Non-Final Rejection — §101, §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
95%
With Interview (+5.3%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 191 resolved cases by this examiner. Grant probability derived from career allow rate.

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