DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Other Ref: Das (US 20240329879) – isolation between multiple domains in a hierarchical multi-tenant storage device
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1,2,4,5,6,8,9,10,11,13,15,16,17,18,20 are rejected under 35 U.S.C. 103 as being unpatentable over Frickey (US 20160283119 A1) and in view of Shin (US 20190065289 A1) and further in view of Sinha (US 20190155682)
Claim 1. Frickey discloses A storage system (eg., 0014 Fig. 1 - computing environment 100 ), comprising:
a host (eg., 0016 Fig. 1 – host 106); and
a storage device (eg., 0014 Fig. 1 - storage device 102) configured to:
receive, from the host, a plurality of first type commands (eg., 0021 Fig. 2 - read or the write command is shown via reference numeral 206);
measure a plurality of latencies of the plurality of first type commands; count a number of occurrences of the plurality of latencies within a first time period, the first time period being a time length among the plurality of latencies (eg., Fig. 2 [0023] FIG. 3 illustrates a block diagram 300 that shows how the storage device maintains a latency profile that records the number of I/O operations processed at different intervals of latencies).
generate latency data comprising time points when each of the plurality of first type commands are received, (eg., 0025, 0026 Fig. 3 - for each latency interval (i.e., latency range), the number of host I/O operations that fall within that latency interval is recorded in the latency profile.); and
output, to the host, the latency data based on (eg., 0034 – Fig. 5 - the storage device 102 determines (at block 510) whether the host 106 has requested the latency profile. If so, then the storage device 102 transmits (at block 512) the latency profile to the host 106 ).
Frickey does not disclose, but Shin discloses
based on the number of occurrences exceeding a predetermined threshold value (eg., 0080 notifying (730) of the occurrence of the slowdown event of the host device may include, when the slowdown event reaches the threshold level).
an asynchronous event request (AER) command being received from the host (eg., 0080 notifying (730) of the occurrence of the slowdown event of the host device may include, when the slowdown event reaches the threshold level, transmitting, to the host device, an asynchronous event notification message to notify the occurrence of the slowdown event).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin, providing the benefit determines whether at least one slowdown event occurs due to an internal operation, and when it is determined that the slowdown event occurs, notifies the host device of occurrence of the slowdown event (see Shin, 0006).
Frickey in view of Shin does not disclose, but Sinha discloses
generate latency data comprising time points when latency occurs for each of the plurality of first type commands, based on the number of occurrences exceeding a predetermined threshold value (eg., 0010 - timestamp.. rolling time window; 0030 - Each of the storage devices 150-154 has performance attributes …how the device is actually performing (IOPS, throughput, tail latency, errors count, etc.), and …periodically received at the device controller... The device controller 140 may store some device attributes (e.g. error logs); 0040 device controller updates performance attributes over a preconfigured rolling time window (S430) ; 0040 - performance statistics may be compared to a device specification (e.g. each statistic may be compared to a threshold). When a performance statistic is not within an acceptable range, an asynchronous event may be generated and sent to the host software (S450). In some embodiments, the host software may be configured to set a threshold ).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin, with Sinha, providing the benefit of host software 120 may periodically (e.g. at set time intervals, or after an asynchronous event) receive the stored device attribute information and provision I/O accordingly … provision I/O based on quality of service (QoS) requirements (see Sinha, 0030) host software receives the asynchronous event indicating compromised performance, the host application may redirect the I/O commands to other storage devices in the system or attached to another system (S460) in order to improve (or in some cases to restrict) performance of the I/O and I/O may be completed (0040).
Claim 2. Frickey discloses
wherein the storage device is further configured to: receive, from the host, an operating condition comprising at least one of a number of a plurality of time periods dividing time lengths of the plurality of latencies, a range of each of the plurality of time periods, or the predetermined threshold value of the number of occurrences of each of the plurality of time periods, the plurality of time periods comprising the first time period (eg., 0023 FIG. 3 illustrates a block diagram 300 that shows how the storage device maintains a latency profile that records the number of I/O operations processed at different intervals of latencies); and
generate a latency table for the plurality of first type commands based on the operating condition (eg., 0025 Fig. 3 - storage device may maintain a latency profile 304 of a plurality of I/O operations in the form of a table).
Claim 4. Frickey discloses wherein a first range of the first time period is different from a second range of a second time period from among the plurality of time periods (eg., [0023] FIG. 3 illustrates a block diagram 300 that shows how the storage device maintains a latency profile that records the number of I/O operations processed at different intervals of latencies).
Claim 5. Frickey discloses wherein the latency data comprises at least one time length of the plurality of latencies, based on the number of occurrences of the plurality of latencies exceeding the predetermined threshold value, or information on the plurality of first type commands (eg., [0033] The storage device 102 receives (at block 504) an I/O command (i.e., an I/O operation) from the host 106. The storage device 102 computes (at block 506) the latency of the I/O command by recording the time of receiving the I/O command (referred to as a first recorded time) and by recording the time at which the result of the I/O command is transmitted to the host 106 (referred to as the second recorded time), and computing the time difference from the two recorded times.).
Claim 6. Frickey does not disclose, but Shin discloses
wherein the storage device is further configured to: receive, from the host, the AER command through a host interface; and output, to the host, the latency data through the host interface (eg., 0080 notifying (730) of the occurrence of the slowdown event of the host device may include, when the slowdown event reaches the threshold level, transmitting, to the host device, an asynchronous event notification message to notify the occurrence of the slowdown event).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin, providing the benefit determines whether at least one slowdown event occurs due to an internal operation, and when it is determined that the slowdown event occurs, notifies the host device of occurrence of the slowdown event (see Shin, 0006).
Claim 8. Frickey discloses wherein the storage device is further configured to: collect a state at a time point when an error occurs in the storage device to generate dump data regarding an internal state of the storage device; and output, to the host, the dump data based on a trigger dump command from the host (eg., [0012] In certain embodiments, the SSD may record its own latency and this may allow the host computing system to determine the latency of I/O operations without consuming resources and assist in the debugging of latency issues. In certain embodiments, the SSD may record the time at which a read/write command (i.e., an I/O operation) is received and likewise the time at which the command is completed and sent back over a bus to the host computing system).
Claim 9. Frickey discloses An operating method of a storage system (eg., [0014] FIG. 1 illustrates a block diagram of a computing environment 100 in which a storage device,), the operating method comprising:
receiving an operating condition of a latency issue detection operation (eg., 0019 - in response to a request from the host 106. The I/O operations may include a request to perform read operations on one or more of the non-volatile chips 104a . . . 104n, or a request to perform write operations on one or more of the non-volatile memory chips 104a . . . 104n.);
generating a latency table based on the operating condition (eg., 0025 - a latency profile 304 of a plurality of I/O operations in the form of a table);
receiving a plurality of first type commands; measuring a plurality of latencies of the plurality of first type commands; counting a number of occurrences of the plurality of latencies within a first time period, the first time period being a time length among the plurality of latencies (eg., 0032] Control starts at block 502 in which a storage device 102 (e.g., a SSD) initializes a latency profile with latency intervals and a corresponding number of I/O operations that have latencies falling within the latency intervals,)
Frickey does not disclose, but Shin discloses
detecting a latency issue based on the number of occurrences exceeding a predetermined threshold value (eg., 0080 notifying (730) of the occurrence of the slowdown event of the host device may include, when the slowdown event reaches the threshold level).
receiving an asynchronous event request (AER) command; transmitting latency data comprising time points when each of the plurality of first type commands are received, based on the AER command (eg., 0080 notifying (730) of the occurrence of the slowdown event of the host device may include, when the slowdown event reaches the threshold level, transmitting, to the host device, an asynchronous event notification message to notify the occurrence of the slowdown event).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin, providing the benefit determines whether at least one slowdown event occurs due to an internal operation, and when it is determined that the slowdown event occurs, notifies the host device of occurrence of the slowdown event (see Shin, 0006).
Frickey in view of Shin does not disclose, but Sinha discloses
latency occurs for .. commands, (eg., 0010 - timestamp.. rolling time window; 0030 - Each of the storage devices 150-154 has performance attributes …how the device is actually performing (IOPS, throughput, tail latency, errors count, etc.), and …periodically received at the device controller... The device controller 140 may store some device attributes (e.g. error logs); 0040 device controller updates performance attributes over a preconfigured rolling time window (S430) ; 0040 - performance statistics may be compared to a device specification (e.g. each statistic may be compared to a threshold). When a performance statistic is not within an acceptable range, an asynchronous event may be generated and sent to the host software (S450). In some embodiments, the host software may be configured to set a threshold ).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin, with Sinha, providing the benefit of host software 120 may periodically (e.g. at set time intervals, or after an asynchronous event) receive the stored device attribute information and provision I/O accordingly … provision I/O based on quality of service (QoS) requirements (see Sinha, 0030) host software receives the asynchronous event indicating compromised performance, the host application may redirect the I/O commands to other storage devices in the system or attached to another system (S460) in order to improve (or in some cases to restrict) performance of the I/O and I/O may be completed (0040).
Claim 10. Frickey discloses wherein the operating condition comprises at least one of a number of a plurality of time periods dividing time lengths of the plurality of latencies, a range of each of the plurality of time periods, or the predetermined threshold value of the number of occurrences of each of the plurality of time periods (eg., 0023 FIG. 3 illustrates a block diagram 300 that shows how the storage device maintains a latency profile that records the number of I/O operations processed at different intervals of latencies), and
wherein the plurality of time periods comprises the first time period (eg., 0025 - atency profile 304 there are ten latency intervals each of 10 units of time (e.g. milliseconds or microseconds or some other unit of time) between 0 and 99, and another latency interval that captures all latencies over 100 units of time. The latency intervals may also be referred to as latency ranges.).
Claim 11. Frickey discloses wherein the detecting of the latency issue comprises: determining time periods from among the plurality of time periods corresponding to the plurality of latencies; and updating the number of occurrences of the determined time periods (eg., [0026] The latency measurement and reporting logic 112 may map the time stamp difference (i.e., the latency shown via reference numeral 306) of “0:36” to the latency interval “30-39” shown via reference numeral 308 and increment the command count 310 by 1 for this latency interval “30-39” and the incremented command count is shown via reference numeral 312 in the updated latency profile 314.).
Claim 13. Frickey discloses wherein a first range of the first time period is different from a second range of a second time period from among the plurality of time periods (eg., [0023] FIG. 3 illustrates a block diagram 300 that shows how the storage device maintains a latency profile that records the number of I/O operations processed at different intervals of latencies).
Claim 15. Frickey in view of Shin does not disclose, but Sinha discloses
receiving a trigger dump command; generating dump data regarding an internal state of a storage device by collecting a state of the storage device at a time point when an error occurs in the storage device; and transmitting the dump data based on the trigger dump command (eg., 0030 - device attributes may be periodically received at the device controller 140 and stored in a dedicated device attribute storage 142. The device controller 140 may store some device attributes (e.g. error logs) in a volatile memory in accordance with various standards and store further attributes in a NVM memory… host software 120 may periodically (e.g. at set time intervals, or after an asynchronous event) receive the stored device attribute information and provision I/O accordingly. For example, the host software 120 may provision I/O based on quality of service (QoS) requirements for each of the applications 110-116.).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin with Sinha, providing the benefit of generally to memory solid state drive (ssd) monitoring and reporting (see Sinha, 0002) cause the processor to provision one of the at least one SSD based on a stored at least one granular performance information and a Quality of Service requirement (0006).
Claim 16. Frickey discloses A storage device (eg.,0016 Fig. 1 - SSD 102), comprising:
a host interface configured to receive a plurality of first type commands (eg., 0016 Fig. 1 - a host computing system or as a computational device. The host 106 may communicate with the SSD 102 over a bus (such as Peripheral Component Interconnect (PCIe), Serial Advanced Technology Attachment (SATA), Serial Attached Small Computer System Interface (SAS)) or a network);
a memory storing instructions and one or more processors communicatively coupled to the host interface and to the memory, wherein the one or more processors are configured to execute the instructions to:
measure a plurality of latencies of the plurality of first type commands; count a number of occurrences of the plurality of latencies within a first time period, the first time period being a time length among the plurality of latencies (eg., Fig. 2 [0023] FIG. 3 illustrates a block diagram 300 that shows how the storage device maintains a latency profile that records the number of I/O operations processed at different intervals of latencies);
generate latency data comprising time points when each of the plurality of first type commands are received (eg., 0025, 0026 Fig. 3 - for each latency interval (i.e., latency range), the number of host I/O operations that fall within that latency interval is recorded in the latency profile.).
Frickey does not disclose, but Shin discloses
based on the number of occurrences exceeding a predetermined threshold value (eg., 0080 notifying (730) of the occurrence of the slowdown event of the host device may include, when the slowdown event reaches the threshold level).
output, through the host interface, the latency data based on an asynchronous event request (AER) command. (eg., 0080 notifying (730) of the occurrence of the slowdown event of the host device may include, when the slowdown event reaches the threshold level, transmitting, to the host device, an asynchronous event notification message to notify the occurrence of the slowdown event).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin, providing the benefit determines whether at least one slowdown event occurs due to an internal operation, and when it is determined that the slowdown event occurs, notifies the host device of occurrence of the slowdown event (see Shin, 0006).
Frickey in view of Shin does not disclose, but Sinha discloses
latency occurs for .. commands, (eg., 0010 - timestamp.. rolling time window; 0030 - Each of the storage devices 150-154 has performance attributes …how the device is actually performing (IOPS, throughput, tail latency, errors count, etc.), and …periodically received at the device controller... The device controller 140 may store some device attributes (e.g. error logs); 0040 device controller updates performance attributes over a preconfigured rolling time window (S430) ; 0040 - performance statistics may be compared to a device specification (e.g. each statistic may be compared to a threshold). When a performance statistic is not within an acceptable range, an asynchronous event may be generated and sent to the host software (S450). In some embodiments, the host software may be configured to set a threshold ).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin, with Sinha, providing the benefit of host software 120 may periodically (e.g. at set time intervals, or after an asynchronous event) receive the stored device attribute information and provision I/O accordingly … provision I/O based on quality of service (QoS) requirements (see Sinha, 0030) host software receives the asynchronous event indicating compromised performance, the host application may redirect the I/O commands to other storage devices in the system or attached to another system (S460) in order to improve (or in some cases to restrict) performance of the I/O and I/O may be completed (0040).
Claim 17 is rejected for reasons similar to Claim 2 above.
Claim 18. Frickey discloses a buffer memory configured to store the latency data and the latency table (eg., [0029] In certain embodiments, after the host (reference numeral 402) has sent (reference numeral 404) a plurality of I/O operations 404 to the storage device (reference numeral 406) the host may request a latency profile from the storage device. In response to receiving the request, the storage device (reference numeral 408) returns (shown via reference numeral 410) the latency profile 412 ).
Claim 20. Frickey discloses a debug controller configured to: collect a state at a time point when an error occurs in the storage device; generate dump data regarding an internal state of the storage device; and output the dump data based on a trigger dump command (eg., [0012] In certain embodiments, the SSD may record its own latency and this may allow the host computing system to determine the latency of I/O operations without consuming resources and assist in the debugging of latency issues. In certain embodiments, the SSD may record the time at which a read/write command (i.e., an I/O operation) is received and likewise the time at which the command is completed and sent back over a bus to the host computing system).
Claims 3, 12 are rejected under 35 U.S.C. 103 as being unpatentable over Frickey (US 20160283119 A1) and in view of Shin (US 20190065289 A1) and Sinha (cited above) and further in view of Rostagni (US 20180268019 A1)
Claim 3. Frickey in view of Shin and Sinha does not disclose, but Rostagni discloses
wherein a first predetermined threshold value of the first time period is different from a second predetermined threshold value of a second time period from among the plurality of time periods (eg., 0173 - allow a user to dynamically adjust the threshold to provide a fine-grained balance between comparison performance and host write latency.).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin and Sinha with Rostagni, providing the benefit data chunk is under comparison, yet due to frequent I/O activity, the comparison is continuously abandoned midstream and re-started, and therefore not able to be completed. In this regard, a collision counter is set up for each data chunk, initialized to 0, and incremented each time the data chunk experiences a collision during the comparison process. A threshold value is determined for the number of collisions that are to be permitted (see Rostagni, 0173).
Claim 12. Frickey in view of Shin and Sinha does not disclose, but Rostagni discloses
wherein a first predetermined threshold value of the first time period is different from a second predetermined threshold value of a second time period from among the plurality of time periods (eg., 0173 - allow a user to dynamically adjust the threshold to provide a fine-grained balance between comparison performance and host write latency.).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin and Sinha with Rostagni, providing the benefit data chunk is under comparison, yet due to frequent I/O activity, the comparison is continuously abandoned midstream and re-started, and therefore not able to be completed. In this regard, a collision counter is set up for each data chunk, initialized to 0, and incremented each time the data chunk experiences a collision during the comparison process. A threshold value is determined for the number of collisions that are to be permitted (see Rostagni, 0173).
Claims 7, 19 are rejected under 35 U.S.C. 103 as being unpatentable over Frickey (US 20160283119 A1) and in view of Shin (US 20190065289 A1) and Sinha (cited above) and further in view of Meir (US 20120246435 A1)
Claim 7. Frickey in view of Shin and Sinha does not disclose, but Meir discloses
wherein the storage device is further configured to: receive, from the host, the AER command through a sideband interface; and output, to the host, the latency data through the sideband interface (eg., 0052] Further additionally or alternatively, the memory controller may report the rules of the policy using sideband signaling, either over interface 32 or using any other suitable interface.)
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin and Sinha with Meir, providing the benefit of memory controller that accepts memory access commands from a host for execution in one or more memory units. The method includes holding a definition of a policy to be applied by the memory controller in the execution of the memory access commands in the memory units. The policy is reported from the memory controller to the host so as to cause the host to format memory access commands based on the reported policy (see Meir, 0004).
Claim 19. Frickey in view of Shin and Sinha does not disclose, but Meir discloses
a sideband interface configured to receive the AER command, wherein the one or more processors are further configured to execute further instructions to output the latency data through the sideband interface (eg., 0052] Further additionally or alternatively, the memory controller may report the rules of the policy using sideband signaling, either over interface 32 or using any other suitable interface.)
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin and Sinha with Meir, providing the benefit of memory controller that accepts memory access commands from a host for execution in one or more memory units. The method includes holding a definition of a policy to be applied by the memory controller in the execution of the memory access commands in the memory units. The policy is reported from the memory controller to the host so as to cause the host to format memory access commands based on the reported policy (see Meir, 0004).
Claims 14 is rejected under 35 U.S.C. 103 as being unpatentable over Frickey (US 20160283119 A1) and in view of Shin (US 20190065289 A1) and Sinha (cited above) and further in view of Kim (US 20170123687) and Zhang (US 20160085624)
Claim 14. Frickey in view of Shin and Sinha does not disclose, but Kim discloses
wherein the generating of the latency table comprises: generating a plurality of latency tables, each latency table of the plurality of latency tables respectively corresponding to a command type of a plurality of command types, the plurality of command types comprising a read command, a write command, and a data set management command. (eg., 0031 Fig. 5- read latency table RLAT; 0043 - perform a read/write operation under control of the storage controller 310.; 0046 - CPU 311 may transfer a variety of information, which is needed to perform a read/write operation of the nonvolatile memory device 300, to registers of the host interface 312 and flash interface 314.)
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin and Sinha with Kim, providing the benefit of a host device which improves reliability by preventing a retention problem according to a high-temperature phenomenon or non-periodic use of a memory device (see Kim, 0002) he storage controller 310 may adjust the magnitude of data to be exchanged between the host device 200 and the storage device 300 or may convert the magnitude of a command to be exchanged therebetween (0044)
Frickey in view of Shin, and Sinha, Kim does not disclose, but Zhang discloses
a write command, and a data set management command. (eg.,. 0019 Fig. 2 - write speed table 130)
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin and Sinha, with Kim, providing the benefit of memory controller 102 may be effective to generate an instruction for memory controller 122 to store data in memory cells of memory chip 104 at a particular latency or speed (see Zhang, 0019).
Response to Arguments
Applicant's arguments filed 2/3/2026 have been fully considered but they are not persuasive.
For claims 1, 9 and 16, Applicant argues that that the cited references do not disclose the amended limitations. The Office disagrees.
In the present OA, the updated combination of references render the amended limitations as obvious.
Specifically, Frickey in view of Shin does not disclose, but Sinha discloses
generate latency data comprising time points when latency occurs for each of the plurality of first type commands, based on the number of occurrences exceeding a predetermined threshold value (eg., 0010 - timestamp.. rolling time window; 0030 - Each of the storage devices 150-154 has performance attributes …how the device is actually performing (IOPS, throughput, tail latency, errors count, etc.), and …periodically received at the device controller... The device controller 140 may store some device attributes (e.g. error logs); 0040 device controller updates performance attributes over a preconfigured rolling time window (S430) ; 0040 - performance statistics may be compared to a device specification (e.g. each statistic may be compared to a threshold). When a performance statistic is not within an acceptable range, an asynchronous event may be generated and sent to the host software (S450). In some embodiments, the host software may be configured to set a threshold ).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify sending latency profile of received command as disclosed by Frickey, with Shin, with Sinha, providing the benefit of host software 120 may periodically (e.g. at set time intervals, or after an asynchronous event) receive the stored device attribute information and provision I/O accordingly … provision I/O based on quality of service (QoS) requirements (see Sinha, 0030) host software receives the asynchronous event indicating compromised performance, the host application may redirect the I/O commands to other storage devices in the system or attached to another system (S460) in order to improve (or in some cases to restrict) performance of the I/O and I/O may be completed (0040).
Applicant’s arguments for dependent claims 2-8, 10-15, 17-20 are based on their respective base independent claims 1, 9, 16, which are addressed above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GAUTAM SAIN whose telephone number is (571)270-3555. The examiner can normally be reached M-F 9-5.
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/GAUTAM SAIN/Primary Examiner, Art Unit 2135