Prosecution Insights
Last updated: October 02, 2026
Application No. 18/814,730

METHOD FOR SEARCHING STORAGE UNIT FOR OUTPUT DATA CORRESPONDING TO INPUT DATA

Final Rejection §103
Filed
Aug 26, 2024
Priority
Sep 13, 2023 — CN 202311182122.2
Examiner
ELLIS, MATTHEW J
Art Unit
2153
Tech Center
2100 — Computer Architecture & Software
Assignee
BEIJING HORIZON INFORMATION TECHNOLOGY CO., LTD.
OA Round
2 (Final)
70%
Grant Probability
Favorable
3-4
OA Rounds
1y 3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allowance Rate
230 granted / 331 resolved
+14.5% vs TC avg
Strong +30% interview lift
Without
With
+30.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
12 currently pending
Career history
350
Total Applications
across all art units

Statute-Specific Performance

§101
12.7%
-27.3% vs TC avg
§103
59.4%
+19.4% vs TC avg
§102
13.8%
-26.2% vs TC avg
§112
6.0%
-34.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 331 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA and is in response to communications filed on 6/04/2026 in which claims 1,3-8,10-13 and 15-20 are presented for examination. Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. CN202311182122.2, filed on 9/13/2023. Drawings Drawings have been acknowledged and are acceptable for examination purposes. Specification Specification has been acknowledged and is acceptable for examination purposes. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3-8, 10-13, 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. US 20210349718 A1 (hereinafter referred to as “Wang”) in view of Chou et al. US 7405766 B1 (hereinafter referred to as “Chou”). As per claim 1, Wang teaches: A method for searching a storage unit for output data corresponding to input data (Wang, Fig. 2), comprising: determining first data corresponding to a first preset bit quantity and second data corresponding to a second preset bit quantity of the input data (Wang, Fig. 3, 102 and [0035] – input data format such as floating 32, 16, 32-bit fixed point, etc.); determining a first lookup table corresponding to the first preset bit quantity (Wang, [0004] fig. 5 – Table look-up. [0046] – Since k is an integer and has bounded range, the ln(2.sup.k) portion of the scaling correction are pre-calculated constants in a small lookup-table) and … determining third data (Wang, [0042] – Since k is an integer and has bounded range, the ln(2.sup.k) portion of the scaling correction are pre-calculated constants in a small lookup-table) corresponding to the first data in the first lookup table based on an address space corresponding to the first index address (Wang, [0042] – The LUT uses the same index to address the value and the corresponding Grad); and determining the output data corresponding to the input data (Wang, [0023]) based on the third data and the second data (Wang, [0023]). Wang doesn’t go into detail about a precision type of input data or parity type, however, Chou teaches: a precision type of the input data from the storage unit based on the precision type of the input data (Chou, column 12, lines 38-44 – The video processing unit 220 utilizes a motion data bit pattern 1150 comprising the per-pixel motion data bits 908 and per-field motion data bits 830a derived from the higher per-field threshold levels (810b-810d) to perform a lookup on a per-pixel interpolation method lookup table 1100, wherein interpolation is interpreted as a precision type. Considering additional pixels generally provides a more reliable and accurate indication of motion characteristics around the missing target pixel 16 and therefore the interpolated value for the missing pixel 16 can be more accurate and precise); determining a first index address corresponding to the first data in the first lookup table based on a parity type of the first data and the first lookup table (Chou, column 5, lines 65 – column 6, lines 1-5 – If the parity of the subject field 10b is "even," i.e., the field 10b includes pixel data 110 for pixels 14 in even numbered scan lines 12b, and if the output scan line being generated is also an "even" numbered scan line, e.g., 2, the de-interlacing system 200 will output the pixel data 110 for the pixels 14 in scan line 2 (12b) in the subject field 10b); It would have been obvious for one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Wang’s invention in view of Chou in order to include precision types in the form of a per-pixel interpolation method lookup table and parity types in the form of an even numbered scan and output scan line; this is advantageous because additional pixels generally provides a more reliable and accurate indication of motion characteristics around the missing target pixel 16 and therefore the interpolated value for the missing pixel 16 can be more accurate and precise (Chou, column 12, lines 49-54) 2. (Cancelled) As per claim 3, Wang as modified teaches: The method according to claim 1, wherein the determining the first index address corresponding to the first data in the first lookup table based on the parity type of the first data and the first lookup table comprises: determining first subaddresses corresponding to the first data in a first subtable and a second subtable based on the parity type of the first data (Wang, [0041] – The IDX_Gen (302) maps a normalized input value x.sub.i<=nXin<x.sub.i+1 to the index which points to the memory location stores f(x.sub.i)), wherein the first subtable (Chou, column 10, lines 65-67- column 11, lines 1-9 – The value (LUT.sub.1(i)) in the look up table 222 corresponding to the bit value of motion data (MD(i)) is an index k of the per-pixel interpolation method generating the sample output values with the least total error (TE(i, k)) among all K per-pixel interpolation methods) and the second subtable are in the first lookup table (Chou, column 11, lines 10-25 – The value (LUT.sub.2(i)) in the look up table 222 corresponding to MD(i) is a set of mixing coefficients w that indicate the weight, if any, each of the plurality of per-pixel interpolation methods is given by the optimal de-interlacing method); and determining second subaddresses corresponding to the first data in a third subtable and a fourth subtable based on the parity type of the first data (Wang, [0039]-[0041]), wherein the third subtable and the fourth subtable are in the first lookup table (Chou, column 11, lines 10-25 – The optimal mixing coefficients w produce the sample output values with the least total error (LTE.sub.2(i)) among all possible sets of mixing coefficients. That is: LUT.sub.2(i)=w=[w.sub.1 w.sub.2 . . . w.sub.K] where TE.sub.2(i, w).ltoreq.TE.sub.2(i, w') for all w'.noteq.w, and TE.sub.2(i, w)=.SIGMA..sub.c{[.SIGMA..sub.k D(i, c, k).times.w.sub.k]-P(i, c)}.sup.2), wherein the first index address comprises the first subaddresses and the second subaddresses (Wang, [0039]-[0041]). As per claim 5, Wang teaches: The method according to claim 1, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining third-interpolation data based on the second data (Wang, [0039]-[0041]); and performing an interpolation operation based on the-third interpolation data and the third data, to determine the output data corresponding to the input data (Wang, [0039]-[0041]). As per claim 6, Wang teaches: The method according to claim 21, wherein the determining third data corresponding to the first data in the first lookup table based on an address space corresponding to the first index address comprises: determining a fifth subtable corresponding to the first data in the first lookup table based on the parity type of the first data (Wang, [0035] and [0039]-[0041]); and determining the third data corresponding to the first data in the fifth subtable based on the address space corresponding to the first index address (Wang, [0035] and [0039]-[0041]). As per claim 7, Wang teaches: The method according to claim 1, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining a second lookup table corresponding to the second preset bit quantity from the storage unit based on the precision type of the input data(Wang, [0035] and [0039]-[0041]); determining a second index address corresponding to the second data in the second lookup table based on the second data and the second lookup table (Wang, [0035] and [0039]-[0041]); determining fourth data corresponding to the second data in the second lookup table based on an address space corresponding to the second index address (Wang, [0035] and [0039]-[0041]); and determining the output data corresponding to the input data based on the third data and the fourth data (Wang, [0035] and [0039]-[0041]). As per claim 8, Wang teaches: The method according to claim 7, wherein the determining fourth data corresponding to the second data in the second lookup table based on an address space corresponding to the second index address comprises: determining a sixth subtable corresponding to the second data in the second lookup table based on a parity type of the second data (Wang, [0035] and [0039]-[0041]); and determining the fourth data corresponding to the second data in the sixth subtable based on the address space corresponding to the second index address (Wang, [0035] and [0039]-[0041]). 9. (Cancelled) As per claim 10, Wang teaches: The method according to claim 3, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining third-interpolation data based on the second data; and performing an interpolation operation based on the third-interpolation data and the third data, to determine the output data corresponding to the input data (Wang, [0035] and [0039]-[0041]). As per claim 11, Wang teaches: The method according to claim 4, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining third interpolation data based on the second data; and performing an interpolation operation based on the third interpolation data and the third data, to determine the output data corresponding to the input data (Wang, [0035] and [0039]-[0041]). As per claim 12, Wang teaches: The method according to claim 6, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining a second lookup table corresponding to the second preset bit quantity from the storage unit based on the precision type of the input data (Wang, [0035] and [0039]-[0041]); determining a second index address corresponding to the second data in the second lookup table based on the second data and the second lookup table (Wang, [0035] and [0039]-[0041]); determining fourth data corresponding to the second data in the second lookup table based on an address space corresponding to the second index address (Wang, [0035] and [0039]-[0041]); and determining the output data corresponding to the input data based on the third data and the fourth data (Wang, [0035] and [0039]-[0041]). As to claim 20, Wang discloses an electronic device, wherein the electronic device comprises: a processor, and a memory, configured to store a processor-executable instruction, wherein the processor is configured to read the executable instruction from the memory, and execute the instruction to implement the method for searching a storage unit for output data corresponding to input data according to claim 1.(fig. 1). As to claims 13, 15 and 17-19, the limitations of these claims have been noted in the rejection above. They are therefore rejected as set forth above. Allowable Subject Matter Claims 4 and 16 remain as being objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. REASONS FOR ALLOWANCE The following is an examiner's statement of reasons for allowance: The prior art made of record does not teach or fairly suggest the combination of elements recited in dependent claims 4 and 16. More specifically, the prior art of record does not specifically suggest a method, comprising: determining first subdata corresponding to the first data in the first subtable based on an address space corresponding to the first subaddress in the first index address; determining second subdata corresponding to the first data in the second subtable based on the address space corresponding to the first subaddress in the first index address; determining third subdata corresponding to the first data in the third subtable based on an address space corresponding to the second subaddress in the first index address; determining fourth subdata corresponding to the first data in the fourth subtable based on the address space corresponding to the second subaddress in the first index address; and determining first interpolation data and second interpolation data based on the first subdata, the second subdata, the third subdata, and the fourth subdata, wherein the third data comprises the first interpolation data and the second interpolation data. Response to Arguments First, Applicant points to the specification in response to the objections made. The response therefore fully addresses the issues put forth in the set of objections, and the rejection has been modified based on the clarifications. Applicant’s arguments with respect to claims have been considered but are generally moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. The points which are directed toward Wang are addressed herein: First, the argument that Wang is different from the invention is not the pertinent unless the claims contain explicit limitations that reflect the arguments in view of the specification. Applicant beings up the point that Wang performs extra steps or performs different steps, but Wang still teaches the limitations of the claims. Chou also has been introduced as teaching some of the limitations – namely the parity and precision type. Chou also addresses an increasing lookup table size which was pointed out by the Applicant as an important part of the inventive concept of the application. The rejection is therefore modified due to amendments made to the claims and the prior art adequately teaches the claimed limitations in a broadest reasonable interpretation in view of the specification. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Kim et al. US 20220171570 A1 teaches a striping engine configured to receive queued orders of the write commands, and output, by referring to a lookup table, addresses of unit regions, in which the data chunks are to be arranged (Abstract). Sharma et al. US 20210051328 A1 teaches encoder artificially setting the parity (whether the sum is even or odd) of the group of coefficients to a desired value, so that the parity itself indicates the hidden sign bit ([0200]). Yang et al. 2018, “Elastic Sketch: Adaptive and Fast Network-wide Measurements” Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to the current examiner working on this case, name: Matthew Ellis, telephone number: (571)270-3443, email: matthew.ellis@uspto.gov, normal business hours Monday-Friday 8AM-5PM EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kavita Stanley can be reached on (571) 272-8352. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. September 11, 2026 /MATTHEW J ELLIS/Primary Examiner, Art Unit 2153
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Prosecution Timeline

Aug 26, 2024
Application Filed
Mar 05, 2026
Non-Final Rejection mailed — §103
Jun 04, 2026
Response Filed
Sep 15, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
70%
Grant Probability
99%
With Interview (+30.3%)
3y 5m (~1y 3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 331 resolved cases by this examiner. Grant probability derived from career allowance rate.

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