Prosecution Insights
Last updated: April 19, 2026
Application No. 18/814,730

METHOD FOR SEARCHING STORAGE UNIT FOR OUTPUT DATA CORRESPONDING TO INPUT DATA

Non-Final OA §102
Filed
Aug 26, 2024
Examiner
WU, YICUN
Art Unit
2153
Tech Center
2100 — Computer Architecture & Software
Assignee
BEIJING HORIZON INFORMATION TECHNOLOGY CO., LTD.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
3y 3m
To Grant
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
486 granted / 598 resolved
+26.3% vs TC avg
Strong +17% interview lift
Without
With
+17.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
16 currently pending
Career history
614
Total Applications
across all art units

Statute-Specific Performance

§101
11.5%
-28.5% vs TC avg
§103
47.5%
+7.5% vs TC avg
§102
26.3%
-13.7% vs TC avg
§112
3.7%
-36.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 598 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims objections Examiner is not clear about “corresponding to” as in “determining third data corresponding to the first data in the first lookup table based on an address space corresponding to the first index address” further clarification is required. Parity type, subtable, subaddress have not been clearly defined in the claims. Further clarification is required. As in claim 3, both second subtable and fourth subtable are in the first lookup table, however, it is not clear whether first subtable and third subtable are in the first lookup table as well. Is Claims 5 and 9-11 depend on claim 4 and Claim 17 depends on claim 16? Otherwise, “third interpolation data” would be considered lacks antecedent basis. Examiner believes there might be a typographical error. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Pgpub. Wang et al. U.S. 20210349718. As to claim 1, Wang discloses a method for searching a storage unit for output data corresponding to input data (fig. 2), comprising: determining first data corresponding to a first preset bit quantity (input data format such as floating 32, floating 16, 32-bit fixed-point, 16-bit fixed-point, 8-bit fixed-point and etc. [0035] and fig. 3, 102) and second data corresponding to a second preset bit quantity of the input data (input data format such as floating 32, floating 16, 32-bit fixed-point, 16-bit fixed-point, 8-bit fixed-point and etc. [0035] and fig. 3, 102); determining a first lookup table (table look-up [004] fig. 5) corresponding to the first preset bit quantity from the storage unit based on a precision type of the input data (Since k is an integer and has bounded range, the ln(2.sup.k) portion of the scaling correction are pre-calculated constants in a small lookup-table. [0046]); determining a first index address (index. [0041] [0042]) corresponding to the first data in the first lookup table based on the first data and the first lookup table (in a small lookup-table. [0046]); determining third data (The LUT uses the same index to address the value and the corresponding Grad. [0042]) corresponding to the first data in the first lookup table based on an address space corresponding to the first index address (The LUT uses the same index to address the value and the corresponding Grad. [0042]); and determining the output data corresponding to the input data (input [0023]) based on the third data and the second data. (output [0023]). As to claim 2, Wang discloses a method according to claim 1, wherein the determining a first index address corresponding to the first data in the first lookup table based on the first data and the first lookup table comprises: determining a parity type of the first data ([0035]); and determining the first index address corresponding to the first data in the first lookup table based on the parity type ([0035]) of the first data and the first lookup table ([0041][0042]). As to claim 3, Wang discloses a method according to claim 2, wherein the determining the first index address corresponding to the first data in the first lookup table based on the parity type of the first data and the first lookup table comprises: determining first subaddresses corresponding to the first data in a first subtable and a second subtable in the first lookup table based on the parity type of the first data ( The IDX_Gen (302) maps a normalized input value x.sub.i<=nXin<x.sub.i+1 to the index which points to the memory location stores f(x.sub.i). [0041]); and determining second subaddresses corresponding to the first data in a third subtable and a fourth subtable in the first lookup table based on the parity type of the first data, wherein the first index address comprises the first subaddresses and the second subaddresses ([0039]-[0041]). As to claim 5, Wang discloses a method according to claim 1, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining third interpolation data based on the second data ([0039]-[0041]); and performing an interpolation operation based on the third interpolation data and the third data, to determine the output data corresponding to the input data ([0039]-[0041]). As to claim 6, Wang discloses a method according to claim 2, wherein the determining third data corresponding to the first data in the first lookup table based on an address space corresponding to the first index address comprises: determining a fifth subtable corresponding to the first data in the first lookup table based on the parity type of the first data ([0035] and [0039]-[0041]); and determining the third data corresponding to the first data in the fifth subtable based on the address space corresponding to the first index address ([0035] and [0039]-[0041]). As to claim 7, Wang discloses a method according to claim 1, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining a second lookup table corresponding to the second preset bit quantity from the storage unit based on the precision type of the input data([0035] and [0039]-[0041]); determining a second index address corresponding to the second data in the second lookup table based on the second data and the second lookup table([0035] and [0039]-[0041]); determining fourth data corresponding to the second data in the second lookup table based on an address space corresponding to the second index address([0035] and [0039]-[0041]); and determining the output data corresponding to the input data based on the third data and the fourth data ([0035] and [0039]-[0041]). As to claim 8, Wang discloses a method according to claim 7, wherein the determining fourth data corresponding to the second data in the second lookup table based on an address space corresponding to the second index address comprises: determining a sixth subtable corresponding to the second data in the second lookup table based on a parity type of the second data ([0035] and [0039]-[0041]); and determining the fourth data corresponding to the second data in the sixth subtable based on the address space corresponding to the second index address ([0035] and [0039]-[0041]). As to claim 9, Wang discloses a method according to claim 2, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining third interpolation data based on the second data ([0035] and [0039]-[0041]); and performing an interpolation operation based on the third interpolation data and the third data, to determine the output data corresponding to the input data([0035] and [0039]-[0041]). As to claim 10, Wang discloses a method according to claim 3, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining third interpolation data based on the second data; and performing an interpolation operation based on the third interpolation data and the third data, to determine the output data corresponding to the input data ([0035] and [0039]-[0041]). As to claim 11, Wang discloses a method according to claim 4, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining third interpolation data based on the second data; and performing an interpolation operation based on the third interpolation data and the third data, to determine the output data corresponding to the input data ([0035] and [0039]-[0041]). As to claim 12, Wang discloses a method according to claim 6, wherein the determining the output data corresponding to the input data based on the third data and the second data comprises: determining a second lookup table corresponding to the second preset bit quantity from the storage unit based on the precision type of the input data ([0035] and [0039]-[0041]); determining a second index address corresponding to the second data in the second lookup table based on the second data and the second lookup table([0035] and [0039]-[0041]); determining fourth data corresponding to the second data in the second lookup table based on an address space corresponding to the second index address([0035] and [0039]-[0041]); and determining the output data corresponding to the input data based on the third data and the fourth data([0035] and [0039]-[0041]). As to claim 20, Wang discloses an electronic device, wherein the electronic device comprises: a processor, and a memory, configured to store a processor-executable instruction, wherein the processor is configured to read the executable instruction from the memory, and execute the instruction to implement the method for searching a storage unit for output data corresponding to input data according to claim 1.(fig. 1). As to claims 13-15 and 17-19, the limitations of these claims have been noted in the rejection above. They are therefore rejected as set forth above. Claims 4 and 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims and overcoming objections and 101 rejection. REASONS FOR ALLOWANCE The following is an examiner's statement of reasons for allowance: The prior art made of record does not teach or fairly suggest the combination of elements recited in dependent claims 4 and 16. More specifically, the prior art of record does not specifically suggest a method, comprising: determining first subdata corresponding to the first data in the first subtable based on an address space corresponding to the first subaddress in the first index address; determining second subdata corresponding to the first data in the second subtable based on the address space corresponding to the first subaddress in the first index address; determining third subdata corresponding to the first data in the third subtable based on an address space corresponding to the second subaddress in the first index address; determining fourth subdata corresponding to the first data in the fourth subtable based on the address space corresponding to the second subaddress in the first index address; and determining first interpolation data and second interpolation data based on the first subdata, the second subdata, the third subdata, and the fourth subdata, wherein the third data comprises the first interpolation data and the second interpolation data. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Yicun Wu whose telephone number is 571-272-4087. The examiner can normally be reached on 8:00 am to 4:30 pm, Monday -Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Kavita Stanley, can be reached on (571) 571-272-8352. The fax phone numbers for the organization where this application or proceeding is assigned are 571-273-8300. Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is 571-272-2100. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system: "http://portal.uspto.gov/external/portal/pair" Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) 866-217-9197 (toll-free) If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Yicun Wu Patent Examiner Technology Center 2100 /YICUN WU/ Primary Examiner, Art Unit 2153
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Prosecution Timeline

Aug 26, 2024
Application Filed
Feb 14, 2026
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+17.3%)
3y 3m
Median Time to Grant
Low
PTA Risk
Based on 598 resolved cases by this examiner. Grant probability derived from career allow rate.

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