DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
Claims 1, 3, 5, 6, 8, 13 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Zanzig [US 5,293,421]
Claim 1. (Currently Amended) A preamplifier circuit (see Fig. 1, abstract) comprising: a cable connector interface comprising coupling for two lines (the interface two lines/wires a, b, see Figs. 2, 4, col. 2, lines 18-22, col. 3, lines 7-20);
a resistor network coupled to the cable connector interface via the two lines (the impedance/resistor network R1-R6, see Fig. 2, col. 3, lines 52-68, col. 4, lines 1-2);
a transceiver coupled to the resistor network for simultaneous bidirectional communication including over the two lines (the transmitting line S and receiving line E, see Figs. 2, 4, col. 3, lines 3-20);
a plurality of capacitors arranged between the resistor network and the transceiver (the capacitors C1, C2, Cp, see Figs. 2, 3, col. 3, lines 35-38); and
a power bus coupled to the cable connector interface via the two lines for generating a
direct current (DC) power signal for the preamplifier circuit including the transceiver (the DC voltage signal, see Figs. 2, col. 4, lines 40-45).
Claim 3. (Original) The preamplifier circuit of claim 1, wherein the power bus comprises: a voltage regulator (read upon the two-stage amplifier amplifies the output signal from the measuring arrangement M in such a way that its output voltage is to the output current as the complex partial impedance is to the output current. Its gain must thus be equal to a real multiple of this partial impedance. The gain of a feedback operational amplifier is proportional to its feedback resistance (R8 in the case of VS2) and inversely proportional to its dropping resistance (R15 in the case of VS2), which include a stage with real gain, see Figs. 1, 2, col. 2, lines 46-68, col. 4, lines 3-26);
a first resistor coupled at a first end to one of the two lines and coupled at a second end to a node at an input of the voltage regulator (the resistor 8 at node P1, see Fig. 2, col. 4, lines 3-11);
a second resistor coupled to another one of the two lines at a corresponding first end and coupled at a corresponding second end to the node; and a diode coupled to the node (the resistor R15 at node P1, see Fig. 2, col. 4, lines 10-14).
Claim 5. (Original) The preamplifier circuit of claim 1, further comprising: a sensor preamplifier having a sensor input, a data input, and a signal output, wherein the
sensor preamplifier is coupled to the transceiver to receive a clock signal and output a data signal based on a sensor signal received at the sensor input (the current-sensing and amplifier stages VS1 and VS2, see Figs. 1, 2, col. 3, lines 52-59).
Claim 6. (Original) The preamplifier circuit of claim 5, wherein the sensor preamplifier is further coupled to the power bus to receive the DC power signal (as cited in respect to claims 1 and 5 above, such as the DC voltage signal).
Claim 8. (Original) The preamplifier circuit of claim 1, wherein an output signal of the transceiver has a frequency sufficient to pass through the plurality of capacitors from the transceiver to the resistor network (as cited in respect to claim 1 above, and including frequency-response compensation, see col. 3, lines 39-43).
Claim 13. (Original) The bidirectional communication system of claim 12, wherein the sensor receives the DC power signal generated by the power bus of the preamplifier circuit (as cited in respect to claims 1 and 5 above).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 4, 7, 10-12, 15-19 are rejected under 35 U.S.C. 103 as being unpatentable over Zanzig [US 5,293,421] in view of Hershbarger [US 5,602,912]
Claim 2. Zanzig fails to disclose wherein the plurality of capacitors comprises four capacitors, each capacitor on a corresponding line between the resistor network and the transceiver. However,
Zanzig teaches that the telephone communication circuit comprises a plurality of resistors and capacitors C1, C2, Cp, see Figs. 2, 3, col. 3, lines 35-38).
Hershbarger suggests that the telephone hybrid circuit comprises a plurality of resistors and capacitors 754, 755, 757 and 758 between the resistors and transceiver or telephone lines 770, 771, see abstract, Fig. 7D, col. 9, lines 55-67, col. 10, lines 1-5).
Therefore, it would have been obvious to one skill in the art before the effective filing date of the invention to implement or substitute the four capacitors of Hershbarger for the capacitors of Zanzig in order to filter of transmitting and receiving signals for providing a high quality output results of the telephone as to minimize noises and/or cross talk signals.
Claim 4. Zanzig fails to disclose wherein the voltage regulator comprises a low pass filter. However,
Zanzig teaches that the two-wire line a, b is terminated with an impedance simulating network N. The incoming signal on the receive line E is fed into the impedance-simulating network N through a summing amplifier included in the simulating network, namely the amplifier stage VS2, and thus reaches the two-wire line a, b. Toward the transmit line S, the interface includes a transmitting amplifier SV which, on the one hand, evaluates the voltage across the two-wire line a, b by being connected as a differential amplifier and, on the other hand, adds an in-phase signal proportional to the voltage across the receive line E to compensate for that portion of the voltage across the two-wire line a, b which comes from the receive line E. A control-signal receiver SSE in the form of a Schmitt trigger compares the potential of the two-wire line a, b with a predetermined threshold value to derive a digital signal DS from a common-mode signal applied to the two-wire line a, b. In principle, instead of a digital signal, an analog signal could be transmitted as a common-mode signal. Prerequisites for this would be negligible common-mode interference signals and a control-signal receiver SSE in the form of an amplifier circuit rather than a Schmitt trigger. The fact that the two-wire line a, b is terminated for common-mode signals not in its characteristic impedance but in a resistance must be taken into account. (See Fig. 2, col. 4, lines 3-20).
Hershbarger suggests that the signals on telephone line tip conductor 418 and ring conductor 419 are AC coupled through capacitors 401 and 402 and resistively coupled through resistors 403 and 404 to the voltage divider that comprises resistors 405 and 406 and provides an input to amplifier 407. The voltage divider averages the voltages at nodes 422 and 423, providing the voltage about which the differential voltages at nodes 422 and 423 are centered. Amplifier 407 compares this voltage to reference voltage VREF and provides an output to both nodes 422 and 423 to adjust the center voltage. After having been AC coupled and balanced about VREF, the differential signal is applied to a pair of controlled-source low-pass active filters 706, 712 that provide a differential output signal across nodes 430 and 431. (See Figs. 4, 7A-7D, col.
Therefore, it would have been obvious to one skill in the art before the effective filing date of the invention to add or implement the low pass filters of Hershbarger for the differential amplifier and/or Schmitt circuit of Zanzig for comparing and compensating voltages across the two wire lines telecommunication to provide the best output result.
Claim 7. Zanzig fails to disclose wherein the cable connector interface is for a single twin-axial cable or a shielded twisted pair cable. However,
Zanzig teaches that the two-wire line a, b is terminated with an impedance simulating network N. The incoming signal on the receive line E is fed into the impedance-simulating network N through a summing amplifier included in the simulating network, namely the amplifier stage VS2, and thus reaches the two-wire line a, b. Toward the transmit line S, the interface includes a transmitting amplifier SV which, on the one hand, evaluates the voltage across the two-wire line a, b by being connected as a differential amplifier and, on the other hand, adds an in-phase signal proportional to the voltage across the receive line E to compensate for that portion of the voltage across the two-wire line a, b which comes from the receive line E. (See Figs. 1, 2, col. 3, lines 7-20).
Hershbarger suggests that traditionally, telephone subscriber lines have been twisted pair wires. The two conductors of the twisted pair are referred to as tip and ring. (see col. 1, lines 14-16).
Therefore, it would have been obvious to one skill in the art before the effective filing date of the invention to implement or user the twisted pair wires of Hershbarger to the two-wire line of Zanzig for protecting and securing normally as a traditional of telephone lines.
Claim 10. (Original) A bidirectional communication system comprising: a hub (read upon the physical of the telephone for covering and protecting the circuitries and electronic components); the preamplifier circuit of claim 1; and a single twin-axial cable or a shielded twisted pair cable connecting a hub front-end of the hub to the preamplifier circuit (as the combination between Zanzig and Hershbarger in respect to claims 1 and 7 above).
Claim 11. (Original) The bidirectional communication system of claim 10, wherein a power signal at the hub is transmitted from the hub front-end to the preamplifier circuit over the single twin-axial cable or the shielded twisted pair cable (as the combination between Zanzig and Hershbarger in respect to claims 5 and 7 above).
Claim 12. (Original) The bidirectional communication system of claim 10, further comprising: a sensor connected to the preamplifier circuit (as the combination between Zanzig and Hershbarger in respect to claim 5 above).
Claim 15. (Original) The bidirectional communication system of claim 10, wherein the
preamplifier circuit includes a sensor preamplifier (as the combination between Zanzig and Hershbarger in respect to claim 13 above).
Claim 16. (Original) The bidirectional communication system of claim 10, wherein the hub front-end comprises: a hub cable connector interface configured to connect to the single twin-axial cable or the shielded twisted pair cable (as the combination between Zanzig and Hershbarger in respect to claim 10 above);
a third resistor coupled at a first end to one of two hub lines coupled to the hub cable
connector interface and coupled at a second end to a voltage source (the resistor R8 connected to the voltage source at P1, see Fig. 2); and
a fourth resistor coupled to another one of the two hub lines at a corresponding first end
and coupled at a corresponding second end to the voltage source (the resistor R15 connected to the voltage source at P1, see Fig. 2).
Claim 17. (Original) The bidirectional communication system of claim 16, wherein the hub front-end further comprises: a hub resistor network coupled to the hub cable connector interface via the two hub lines; a hub transceiver coupled to the hub resistor network for simultaneous bidirectional communication; and a plurality of hub capacitors arranged between the hub resistor network and the hub transceiver (as the combination between Zanzig and Hershbarger in respect to claims 1, 10 above).
Claim 18. (Original) The bidirectional communication system of claim 17, wherein the hub simultaneously sends a clock signal to the preamplifier circuit and receives a data signal from the preamplifier circuit, and wherein the preamplifier circuit simultaneously receives the clock signal from the hub and sends the data signal to the hub (as the combination between Zanzig and Hershbarger in respect to claim 10 above, but
Zanzig fails to disclose the hub simultaneously sends a clock signal.
Hershbarger suggests that the present invention may be practiced with analog front end line interface circuit 301. The hybrid circuit of the present invention may be coupled to the tip and ring conductors of telephone line 309 to transmit a transmit signal to telephone line 309, to receive a combined signal from telephone line 309, and to provide a receive signal to signal processing circuit 302. Transmit, receive, and clock signals by the clock generation circuit 705 may be coupled across capacitors 303, 304, and 305 between analog front end line interface circuit 301 and signal processing circuit 302. (see Fig. 3, 7, col. 5, lines 58-68, col. 9, line 45).
Therefore, it would have been obvious to one skill in the art before the effective filing date of the invention to add or implement the clock signal generation circuit of Hershbarger to the two-wire/four-wire lines interface used in telephone and transmission of Zanzig for controlling operation functions of the two-wire telephone transmission using integrated circuitries in both analog and digital signals.
Claim 19. (Original) The bidirectional communication system of claim 17, wherein the
preamplifier circuit is provided in plurality, the hub comprising a corresponding plurality of hub front-ends (as the combination between Zanzig and Hershbarger in respect to claim 10 above, see Figs. 2 and 4 of Zanzig and Figs. 6, 7A-7C of Hershbarger.
Claims 9, 14, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Zanzig [US 5,293,421] and Hershbarger [US 5,602,912] and further in view of Miller et al [US 4,611,342]
Claim 9. Zanzig fails to disclose wherein the output signal of the transceiver is at least 20 Hz. However,
Zanzig teaches that the telephone includes frequency-response compensation, see Figs. 1, 2, col. 3, lines 39-43).
Miller et al suggests that in order to empirically match Z.sub.T, measurements were taken of the telephone impedance above a range of about 100 to 4000 Hz at a bias current of 16 ma. From this data a matching network according to the present invention was synthesized. Since telephone impedances vary from unit to unit, two adjustments connected to the RING and TIP lines are included in the network by way of the variable resistors 132 and 134 and 198 in order to improve the nominal matching. (See Figs. 1, 5A, col. 12, lines 56-68, col. 13, lines 1-15).
Therefore, it would have been obvious to one skill in the art before the effective filing date of the invention to add or implement the echo patch across the 100Hz to 4000Hz of Miller et al to the frequency-response compensation of Zanzig and Hershbarger for preventing cross talk and noises in the telephone communications.
Claim 14. Zanzig fails to disclose wherein the sensor includes a microphone.
Miller et al suggests that it is well known in the prior art to digitize the analog signal output of, e.g., a telephone microphone, representing a voice signal, in order to transmit the digital data over a telephone line. (See col. 1, lines 32-35).
Therefore, it would have obvious to one skill in the art to recognize that the telephone of Zanzig also include a microphone for receiving speech or voice signal from a user or object for transmitting it to the other ends or another telephone such as the telephone microphone of Miller et al.
Claim 20. (New) The preamplifier circuit of claim 2, wherein the power bus generates the DC power signal from a common-mode voltage on the two lines while the resistor network supports full duplex communication over the two lines (as cited in respect to claims 1 and 2 above, but
Zanzig fails to disclose the full duplex communication over the two lines.
Miller et al suggests that the output of the operational amplifier 202 is connected to a node 212, which is connected to a node 214 between the resistors 126 and 128, and forms the output for the signal to be passed through the two-wire to four-wire interface to the TIP line 14 for driving the telephone speaker in the full duplex system on the tip line 14. Node 212 is also connected to the four-wire interface 18 through an 18 Kohm resistor 216. (See Fig. 2, col. 7, lines 30-37).
Therefore, it would have been obvious to one skill in the art before the effective filing date of the invention to add or implement the full duplex telephone communications of Miller et al to the two-wire and/or four-wire telephone communication of Zanzig and Hershbarger for completion of both transmitting and receiving signals by the telephone, which is well known in the telephone communications industries.
Response to Arguments
Applicant’s arguments with respect to claims 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Examiner is very regrettable to introduce a new Non-Final rejection based upon the update search and added new references, as above.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Komarek et al discloses the telephone system comprising circuit attenuates echo caused by line variations and a transformerless, high DC impedance, two-wire line interface. To reduce echo, a test tone is introduced on the communication line with all station units connected to the line. The resultant receive signal is conditioned through a peak detector, digitized and read by a processor. The resistive and capacitive characteristics of a network are iterated by the processor and the results remeasured. An interfacing system capacitively couples a plurality of sources to a two-wire communication pair by means of a plurality of differential voltage-to-current amplifiers. Each source uses a differential receiving amplifier to receive signals from the line and is resistively coupled in parallel to all the sourcing entities coupled to the communication line at that particular interface. There is an echo balance network associated with each source. US 6,408,008]
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/VAN T TRIEU/
Primary Examiner, Art Unit 2685
10/09/2026
