Prosecution Insights
Last updated: August 06, 2026
Application No. 18/815,148

PREAMPLIFIER CIRCUIT WITH COUPLING FOR WIRED BIDIRECTIONAL COMMUNICATION WITH POWER

Non-Final OA §103
Filed
Aug 26, 2024
Examiner
TRIEU, VAN THANH
Art Unit
2685
Tech Center
2600 — Communications
Assignee
Interdisciplinary Consulting Corporation
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
925 granted / 1094 resolved
+22.6% vs TC avg
Moderate +14% lift
Without
With
+13.7%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
30 currently pending
Career history
1126
Total Applications
across all art units

Statute-Specific Performance

§101
3.3%
-36.7% vs TC avg
§103
46.2%
+6.2% vs TC avg
§102
36.2%
-3.8% vs TC avg
§112
4.1%
-35.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1094 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The disclosure is objected to because of the following informalities: in claim 1, line 7, abbreviation “DC” should be spelled out. Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 5, 6, 8, 9 are rejected under 35 U.S.C. 103 as being unpatentable over Irazoqui et al [US 2019/0247664] Claim 1. A preamplifier circuit (the Bionode system circuitry 170, 300 includes a power management board 101, 120 or 1007 and a main board 120 or 1008, see Figs. 1A, 1B, 3A, 10) comprising: a cable connector interface comprising coupling for two lines (the Bionode 170, 300 main board 101, 120 or 1007 comprises a dual-ended AEFs as two electrodes 302 or 1006 connected to cable, see Figs. 1, 3A, 10, TABLE-US-00001, para [0161, 0194]); a resistor network coupled to the cable connector interface via the two lines (the four resistors R connected to the cable electrodes, see Fig. 3A); a plurality of capacitors arranged between the resistor network and the transceiver (the main board 120 includes a plurality of capacitors C connected between the resistors and transceiver 129, see Figs. 1B, 3A); and a power bus coupled to the cable connector interface via the two lines for generating a DC power signal for the preamplifier circuit including the transceiver (the voltage regulator 108 to generate DC power lines 109 and 110, see Figs. 1B, 43, para [0141, 0387]). But Irazoqui et al fails to disclose a transceiver coupled to the resistor network for simultaneous bidirectional communication. However, Irazoqui et al discloses the main board 120 includes the four resistors connected to the circuitry 300 having two amplification stages 310 and 315 and to the microcontroller unit MCU 135 and to the bidirectional telemetry transceiver 129, see Fig. 1B, 3A, para [0145, 0146]). Therefore, it would have been obvious to one skill in the art to recognize that the main board circuitry 120 includes a plurality of resistors connected/coupled the transceiver 129 of the circuitry 300, which operates functionally as of the claim limitation transceiver coupled to the resistor network for simultaneously bidirectional communication, since the transceiver 129 generates bidirectional telemetry or communications. Claim 2. The preamplifier circuit of claim 1, wherein the plurality of capacitors comprises four capacitors, each capacitor on a corresponding line between the resistor network and the transceiver (the capacitors, see Fig. 3A). Claim 5. The preamplifier circuit of claim 1, further comprising: a sensor preamplifier having a sensor input, a data input, and a signal output, wherein the sensor preamplifier is coupled to the transceiver to receive a clock signal and output a data signal based on a sensor signal received at the sensor input (the system SoC employs the R-l2 converter due to its low power feature. The digital core sends the Sel RS signal to the R-I2 converter to select either the sensing element or the on-chip base resistor (Sel RS=0 selects the sensing element and Sel RS=1 selects base resistance). The measured output frequency of the R-F circuit corresponding to the on-chip base resistance was 360 KHz. FIG. 60 shows the measured periodic Sel RS signal, R-F converter output, reference oscillator clock, and digital data packets at a constant pressure. The measured data packets for the base frequency (30 bits), sensing element frequency 30 bits, and difference frequency 24 bits, see Fig. 58, para [0421]). Claim 6. The preamplifier circuit of claim 5, wherein the sensor preamplifier is further coupled to the power bus to receive the DC power signal (see Figs. 3A, 9, para [0161, 0162, 0192, 0193]). Claim 8. The preamplifier circuit of claim 1, wherein an output signal of the transceiver has a frequency sufficient to pass through the plurality of capacitors from the transceiver to the resistor network (see Figs. 3A, 9). Claim 9. The preamplifier circuit of claim 8, wherein the output signal of the transceiver is at least 20 Hz. (the waveform frequencies from 1 Hz to 150 Hz, See para [0133]). Claims 3, 4 are rejected under 35 U.S.C. 103 as being unpatentable over Irazoqui et al [US 2019/0247664] in view of Bonneville [US 7,236,600] Claim 3. The preamplifier circuit of claim 1, wherein the power bus comprises: a voltage regulator (the voltage regulator 108, see Figs. 1B, 43). But Irazoqui et al fails to disclose a first resistor coupled at a first end to one of the two lines and coupled at a second end to a node at an input of the voltage regulator; a second resistor coupled to another one of the two lines at a corresponding first end and coupled at a corresponding second end to the node; and a diode coupled to the node. However, Irazoqui et al indicates that the voltage regulator 108 is connected to the main board 120 via lines 109 and 110 as shown in Fig. 1B). Bonneville suggests that the power extraction circuit 76, shown in detail in FIG. 4, comprises a first transistor 110 with its collector connected to third conductor 26A(R1) and its emitter coupled to first conductor 26A(L1) by way of a capacitor 112. A resistor 114 and capacitor 116 are connected in series between the transistor emitter and first conductor 26A(L1). The capacitors 112 and 116 and resistor 114 form a filter to remove digital noise. A 5.6 volt Zener diode 118 and feed resistor 120 are connected in series between the conductors 26A(R1) and 26A(L1). The cathode of the Zener diode 118 is connected to the base of transistor 110 and, by way of a smoothing capacitor 122, to the local ground, i.e. conductor 26A(L1). The transistor 110 acts as a voltage follower with a voltage drop equivalent to that of one diode, and the 5 volt supply for the various components of the remote control unit is taken from the junction between resistor 114 and capacitor 116, on line 124. (See Fig. 4, col. 11, lines 9-25). Therefore, it would have been obvious to one skill in the art before the effective filing date of the invention to add or implement the circuitry connections of the voltage regulator to the two conductors to the resistor and to the transistor/diode of Bonneville to the voltage regulator coupled to the main board circuitry of Irazoqui et al for filtering to remove noise to provide a clean DC power output to the electrical components. Claim 4. The preamplifier circuit of claim 3, wherein the voltage regulator comprises a low pass filter (the AC voltages coupled onto each coil 905 are capable of being converted into both positive and negative DC voltages using the full wave rectifier 915. Subsequently, high amplitude voltages coming out of the rectifier 915 are clamped using diodes 916, so as to protect low-voltage circuitry on the Bionode. Furthermore, to provide stable voltage rails to the Bionode, resistor-capacitor-based low-pass filters 920 are implemented on both the positive and negative rectifier outputs to reduce coupled AC noise from non-idealities present in the rectifier 915. See Fig. 9, para [0193]). Claims 7, 10-19 are rejected under 35 U.S.C. 103 as being unpatentable over Irazoqui et al [US 2019/0247664] in view of Hershbarger [US 5,602,912] Claim 7. Irazoqui et al fails to disclose wherein the cable connector interface is for a single twin-axial cable or a shielded twisted pair cable. However, Irazoqui et al teaches that the TX test structure allowing frequency and current tuning is used to characterize its performance. A loop antenna with 2.4 mm diameter is fabricated on a FR4 printed circuit board (PCB). The TX die is directly wire-bonded to the antenna trace in order to minimize the effect of parasitics. Since the loop antenna is directly connected to the nodes X and Y of the VCPO (FIG. 51) and no buffers or PA were implemented, a direct probing of the TX output was not possible (see Fig. 51, para [0419]). Hershbarger suggests that the traditionally, telephone subscriber lines have been twisted pair wires. The two conductors of the twisted pair are referred to as tip and ring. Communication in both directions is provided by such lines. (See col. 1, lines 14-16). Therefore, it would have been obvious to one skill in the art before the effective filing date of the invention to substitute the twisted pair cables/wires of Hershbarger for the wire-bonded to the antenna of Irazoqui et al for minimizing space and to increase strength of cables/wires, which is very well known in the communication industries. Claim 10. A bidirectional communication system comprising: a hub (the base station 810, see Fig. 8]); the preamplifier circuit of claim 1; and a single twin-axial cable or a shielded twisted pair cable connecting a hub front-end of the hub to the preamplifier circuit (the Bionode 102, 302, 820 connected to the hub or base station 810 via the transmission cables 832 and 833, see Fig. 8, para [0185]), wherein the wires 832 and/or 833 can be a twisted pair cable/wire as discussed in respect to claim 7 above). Claim 11. The bidirectional communication system of claim 10, wherein a power signal at the hub is transmitted from the hub front-end to the preamplifier circuit over the single twin-axial cable or the shielded twisted pair cable (as discussed in respect to claims 7 and 10 above, see Fig. 8). Claim 12. The bidirectional communication system of claim 10, further comprising: a sensor connected to the preamplifier circuit (the Bionode circuitry includes temperature sensor, thermal sensor 123, blader sensors, see Figs. 1B, 6, 8, 22, para [0057, 0072, 0127, 0141]). Claim 13. The bidirectional communication system of claim 12, wherein the sensor receives the DC power signal generated by the power bus of the preamplifier circuit (as cited in respect to claim 12 above, and the sensors receiving DC power from the power management board 120, see Fig. 1B). Claim 15. The bidirectional communication system of claim 10, wherein the preamplifier circuit includes a sensor preamplifier (as cited in respect to claim 12 above, see Fig. 1B, 8). Claim 16. The bidirectional communication system of claim 10, wherein the hub front-end comprises: a hub cable connector interface configured to connect to the single twin-axial cable or the shielded twisted pair cable (as discussed in respect to claims 7 and 10 above); a third resistor coupled at a first end to one of two hub lines coupled to the hub cable connector interface and coupled at a second end to a voltage source (the Bionode circuitry includes a first resistor in low pass filters 920, shown in Figs. 8-10); and a fourth resistor coupled to another one of the two hub lines at a corresponding first end and coupled at a corresponding second end to the voltage source (the Bionode circuitry includes a second resistor in low pass filters 920, shown in Figs. 8-10). Claim 17. The bidirectional communication system of claim 16, wherein the hub front-end further comprises: a hub resistor network coupled to the hub cable connector interface via the two hub lines (as cited in respect to claim 12 above); a hub transceiver coupled to the hub resistor network for simultaneous bidirectional communication (the hub/base station 140, 810 includes a bidirectional transceiver 146 to provide handshake 817 and data transmission signal 832, see Figs. 1B, 8, para [00185-0189]); and a plurality of hub capacitors arranged between the hub resistor network and the hub transceiver (read upon the hub/base station 140, 810 includes a transceiver and tuning capacitors and MIM capacitor and resistor Ra, see Fig. 1B, 8, 51, 52, 54, para [0413-0416]). Claim 18. The bidirectional communication system of claim 17, wherein the hub simultaneously sends a clock signal to the preamplifier circuit and receives a data signal from the preamplifier circuit, and wherein the preamplifier circuit simultaneously receives the clock signal from the hub and sends the data signal to the hub (as cited in respect to claims 5 and 17 above). Claim 19. The bidirectional communication system of claim 17, wherein the preamplifier circuit is provided in plurality, the hub comprising a corresponding plurality of hub front-ends (the hub or base station 140 includes power output end and transceiver end, see Fig. 1B, or the hub or base station 810 includes Bionode packet CRC checker end 816 and Bionode base station handshake end 817, PC packet constructor end 813 and PC command handler end 814, see Fig. 8). Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Irazoqui et al [US 2019/0247664] Hershbarger [US 5,602,912] and further in view of Bonneville [US 7,236,600] Claim 14. Irazoqui et al fails to disclose wherein the sensor includes a microphone. However, Irazoqui et al teaches that the Biodode circuitry includes temperature sensor, thermal sensor 123, blader sensors, see Figs. 1B, 6, 8, 22, para [0057, 0072, 0127, 0141]). Bonneville suggests that in dashed lines, a modification to the interface unit 44 two alternative modifications to the remote unit 34A, which would permit intercom use, it being understood that similar modifications would be made to the other remote units 34B-34D. As shown in dashed lines in FIG. 3, remote control unit 34A could have a microphone 96A connected by way of a microphone amplifier 98A and intercom ON/OFF switch 99A (conveniently controlled by microcontroller 84) directly to the conductor 26A(R1) allowing transmission of voice signals via the conductors 26A(L1) and 26A(R1) to the interface unit 44. As shown in broken lines in FIG. 2, the interface unit 44 could then have a capacitor 104 or other suitable voice circuitry for extracting the voice signal and supplying it to an extra input (not shown), such as the microphone input MIC, of preamplifier unit 16, by way of a suitable connection 100 shown in broken lines in FIG. 1. (See Figs. 1-3, col. 12, lines 40-67, col. 13, lines 1-13). Therefore, it would have been obvious to one skill in the art before the effective filing date of the invention to add or substitute the microphone of Bonneville to one of the sensors of Irazoqui et al for expanding sensing and monitoring of a human body conditions such as breathing sounds and/or bleedings. Conclusion Any inquiry concerning this communication or earlier communications from 99number is (571) 2722972. The examiner can normally be reached on Mon-Fri from 8:00 AM to 3:00 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Mr. Wang Quan-Zhen can be reached on (571) 272-3114. Examiner interviews are available via telephone, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair- direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786- 9199 (IN USA OR CANADA) or 571-272-1000. /VAN T TRIEU/ Primary Examiner, Art Unit 2685 06/26/2026
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Prosecution Timeline

Aug 26, 2024
Application Filed
Jun 30, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
98%
With Interview (+13.7%)
2y 0m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1094 resolved cases by this examiner. Grant probability derived from career allowance rate.

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