Prosecution Insights
Last updated: August 18, 2026
Application No. 18/817,731

Basic Computing Unit, Mainboard, and Computing Device

Final Rejection §102§112
Filed
Aug 28, 2024
Priority
Feb 28, 2022 — CN 202210188349.7 +1 more
Examiner
WU, JAMES
Art Unit
2841
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Huawei Technologies Co., Ltd.
OA Round
2 (Final)
71%
Grant Probability
Favorable
3-4
OA Rounds
4m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
517 granted / 732 resolved
+2.6% vs TC avg
Strong +34% interview lift
Without
With
+33.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
23 currently pending
Career history
751
Total Applications
across all art units

Statute-Specific Performance

§103
53.0%
+13.0% vs TC avg
§102
19.0%
-21.0% vs TC avg
§112
23.4%
-16.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 732 resolved cases

Office Action

§102 §112
DETAILED ACTION Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “mounting structures” and “first mounting structure” in claims 1, 2, 13-16 and 21. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3, 4, 9-13, 15, 17 and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Flynn et al. (US 2008/0137284; hereinafter “Flynn”). Regarding claim 1, Flynn discloses a chassis (732, Fig. 7) comprising: basic computing units (computer components shown in Figs. 1-7) of different sizes (see Figs. 4, 5) comprising a first basic computing unit (110, 120, Fig. 1; 212, 222, Fig. 2, 300, Fig. 3; 412, 422, Fig. 4; 512, 522, Fig. 5), wherein the first basic computing unit comprises: a processor ([0039]: “…processors, and memory chips…”; also see Fig. 3); a memory ([0039]: “…processors, and memory chips…”; also see Fig. 3); and an external interface (140, Fig. 1; or 210, 220 or 214, Fig. 2) configured to provide communication for the first basic computing unit with an extension unit (160, Fig. 1); the extension unit configured to extend a function of the first basic computing unit ([0043]); and mounting structures comprising a first mounting structure configured to fasten the first basic computing unit to the chassis (not explicitly shown, but must have mounting structure around 140, 214 to secure onto backplane; also note that physical portion of connector 140, 214 can also be reasonably interpret as mounting structures, since mounting structures it’s a broad term), wherein a first position of the first mounting structure on the first basic computing unit is based on the processor, the memory, and a stress factor (see examiner’s note below regarding product-by-process claim), and wherein positions of the mounting structures on the basic computing units overlap (inherently true because mounting structures are overlapping along backplane 160, 730). *Note that the limitation, “a first position of the first mounting structure on the first basic computing unit is based on the processor, the memory, and a stress factor”, is considered a product-by-process claim. “[E]ven though product-by process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Regarding claim 3, Flynn discloses the chassis of claim 1, and Flynn further discloses wherein the external interface comprises a high-speed interface, and wherein the basic computing units are mounted on the chassis and coupled through the high speed interface ([0041-0043]; also note that high-speed is subjective). Regarding claim 4, Flynn discloses the chassis of claim 3, and Flynn further discloses wherein the basic computing units and the extension unit are coupled in a parallel-connected manner or a serial-connected manner (as shown in Figs. 2, 4, 5, 7; [0084-0085]). Regarding claim 9, Flynn discloses the chassis of claim 1, and Flynn further discloses wherein the first basic computing unit comprises a plurality of areas (plurality of areas in Figs. 1-5) based on a hardware configuration or a cabling layout on the first basic computing unit (see examiner’s note below regarding product-by-process claim). *Note that the limitation, “a first position of the first mounting structure on the first basic computing unit is based on a hardware configuration or a cabling layout on the first basic computing unit”, is considered a product-by-process claim. “[E]ven though product-by process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Regarding claim 10, Flynn discloses the chassis of claim 9, and Flynn further discloses wherein the areas comprise: a first area (such as 214 of 210, Fig. 2); a second area (such as backplane connector of 220, Fig. 2); and a third area (area of 212, 222, Fig. 2) located between the first area and the second area, wherein the first basic computing unit further comprises external interfaces located in the first area and the second area (as shown in Fig. 2), and wherein the processor and the memory are located in the third area (212, 222 have processor and memory, see [0044]: “… These computer components 212a-f and 222a-f may be micro-blades…”; see micro blades in Fig. 3). Regarding claim 11, Flynn discloses the chassis of claim 1, and Flynn further discloses wherein the basic computing units further comprise a second basic computing unit (such as 222, Fig. 2), and wherein the chassis further comprises: an ingress power supply (710, Fig. 7); and a component (such as connecting component on backplane 730 or 112, Fig. 7; note component is a broad term), wherein the external interface (210 or 220, Fig. 2) comprises: a management interface ([0052]: “ …baseboard management controller…”) configured to couple the first basic computing unit to the extension unit; a power interface configured to couple the first basic computing unit to the ingress power supply ([0081-0083]); and a high-speed interface configured to couple the first basic computing unit to the component or the second basic computing unit ([0017. 0064]; note that high speed is subjective). Regarding claim 12, Flynn discloses the chassis of claim 1, and Flynn further discloses wherein the basic computing units comprise different quantities of processors or different sizes of memories ([0006, 0039, 0060]). Regarding claim 13, Flynn discloses the chassis of claim 1, and Flynn further disclose a lining board (730 can be considered as a lining board), wherein the first basic computing unit is either mounted on the lining board or directly mounted on the chassis via the first mounting structure. Regarding claim 15, Flynn discloses a computing device comprising: a chassis (732, Fig. 7); and a mainboard (same as motherboard) located in the chassis and comprising: basic computing units (computer components shown in Figs. 1-7) of different sizes (see Figs. 4, 5) comprising a first basic computing unit (110, 120, Fig. 1; 212, 222, Fig. 2, 300, Fig. 3; 412, 422, Fig. 4; 512, 522, Fig. 5), wherein the first basic computing unit comprises: a processor ([0039]: “…processors, and memory chips…”; also see Fig. 3); a memory ([0039]: “…processors, and memory chips…”; also see Fig. 3); an external interface (140, Fig. 1; or 210, 220 or 214, Fig. 2) configured to provide communication for the first basic computing unit with an extension unit (160, Fig. 1); and mounting structures comprising a first mounting structure located in the first basic computing unit and configured to fasten the first basic computing unit to the chassis (not explicitly shown, but must have mounting structure around 140, 214 to secure onto backplane; also note that physical portion of connector 140, 214 can also be reasonably interpret as mounting structures, since mounting structures it’s a broad term), wherein a first position of the first mounting structure on the first basic computing unit is based on the processor, the memory, and a stress factor (see examiner’s note below regarding product-by-process claim), and wherein positions of the mounting structures on the basic computing units overlap (inherently true because mounting structures are overlapping along backplane 160, 730); and the extension unit configured to extend a function of the first basic computing unit ([0043]). *Note that the limitation, “a first position of the first mounting structure on the first basic computing unit is based on the processor, the memory, and a stress factor”, is considered a product-by-process claim. “[E]ven though product-by process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Regarding claim 17, Flynn discloses the computing device of claim 15, and Flynn further discloses wherein the external interface comprises a high-speed interface, wherein the basic computing units are mounted on the chassis and coupled through the high-speed interface ([0041-0043]; also note that high-speed is subjective), and wherein the basic computing units and the extension unit are coupled in a parallel-connected manner or a serial-connected manner (as shown in Fig. 7; [0084-0085]). Regarding claim 21, Flynn discloses a main board (same as motherboard) comprising: basic computing units (computer components shown in Figs. 1-7) of different sizes (see Figs. 4, 5) comprising a first basic computing unit (110, 120, Fig. 1; 212, 222, Fig. 2, 300, Fig. 3; 412, 422, Fig. 4; 512, 522, Fig. 5) comprising: a processor ([0039]: “…processors, and memory chips…”; also see Fig. 3); a memory ([0039]: “…processors, and memory chips…”; also see Fig. 3); and an external interface (140, Fig. 1; or 210, 220 or 214, Fig. 2) configured to provide communication for the first basic computing unit with an extension unit (160, Fig. 1); mounting structures comprising a first mounting structure configured to fasten the first basic computing unit to a chassis on which the first basic computing unit is located (not explicitly shown, but must have mounting structure around 140, 214 to secure onto backplane; also note that physical portion of connector 140, 214 can also be reasonably interpret as mounting structures, since mounting structures it’s a broad term), wherein a first position of the first mounting structure on the first basic computing unit is based on the processor, the memory, and a stress factor (see examiner’s note below regarding product-by-process claim), and wherein positions of the mounting structures on the basic computing units overlap (inherently true because mounting structures are overlapping along backplane 160, 730); and the extension unit configured to extend a function of the first basic computing unit ([0043]). *Note that the limitation, “a first position of the first mounting structure on the first basic computing unit is based on the processor, the memory, and a stress factor”, is considered a product-by-process claim. “[E]ven though product-by process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Allowable Subject Matter Claims 2, 5-8, 14, 16 and 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Re claim 2, prior arts do not teach or suggest the combination of the chassis of claim 2, in particular, distances among different mounting holes of the first mounting structure are an integer multiple of 10 millimeters (mm). Re claims 5-6, prior arts do not teach or suggest the combination of the chassis of claim 5, in particular, wherein the extension unit comprises management interfaces configured to couple the basic computing units in parallel to the extension unit. Re claims 7-8, prior arts do not teach or suggest the combination of the chassis of claim 7, in particular, wherein the extension unit comprises management interfaces configured to couple the basic computing units in series to the extension unit. Re claim 14, prior arts do not teach or suggest the combination of the chassis of claim 14, in particular, wherein the lining board comprises a self-clinching nut part, wherein the first basic computing unit is mounted on the lining board, and wherein a mounting height is based on a convex hull height of the self-clinching nut part. Re claim 16, prior arts do not teach or suggest the combination of the computing device of claim 16, in particular, distances between adjacent mounting holes of the first mounting structure do not exceed a preset range. Re claims 19-20, prior arts do not teach or suggest the combination of the computing device of claim 19, in particular, wherein the extension unit comprises management interfaces, and wherein the basic computing units are coupled in parallel to the extension unit through the management interfaces. Response to Arguments Applicant's arguments filed on 7/9/2026 have been fully considered but they are not persuasive. Applicant made the following argument: 1. Applicant alleges, regarding 112f interpretation, that Claim 1, 2, 13-16, and 21 are interpreted under 35 U.S.C. § 112(f) because the claims purportedly use a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. The Applicant respectfully traverses the Examiner's interpretation of "mounting structures" and "first mounting structure" under 35 U.S.C. § 112(f). The claims do not use the term "means," and therefore there is a rebuttable presumption that § 112(f) does not apply. Further, "mounting structure" is not a nonce term devoid of structure. Rather, the term denotes a physical structure used to mount and fasten a basic computing unit to a chassis. Consistent with its ordinary meaning, the specification describes mounting structures that include mounting holes and are used to physically secure the basic computing unit to a chassis. Accordingly, a person of ordinary skill in the art would understand "mounting structure" to connote sufficiently definite structure for performing the recited function, and therefore § 112(f) should not apply. Applicant respectfully requests withdrawal of the § 112(f) interpretation (response at pg. 12). Examiner respectfully disagrees. The claims currently do not recite sufficient structure to perform the recited function of “fasten”. If applicant do not want 112f interpretation, applicant should add sufficient structure to perform the claimed function. 2. Applicant alleges, regarding Flynn, that independent claims 1, 15, and 21 require that positions of mounting structures on basic computing units of different sizes overlap. The Examiner asserts that this limitation is inherent because mounting structures are allegedly overlapping along a backplane. See Office Action, p. 11. However, Flynn merely discloses modules coupled to a common backplane and does not disclose that mounting positions on differently sized basic computing units overlap. Nor has the Examiner identified any disclosure showing such an arrangement. Accordingly, Flynn fails to disclose all limitations of independent claims 1, 15, and 21, and therefore does not anticipate claims 1 As stated in the rejection, the mounting structures are interpreted as the physical portion of connector 140, and 214 can also be reasonably interpret as mounting structures. Thus, connectors inherently overlap along backplane 160, 730. See cropped Figs. 1 and 7 below. PNG media_image1.png 352 526 media_image1.png Greyscale PNG media_image2.png 348 505 media_image2.png Greyscale Thus, examiner respectfully disagrees with Applicant’s argument. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES WU whose telephone number is (571)270-7974. The examiner can normally be reached Monday - Friday, 9:00AM - 5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Allen Parker can be reached at (303)297-4722. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAMES WU/Primary Examiner, Art Unit 2841
Read full office action

Prosecution Timeline

Aug 28, 2024
Application Filed
Sep 18, 2024
Response after Non-Final Action
May 11, 2026
Non-Final Rejection mailed — §102, §112
Jul 09, 2026
Response Filed
Jul 30, 2026
Final Rejection mailed — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
71%
Grant Probability
99%
With Interview (+33.6%)
2y 4m (~4m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 732 resolved cases by this examiner. Grant probability derived from career allowance rate.

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