DETAILED ACTION
This action is in response to the Application filed on 08/28/2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Priority
Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d).
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 08/28/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claim(s) 9 is/are objected to because of the following informalities:
Claim(s) 9 recite(s) “the state of the second switching control signal”. It appears that it should be “a state of the second switching control signal”.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or
nonobviousness.
Claims 7 – 8 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over US Pub. No. 2024/0204676; (hereinafter Fu), cited by Applicant(s) in view of US Pub. No. 2006/0291117; (hereinafter Kyono).
Regarding claim 7, Fu [e.g. Fig. 1] discloses a bridge switching converter, comprising: an input node [e.g. 106], an output node [e.g. 101], and a reference node [e.g. 102], wherein the bridge switching converter is configured to receive an input voltage [e.g. VIN] between the input node and the reference node, and is configured to provide an output voltage [e.g. VOUT] between the output node and the reference node; a transformer [e.g. T1] having a primary winding [e.g. winding between 112 – 113 (Np)] and a secondary winding [e.g. winding between 107 – 108 (Ns)], the primary winding having a first terminal and a second terminal [e.g. 112 and 113 respectively], the secondary winding having a first terminal [e.g. 108], a second terminal [e.g. 107], and a center-tap [e.g. 103] positioned between the first and second terminals of the secondary winding; a primary switching circuit having a first input terminal [e.g. 106], a second input terminal [e.g. lower terminal of R1], a first bridge terminal [e.g. 104], a second bridge terminal [e.g. 105], a first switch [e.g. Q3], and a second switch [e.g. Q4], wherein the first input terminal of the primary switching circuit is coupled to the input node [e.g. 106], the second input terminal [e.g. lower terminal of R1] of the primary switching circuit is coupled to the output node [e.g. 101], the first bridge terminal [e.g. 104] is coupled to the first terminal of the primary winding [e.g. 112], the second bridge terminal [e.g. 105] is coupled to the second terminal of the primary winding [e.g. 113], the center-tap [e.g. 103] is coupled to the second input terminal of the primary switching circuit [e.g. lower terminal of R1], the second switch [e.g. Q4] is coupled between the first bridge terminal and the output node, and the first switch [e.g. Q3] is coupled between the input node and the first bridge terminal; and a controller [e.g. 110] configured to provide a first switching control signal [e.g. DRV_Q4] to control the second switch [e.g. Q4] and provide a second switching control signal [e.g. DRV_Q3] to control the first switch [e.g. Q3].
Fu fails to disclose to provide the first and second switching control signals based on the output voltage, wherein when the first switch remains off, the controller is configured to turn on the second switch based on the output voltage via the first switching control signal, and when the second switch remains off, the controller is configured to turn on the first switch based on the output voltage via the second switching control signal.
Kyono [e.g. Figs. 1 – 2; paragraph 09] teaches to provide the first and second switching control signals [e.g. VQ2gs and VQ1gs, respectively] based on the output voltage, wherein when the first switch remains off [e.g. Q1 OFF (Fig. 2)], the controller [e.g. Fig. 1; 7] is configured to turn on the second switch [e.g. Q2 ON] based on the output voltage [e.g. Vo using feedback 5] via the first switching control signal [e.g. VQ2gs; paragraph 010 recites “the switching elements Q1 and Q2 are alternately turned on/off by the gate signals VQ1gs and VQ2gs”], and when the second switch remains off [e.g. Q2 OFF (Fig. 2)], the controller is configured to turn on the first switch [e.g. Q1 ON (Fig. 2)] based on the output voltage [e.g. Vo using feedback 5] via the second switching control signal [e.g. VQ1gs; paragraph 08 recites “A feedback circuit 5 is connected to a connecting point of the smoothing capacitor C0 and the rectifier D0, and detects an output voltage of the smoothing capacitor C0 to output a detecting signal to a control circuit 7. The control circuit 7 controls the voltage of the load to be constant by alternately turning on/off the switching element Q1 and the switching element Q2 by pulse width modulation (PWM) control based on the detected voltage from the feedback circuit 5. In this case, voltage having a dead time is applied to each gate of the switching element Q1 and the switching element Q2 so as to alternately turn on/off the switching element Q1 and the switching element Q2”].
It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Fu by to provide the first and second switching control signals based on the output voltage, wherein when the first switch remains off, the controller is configured to turn on the second switch based on the output voltage via the first switching control signal, and when the second switch remains off, the controller is configured to turn on the first switch based on the output voltage via the second switching control signal as taught by Kyono in order of being able to regulate the output voltage by directly monitoring the output voltage so as to provide reliability.
Regarding claim 8, Fu [e.g. Fig. 1] discloses further comprising: a third switch [e.g. S1] and a fourth switch [e.g. S2], a first terminal of the third switch [e.g. upper terminal of S1] is coupled to the first terminal of the secondary winding [e.g. 108], a second terminal of the third switch [e.g. lower terminal] is coupled to the reference node [e.g. 102], a first terminal of the fourth switch [e.g. upper terminal of S2] is coupled to the second terminal of the secondary winding [e.g. 107], and a second terminal of the fourth switch [e.g. lower terminal of S2] is coupled to the reference node [e.g. 102].
Regarding claim 13, Fu [e.g. Fig. 1] discloses wherein the second bridge terminal [e.g. 105] is coupled to the input node through a first capacitor or a fifth switch [e.g. Q1], and is coupled to the output node through a second capacitor or a sixth switch [e.g. Q2].
Examiner's Note
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Allowable Subject Matter
Claims 1 – 6 and 14 – 20 are allowed
Claims 9 – 12 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The primary reason for the indication of the allowability of claim 1 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “the controller is configured to turn off the second and third switches until an ON-time period of the third switch or an ON-time period of the fourth switch reaches a first time period; and the controller is configured to turn off the first and fourth switches until an ON-time period of the first switch or an ON-time period of the fourth switch reaches a second time period”.
The primary reason for the indication of the allowability of claim 9 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein: the controller is configured to turn on the third switch in response to the state of the second switching control signal via the third switching control signal; …and is configured to turn on the fourth switch in response to the state of the first switching control signal via the fourth switching control signal.
The primary reason for the indication of the allowability of claim 10 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein when an ON-time period of the first switch reaches a first time period, the controller is configured to turn off the first switch via the second switching control signal, and when an ON-time period of the second switch reaches a second time period, the controller is configured to turn off the second switch via the first switching control signal”.
The primary reason for the indication of the allowability of claim 12 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the controller comprises: a comparison unit configured to provide a comparison signal based on an output voltage sensing signal and a reference signal, wherein the output voltage sensing signal represents the output voltage; an ON-time unit configured to provide a first ON-time control signal and a second ON-time control signal based on the input voltage, a first current sensing signal and a second current sensing signal, wherein the first current sensing signal represents a first current flows through a secondary side of the transformer while the second switch remains on, and the second current sensing signal represents a second current flows through the secondary side of the transformer while the first switch remains on; and a switching control unit configured to provide the first switching control signal based on the comparison signal, the first ON-time control signal and the second switching control signal, and provide the second switching control signal based on the comparison signal, the second ON-time control signal and the first switching control signal.”
The primary reason for the indication of the allowability of claim 14 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “the IC is configured to turn off the first switch via the first switching control signal until an ON-time period of the first switch reaches a first time period; and wherein when the first switch is off, …, and the IC is configured to turn off the second switch via the second switching control signal until an ON-time period of the second switch reaches a second time period.”.
Conclusion
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/ALEX TORRES-RIVERA/Primary Examiner, Art Unit 2838