DETAILED ACTION
This office action is in response to the application filed on 08/28/2024. Claims 1-20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, or 365(c) is acknowledged.
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Drawing
The drawing submitted on 08/28/2024 is acknowledged and accepted by the examiner.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 09/12/2024 has been considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
2018
Claims 1-4, 8-11, 15-18 are rejected under 35 U.S.C. 102(a)(1) and/or (a)(2) as being anticipated by Branover et al. (US Patent or PG Pub. No. 20120054519, hereinafter ‘519).
Claim 8, ‘519 teaches a device (e.g., see Fig. 1-10), comprising: a power management integrated circuit (PMIC) (e.g., the circuits comprising 5, 12), comprising:
a plurality of connecting points (e.g., the voltage outputting points of 5) configured to provide separate output voltages (e.g., the supply voltages of 11s provided by 5) from the power management integrated circuit to outside of the power management integrated circuit, the connecting points including a first connecting point (e.g., the corresponding point of the supply voltage of Core #1), and a second connecting point (e.g., the corresponding point of the supply voltage of Core #2, …, see Fig. 1); a plurality of voltage regulators (e.g., the corresponding regulators for supplying each respective core when corresponding core voltage planes are not shared, see [0035]) configured to power the connecting points; and a circuit (e.g., 20) programmable to store a first threshold (e.g., the respective SetV[M:0]) and configured to reduce, based on the first threshold, a first voltage (e.g., corresponding the supply voltage of Core #1) applied to the first connecting point (e.g., when corresponding operating point for core #1 being lowered, see [0035][0036], Fig. 1, 2, 4, 9).
Claim 9, ‘519 teaches the limitations of claim 8 as discussed above. It further teaches that wherein the circuit is configured to reduce the first voltage applied to the first connecting point without affecting the power management integrated circuit powering the second connecting point (e.g., the corresponding regulators for supplying each respective core when core voltage planes are not shared, see [0035], Fig. 1, 2).
Claim 10, ‘519 teaches the limitations of claim 8 as discussed above. It further teaches that wherein the circuit is further programmable to store a second threshold (e.g., the corresponding SetV[M:0] for core #2) and configured to reduce, based on the second threshold, a second voltage applied to the second connecting point (e.g., when corresponding operating point for core #1 being lowered, see [0035][0036], Fig. 1, 2, 9).
Claim 11, ‘519 teaches the limitations of claim 10 as discussed above. It further teaches that wherein the circuit is configured to reduce the first voltage applied to the first connecting point independently of the second threshold, and to reduce the second voltage applied to the second connecting point independently of the first threshold (e.g., when corresponding operating point for core #1 and core #2 being lowered respectively, see [0035][0036], Fig. 1, 2, 9).
Claim 15, ‘519 teaches a device (e.g., see Fig. 1-10), comprising: a plurality of voltage regulators (e.g., the corresponding regulators for supplying each respective core when corresponding core voltage planes are not shared, see [0035]) configured to provide, via a plurality of connecting points (e.g., the voltage outputting points of 5), separate output voltages (e.g., the supply voltages of 11s provided by 5) from the power management integrated circuit to outside of the power management integrated circuit (e.g., the supply voltage of Core #2, …, see Fig. 1), the connecting points including a first connecting point (e.g., the corresponding point of the supply voltage of Core #1), and a second connecting point (e.g., the corresponding point of the supply voltage of Core #2); and a circuit (e.g., 20) programmable to store a first threshold (e.g., the respective SetV[M:0]) and configured to reduce, based on the first threshold, a first voltage (e.g., corresponding the supply voltage of Core #1) applied to the first connecting point (e.g., when corresponding operating point for core #1 being lowered, see [0035][0036], Fig. 1, 2, 4, 9).
Claim 16, ‘519 teaches the limitations of claim 15 as discussed above. It further teaches that wherein the circuit is configured to reduce the first voltage applied to the first connecting point without affecting the power management integrated circuit powering the second connecting point (e.g., the corresponding regulators for supplying each respective core when core voltage planes are not shared, see [0035], Fig. 1, 2).
Claim 17, ‘519 teaches the limitations of claim 15 as discussed above. It further teaches that wherein the circuit is further programmable to store a second threshold (e.g., the corresponding SetV[M:0] for core #2) and configured to reduce, based on the second threshold, a second voltage applied to the second connecting point (e.g., when corresponding operating point for core #1 being lowered, see [0035][0036], Fig. 1, 2, 9).
Claim 18, ‘519 teaches the limitations of claim 17 as discussed above. It further teaches that wherein the circuit is configured to reduce the first voltage applied to the first connecting point independently of the second threshold, and to reduce the second voltage applied to the second connecting point independently of the first threshold (e.g., when corresponding operating point for core #1 and core #2 being lowered respectively, see [0035][0036], Fig. 1, 2, 9).
For method claims 1-4, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore the previous rejections based on the apparatus will not be repeated.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1,148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating
obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims under 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various claims was commonly owned at the time any inventions covered therein were made absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was not commonly owned at the time a later invention was made in order for the examiner to consider the applicability of 35 U.S.C. 103(c) and potential 35 U.S.C. 102(e), (f) or (g) prior art under 35 U.S.C. 103(a).
Claims 5-7, 12-14, 19-20 are rejected under 35 U.S.C. 103(a) as being unpatentable over Branover et al. (US Patent or PG Pub. No. 20120054519, hereinafter ‘519), in view of Lau et al. (US Patent or PG Pub. No. US 20170149325 A1, hereinafter ‘325).
Claims 5, 12, 19, ‘519 teaches the limitations of claims 1, 8, 15 as discussed above. ‘519 further discloses that wherein the voltage regulators include a first voltage regulator (e.g., the corresponding VR for generating supply of core #1, see Fig. 1).
‘519 does not explicitly disclose that the circuit includes a comparator configured to compare a voltage generated by the first voltage regulator to the first threshold to control reducing of the first voltage applied to the first connecting point.
‘325 discloses a first voltage regulator circuit (e.g., 120 of 100, [0035], Fig. 1-6) including a comparator (e.g., 634) configured to compare a voltage generated by the first voltage regulator to a first threshold (e.g., Step 224, 270, the output voltage, see [0035], Fig, 2) to control reducing of the first voltage applied to the first connecting point (e.g., step 224, 230, 270, 280, see [0035], Fig, 2-3).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date to modify the circuit by including the comparator as injection voltage from which a DC component is removed as taught by ‘325 in order of being able to control, including reducing when desired, the output voltage of the voltage regulation circuit (e.g., step 280, see [0035], Fig, 2-3).
Claims 6, 13, the combination of ‘519 and ‘325 teaches the limitations of claims 5, 12 as discussed above.
‘519 does not explicitly disclose that wherein an output of the comparator is configured to, when the voltage generated by the first voltage regulator is higher than the first threshold, prevents the first voltage regulator to power up the first connecting point.
‘325 discloses a first voltage regulator circuit (e.g., 120 of 100, [0035], Fig. 1-3) including a comparator (e.g., 634) configured to, when the voltage generated by the first voltage regulator is higher than the first threshold, prevents the first voltage regulator to power up the first connecting point (e.g., step 224, 230, 270, 280, see [0035], Fig, 2-4).
‘325 reads the same obviousness as discussed in claims 5, 12, 19 rejections above.
Claims 7, 14, 20, the combination of ‘519 and ‘325 teaches the limitations of claims 6, 13, 19 as discussed above.
‘519 does not explicitly disclose that wherein the circuit includes a bleeder which when activate reduces the voltage generated by the first voltage regulator.
‘325 discloses further discloses that the circuit (e.g., 120 of 100, [0035], Fig. 1-3) including a bleeder (e.g., 634, steps 224, 230, 270, 280, that the output voltage Vout of the circuits of 100 discharged coursed by 120/125 when deactivation of the power supply circuit activated, see [0021][0035], Fig. 1-3) which when activate reduces the voltage generated by the first voltage (e.g., see [0035], Fig, 1-6).
‘325 reads the same obviousness as discussed in claims 5, 12, 19 rejections above.
Examiner's Note:
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUE ZHANG whose telephone number is (571)270-1263. The examiner can normally be reached on M-F: 8:30AM-5:00PM
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/JUE ZHANG/
Primary Examiner, Art Unit 2838
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