Prosecution Insights
Last updated: July 17, 2026
Application No. 18/818,666

TRANSMITTER, POWER CONTROL CIRCUITRY, AND POWER CONTROL METHOD

Non-Final OA §102§103
Filed
Aug 29, 2024
Priority
Nov 24, 2023 — TW 112145585
Examiner
AKINYEMI, AJIBOLA A
Art Unit
Tech Center
Assignee
Realtek Semiconductor Corporation
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
757 granted / 943 resolved
+20.3% vs TC avg
Strong +18% interview lift
Without
With
+18.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
23 currently pending
Career history
967
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
86.3%
+46.3% vs TC avg
§102
6.6%
-33.4% vs TC avg
§112
0.8%
-39.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 943 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 6-8, 11, 12, 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Langer (Pub. No.: US 2017/0094608 A1). With respect to claim 1: Langer discloses a transmitter (fig. 2, item 240), comprising: a power control circuitry configured to generate a first signal and perform a closed-loop power control according to the first signal to adjust a power of the first signal (fig. 2, item 230 is a power control circuitry); and a front-end circuitry configured to amplify the first signal to generate a second signal (fig.1, item 108 is a front end with power amplify as in parag. 0036) and output the second signal via an antenna (fig. 1, item 110 which is the antenna). With respect to claims 2, 12: Langer discloses the transmitter of claim 1, wherein when the power control circuitry performs the closed-loop power control, the power control circuitry does not adjust an amplification gain of the front-end circuitry (parag. 0007-0009, 0039). With respect to claims 6, 16: Langer discloses the transmitter of claim 1, wherein the closed-loop power control is independent of the front-end circuitry (parag. 0061). With respect to claim 7: Langer discloses a power control circuitry, comprising: a transmitter circuit configured to output a first signal (fig. 2, item 240), wherein the first signal is further amplified by a front-end circuitry to generate a second signal (fig.1, item 108 is a front end with power amplify that amplify first signal as in parag. 0036); and a closed-loop power control circuit configured to detect a power of the first signal and perform a closed-loop power control according to the power of the first signal to adjust the power of the first signal (fig. 2, item 230 is a power control circuitry that perform closed loop power control), wherein the closed-loop power control is independent of the front-end circuitry (parag. 0061). With respect to claim 8: Langer discloses the power control circuitry of claim 7, wherein the closed-loop power control circuit does not receive a signal from the front-end circuitry (fig. 2 shows that the closed loop does not receive from front end). With respect to claim 11: Langer discloses a power control method, comprising: amplifying, by a front-end circuitry, a first signal to generate a second signal (fig.1, item 108 is a front end with power amplify that amplify first signal as in parag. 0036); and outputting the second signal via an antenna; and generating, by a power control circuitry, the first signal and performing a closed-loop power control according to the first signal to adjust a power of the first signal (fig. 2, item 230 is a power control circuitry that adjust the power of the first signal). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 3, 13 are rejected under 35 U.S.C. 103 as being unpatentable over Langer (Pub. No.: US 2017/0094608 A1) as applied to claim 1 above, and further in view of Rahman (Pub. No.: US 2006/0170499A1). With respect to claims 3, 13: The rejection of claim 1 is incorporated; Langer does not explicitly disclose wherein the power control circuitry is configured to detect the power of the first signal, generate a digital code according to the power of the first signal, and perform the closed-loop power control according to the digital code. Rahman discloses power control circuitry is configured to detect the power of the first signal, generate a digital code according to the power of the first signal, and perform the closed-loop power control according to the digital code (parag. 0003 and 0023). It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to utilize the teaching of Rahman into the teaching of Langer in order to provide a gain compensated detected signal. Allowable Subject Matter Claims 4, 5, 9, 10, 14, 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AJIBOLA A AKINYEMI whose telephone number is (571)270-1846. The examiner can normally be reached Monday-Friday 8:00am-5:00pm, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, YUWEN PAN can be reached at (571)-272-7855. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AJIBOLA A AKINYEMI/Primary Examiner, Art Unit 2649
Read full office action

Prosecution Timeline

Aug 29, 2024
Application Filed
Jun 24, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
99%
With Interview (+18.5%)
2y 9m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 943 resolved cases by this examiner. Grant probability derived from career allowance rate.

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