CTNF 18/819,058 CTNF 96844 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1, 3 - 9 are rejected under 35 U.S.C. 103 as being unpatentable over Fujiwara et al. (US 11838013 and Fujiwara hereinafter.) in view of Yamaji et al. (US 20190074828 A1 and Yamaji hereinafter.) further in view of Wu et al. (CN 110958001 A and Wu hereinafter.) . Regarding claim 1, Fujiwara disclose [fig. 2] drive circuitry [1] that normally-off drives a transistor circuitry which is constituted of a normally-on-type first transistor [col 2 lines 34-44, Q1] and a normally-off-type second transistor [col 2 lines 34-44, col 5 lines 57-67, Q2] connected in series [as shown], wherein a power source voltage wiring for applying a power source voltage [VDD] is connected between the first transistor and the second transistor [as shown], and the drive circuitry comprises: a diode [10] in which an anode is connected to a drive terminal of the first transistor [as shown] and a cathode is connected to an output terminal of the second transistor [SOURCE]. Fujiwara discloses further control circuitry which switches the second transistor between an ON state and an OFF state [Q2 driven by 30]. Fujiwara does not explicitly disclose a third transistor which is disposed between the power source voltage wiring and the drive terminal of the first transistor, a fourth transistor which is disposed between a ground, having a reference potential that becomes a reference for the power source voltage, and the drive terminal of the first transistor, a fifth transistor which is disposed between the drive terminal of the first transistor and the fourth transistor, and a control circuitry which switches each of the third transistor, the fourth transistor, and the fifth transistor between an ON state and an OFF state. However, Yamaji discloses [fig. 1] a third transistor [TR1] which is disposed between the power source voltage wiring [14] and the drive terminal of the first transistor [S1], a fourth transistor [TR2] which is disposed between a ground [GND2], having a reference potential that becomes a reference for the power source voltage [15], and the drive terminal of the first transistor [as shown]. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date to modify the invention as described by Fujiwara to include a third transistor which is disposed between the power source voltage wiring and the drive terminal of the first transistor, a fourth transistor which is disposed between a ground, having a reference potential that becomes a reference for the power source voltage, and the drive terminal of the first transistor as taught by Yamaji to improve switching reliability of a high-side switching device. Fujiwara in view of Yamaji does not explicitly disclose a fifth transistor which is disposed between the drive terminal of the first transistor and the fourth transistor, and a control circuitry which switches each of the fifth transistor between an ON state and an OFF state. However, Wu discloses [fig. 3] a fifth transistor [Q1] which is disposed between the drive terminal of the first transistor [S1] and the fourth transistor [unlabeled voltage source placing driving voltage at U1]. Wu discloses further control circuitry which switches the fifth transistor between an ON state and an OFF state [COM1 controlling Q1]. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date to modify the invention as described by Fujiwara in view of Yamaji to include a fifth transistor which is disposed between the drive terminal of the first transistor and the fourth transistor, and a control circuitry which switches each of the fifth transistor between an ON state and an OFF state as taught by Wu to improve power consumption of a switching device. Regarding claim 3, Fujiwara in view of Yamaji further in view of Wu discloses further comprising: a resistive element [Yamaji, RG1] which is disposed between the drive terminal of the first transistor and the third transistor [as shown]. Regarding claim 4, Fujiwara in view of Yamaji further in view of Wu discloses further wherein the third transistor and the fourth transistor are connected to each other in series [as shown in fig. 1, of Yamaji]. Regarding claim 5, Fujiwara in view of Yamaji discloses all the features regarding claim 3 as indicated above. Fujiwara in view of Yamaji does not explicitly disclose wherein a wiring portion connecting the third transistor and the resistive element and a wiring portion connecting the fourth transistor and the fifth transistor are insulated from each other. However, it would have been obvious to one having ordinary skill in the art before the effective filing date to have a wiring portion connecting the third transistor and the resistive element and a wiring portion connecting the fourth transistor and the fifth transistor being insulated from each other by replacing a common node between the two wiring portions with a resistor. Regarding claim 6, Fujiwara in view of Yamaji further in view of Wu discloses all the features regarding claim 1 as indicated above. Fujiwara in view of Yamaji further in view of Wu does not explicitly disclose a semiconductor chip which has the diode, the third transistor, the fourth transistor, the fifth transistor, and the control circuitry . However, it would have been obvious to one having ordinary skill in the art before the effective filing date to disclose a semiconductor chip which has the diode, the third transistor, the fourth transistor, the fifth transistor, and the control circuitry by referencing the abstract of Yamaji. Regarding claim 7, Fujiwara discloses a semiconductor device [fig. 2] comprising: a drive circuitry [1] which normally-off drives a transistor circuitry which is constituted of a normally-on-type first transistor [col 2 lines 34-44, Q1] and a normally-off-type second transistor [col 2 lines 34-44, Q2] connected in series [as shown]; and the transistor circuitry which is normally-off driven by the drive circuitry, wherein a power source voltage wiring for applying a power source voltage [VDD] is connected between the first transistor and the second transistor [as shown], the drive circuitry has a diode [10] in which an anode is connected to a drive terminal of the first transistor [as shown] and a cathode is connected to an output terminal of the second transistor [SOURCE]. Fujiwara discloses further Fujiwara discloses further control circuitry which switches the second transistor between an ON state and an OFF state [Q2 driven by 30]. Fujiwara does not explicitly disclose a third transistor which is disposed between the power source voltage wiring and the drive terminal of the first transistor, a fourth transistor which is disposed between a ground, having a reference potential that becomes a reference for the power source voltage, and the drive terminal of the first transistor, a fifth transistor which is disposed between the drive terminal of the first transistor and the fourth transistor, and a control circuitry which switches each of the third transistor, the fourth transistor, and the fifth transistor between an ON state and an OFF state. However, Yamaji discloses [fig. 1] a third transistor [TR1] which is disposed between the power source voltage wiring [14] and the drive terminal of the first transistor [S1], a fourth transistor [TR2] which is disposed between a ground [GND2], having a reference potential that becomes a reference for the power source voltage [15], and the drive terminal of the first transistor [as shown]. Yamaji discloses further control circuitry which switches the third and fourth transistor between an ON state and an OFF state [12 controlling TR1 and TR2]. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date to modify the invention as described by Fujiwara to include a third transistor which is disposed between the power source voltage wiring and the drive terminal of the first transistor, a fourth transistor which is disposed between a ground, having a reference potential that becomes a reference for the power source voltage, and the drive terminal of the first transistor. Control circuitry which switches the third and fourth transistor between an ON state and an OFF state as taught by Yamaji to improve switching reliability of a high-side switching device. Fujiwara in view of Yamaji does not explicitly disclose a fifth transistor which is disposed between the drive terminal of the first transistor and the fourth transistor, and the control circuitry which switches the fifth transistor between an ON state and an OFF state. However, Wu discloses [fig. 3] a fifth transistor [Q1] which is disposed between the drive terminal of the first transistor [S1] and the fourth transistor [unlabeled voltage source placing driving voltage at U1]. Wu discloses further control circuitry which switches the fifth transistor between an ON state and an OFF state [COM1 controlling Q1]. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date to modify the invention as described by Fujiwara in view of Yamaji to include a fifth transistor which is disposed between the drive terminal of the first transistor and the fourth transistor, and the control circuitry which switches the fifth transistor between an ON state and an OFF state as taught by Wu to improve a power system by reducing power consumption of a switching device. Regarding claim 8, Fujiwara in view of Yamaji further in view of Wu discloses all the features regarding claim 7 as indicated above. Fujiwara in view of Yamaji further in view of Wu does not explicitly disclose further comprising: a semiconductor package which is constituted of the drive circuitry and the transistor circuitry sealed in one package. However, it would have been obvious to one having ordinary skill in the art before the effective filing date to disclose a semiconductor package which is constituted of the drive circuitry and the transistor circuitry sealed in one package by referencing the abstract of Yamaji. Regarding claim 9, Fujiwara in view of Yamaji further in view of Wu discloses further comprising: a half-bridge circuitry which is constituted of the two transistor circuitries connected to each other in series [Fujiwara, Q1 and Q2 wired as a traditional half bridge circuit as shown in fig. 2] . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 2 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 12-151-07 AIA 07-97 12-51-07 Claim 11 is allowed. 13-03 AIA The following is an examiner’s statement of reasons for allowance: Claim 11 is allowed because the prior art of record does not disclose nor render obvious “…a path in which a current flows from the second terminal toward the first terminal through the drive circuitry and the drive terminal of the first transistor serves as a second path when the switching element is in an OFF state during a switching operation of the transistor circuitry and the switching element…” as cited with the rest of the claimed limitation . Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure, Zhu (US 10984722 B2) is cited to teach a gate driving controller for use in switching ON or OFF of switching transistors . Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES G YEAMAN whose telephone number is (571)272-5580. The examiner can normally be reached Mon - Fri 954 Schedule. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached at (571) 270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAMES G YEAMAN/Examiner, Art Unit 2836 /TAELOR KIM/Supervisory Patent Examiner, Art Unit 2836 Application/Control Number: 18/819,058 Page 2 Art Unit: 2836 Application/Control Number: 18/819,058 Page 3 Art Unit: 2836 Application/Control Number: 18/819,058 Page 4 Art Unit: 2836 Application/Control Number: 18/819,058 Page 5 Art Unit: 2836 Application/Control Number: 18/819,058 Page 6 Art Unit: 2836 Application/Control Number: 18/819,058 Page 7 Art Unit: 2836 Application/Control Number: 18/819,058 Page 8 Art Unit: 2836 Application/Control Number: 18/819,058 Page 9 Art Unit: 2836
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