Prosecution Insights
Last updated: October 01, 2026
Application No. 18/819,349

Light Valve System with Gap Maintenance System

Final Rejection §103§112
Filed
Aug 29, 2024
Priority
Sep 01, 2023 — provisional 63/580,158
Examiner
GROUX, JENNIFER LILA
Art Unit
1754
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Seurat Technologies Inc.
OA Round
2 (Final)
35%
Grant Probability
At Risk
3-4
OA Rounds
1y 2m
Est. Remaining
74%
With Interview

Examiner Intelligence

Grants only 35% of cases
35%
Career Allowance Rate
46 granted / 132 resolved
-30.2% vs TC avg
Strong +39% interview lift
Without
With
+39.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
36 currently pending
Career history
186
Total Applications
across all art units

Statute-Specific Performance

§101
1.8%
-38.2% vs TC avg
§103
46.6%
+6.6% vs TC avg
§102
14.1%
-25.9% vs TC avg
§112
31.9%
-8.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 132 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Claims 1-2 and 4-23 are pending. Claim 3 is canceled. Claims 10-18 and 21-23 remain withdrawn. In view of the amendment, filed 07/20/2026, the following objections and rejections are withdrawn from the previous Office Action mailed 04/21/2026: Claim objections Claim rejections under 35 U.S.C. 102 and 103 Nonstatutory double patenting rejections New grounds of rejection are necessitated by claim amendments. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 2 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Amended claim 1 recites that the first substrate “comprises a reflective layer positioned in contact with the first semiconductor layer to form a reflective light valve.” Claim 2 depends from amended claim 1 and recites that “the first substrate further comprises a first semiconductor transparent electrode layer positioned in contact with the first semiconductor layer to form a transmissive light valve.” Previously, claims 2 and 3 were directed to different disclosed embodiments of the light valve (Fig. 1A depicting a transmissive light valve vs Fig. 1B depicting a reflective light valve). There is no description in the disclosure that corresponds to the configuration of present claim 2 where these particular embodiments are combined in a manner as claimed. As such, the full scope of present claim 2 is not adequately supported by the original disclosure. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 2 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Amended claim 2 reflects an embodiment not described in the original disclosure, as set forth above, and thus is unclear as to the scope of the light valve being both a reflective light valve and a transmissive light valve as a result of the claimed structures and their relative arrangements (i.e., both a reflective layer and a transparent layer in contact with the first semiconductor layer to form a reflective light valve and a transmissive light valve). Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 1-2, 4-5, and 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Burgess, US 20120105773 A1, in view of Leard et al., US 20220128848 A1 (references of record). Regarding claim 1, Burgess discloses a light valve (light valve assembly 21, Fig. 4) comprising: A liquid crystal layer (layer between 23 and 23a comprised of liquid crystal 24 and spacers 25, Fig. 4, [0029]-[0030]) having a first and a second side (left and right sides of layer as shown in Fig. 4), A first substrate (layers to left of liquid crystal layer comprised of PR layer 23 and ITO coating, Fig. 4, [0029]-[0030]) positioned in contact with the first side of the liquid crystal layer (Fig. 4), with the first substrate having a first semiconductor layer (photoresistor layer 23, Fig. 4, [0029]; the photoconductive/photoresistor layer comprising a semiconductor such as BSO, [0014], [0029]-[0030]); and A second substrate (layers to right of liquid crystal layer comprised of PR layer 23a and ITO coating, Fig. 4, [0029]-[0030]) positioned in contact with the second side of the liquid crystal layer (Fig. 4), with the second substrate having a second semiconductor transparent electrode layer (ITO coating on glass electrode 22, Fig. 4, [0030]) and a second semiconductor layer (photoresistor layer 23a, Fig. 4, [0029]; the photoconductive/photoresistor layer comprising a semiconductor such as BSO, [0014], [0029]-[0030]); and A plurality of laser transparent aperture support structures (spacer balls 25 being glass beads defining the aperture/gap between PR layers, Fig. 4, [0029]-[0030]) positioned within the liquid crystal layer to contact both the first and the second substrate (the balls/beads contact both PR layers and liquid crystal is filled into the gap, [0030], Fig. 4). Burgess does not disclose the first substrate further comprises a reflective layer positioned in contact with the first semiconductor layer to form a reflective light valve. In the analogous art, Leard discloses a composite light valve comprising first and second substrates sandwiching a liquid crystal layer in a transmissive configuration (Fig. 1J, [0057]). Leard teaches that inclusion of a reflective coating in contact with a first semiconductor layer (photoconductor layer 140J) can produce an alternative reflective configuration ([0057]). Leard teaches a reflective layer can be used to avoid degradation of a liquid crystal layer in the presence of certain wavelengths ([0055]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the light valve of Burgess such that the first substrate further comprises a reflective layer positioned in contact with the first semiconductor layer to form a reflective light valve in order to produce an alternative configuration which could reduce degradation of the liquid crystal layer, as taught by Leard. Regarding claim 2, modified Burgess discloses the light valve of claim 1, and Burgess discloses the first substrate further comprises a first semiconductor transparent electrode layer (ITO coating on glass electrode 22, Fig. 4, [0030]) positioned in contact with the first semiconductor layer (Fig. 4, [0030]) to form a transmissive light valve (the light valve being selectively transmissive, [0007]). Regarding claim 4, modified Burgess discloses the light valve of claim 1, and Burgess discloses the gap into which the liquid crystal is filled is 15 microns as defined by the spacer beads between the PR layers ([0030]). Accordingly, the thickness of the liquid crystal layer is around 15 microns, which is entirely within the range of less than 100 microns thick. Regarding claim 5, modified Burgess discloses the light valve of claim 1. Burgess discloses each of the substrates comprises an ITO coating ([0016]-[0017], [0030]) and a PR layer ([0030]). Burgess discloses the PR layers are 0.3 mm thick ([0030]). Burgess is silent as to a thickness of the ITO coating and thus does not specifically disclose each of the substrates is less than 1 mm thick. In the analogous art, Leard discloses liquid crystal light valves ([0002], [0027], [0034]) and teaches that transparent conductive oxide layers, such as an ITO layer, are typically less than 50 nm ([0042]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to specify the ITO layer in Burgess was less than 50 nm as a typical dimension for such layers with a reasonable expectation of success in configuring the light valve, as taught by Leard. Note that where the only difference between the prior art and the claims is a recitation of relative dimensions, and a device having the claimed relative dimensions would not perform differently than the prior art device, then the claimed device is not patentably distinct. MPEP 2144.04(IV)(A). In implementing the modification, each of the substrates would then have been around 0.3 mm + <50 nm thick, which is entirely within the claimed range of less than 1 mm thick. Regarding claim 7, modified Burgess discloses the light valve of claim 1, and Burgess discloses the plurality of laser transparent aperture support structures comprise spacer balls positioned within the liquid crystal layer and sized to maintain a uniform gap between the first and second substrates (spacer balls 25 that are 15 micron glass beads defining the gap into which the liquid crystal is filled, [0030], Fig. 4). Regarding claim 8, modified Burgess discloses the light valve of claim 1, and Burgess discloses the first and second substrates and the liquid crystal layer are attached to form a monolithic block (Fig. 4, [0030]). Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Burgess, US 20120105773 A1, in view of Leard et al., US 20220128848 A1, as applied to claim 1, with evidentiary support from Kim et al., Electrical, optical, and structural characteristics of ITO thin films, and Lawrence Livermore National Laboratory (“LLNL”), Ultrawide Bandgap Materials in the Spotlight (of record). Regarding claim 6, modified Burgess discloses the light valve of claim 1, and Burgess discloses each of the substrates comprises at least one of a wide bandgap and ultrawide bandgap semiconductor material (each substrate comprises ITO and BSO, [0029]-[0030], each of which is a wide bandgap material as evidenced by Kim: ITO is a wide band gap semiconductor, Introduction, first paragraph; and LLNL: BSO is a wide bandgap material, p. 8, left column first paragraph). Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Burgess, US 20120105773 A1, in view of Leard et al., US 20220128848 A1, as applied to claim 1 above, in view of Furushima et al., US 5644373 A, alone or alternatively further in view of Piliavin et al., US 4256382 A (references of record). Regarding claim 9, modified Burgess discloses the light valve of claim 1. Burgess is silent as to the first and second substrates and the liquid crystal layer having their respective coefficients of thermal expansion (CTEs) matched to be within 10% of each other. In the analogous art, Furushima discloses a liquid crystal device (Abstract) such as a light valve (col. 1, lines 11-14) and teaches configuring the substrates enclosing the liquid crystal to have thermal expansion coefficients to be within 10% of each other (col. 2, lines 32-36). Furushima teaches that matching the thermal expansion coefficients to be similar reduces the influence of a heat history during the assembly process and allows for restrictions on processing temperature to be relaxed (col. 8, lines 50-55). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to specify at least the first and second substrates being CTE matched to be within 10% of each other in order to reduce the influence of a heat history between the parts and allow for restrictions on processing temperatures to be relaxed, as taught by Furushima. Furushima does not specifically teach the first and second substrates being also matched with the liquid crystal layer to the same extent; however, in following the teachings to thermally match different layers of the light valve stack it would have been obvious to one of ordinary skill in the art to apply the same logic to the liquid crystal layer between the substrates to achieve the same beneficial effect of a similar thermal behavior, as taught by Furushima, such that the liquid crystal layer was also CTE matched to be within 10% of the substrates. One of ordinary skill in the art seeking to minimize differences in thermal behavior between layers of the light valve stack would also have considered an influence of the liquid crystal layer present between the substrates. Alternatively, in the analogous art, Piliavin discloses liquid crystal devices having uniform thermal expansion coefficients (Abstract) and teaches matching the thermal expansion of the liquid crystal layer to have substantially the same thermal expansion as the materials to which it is connected in order to prevent warp or deterioration over time (col. 1, line 55 – col. 2, line 13). As such, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further specify the liquid crystal layer also being CTE matched to the first and second substrates within 10% of each other in order to provide the materials having substantially similar thermal expansion behavior to prevent warp or deterioration over time, as taught by Piliavin. Claim(s) 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Leard et al., US 20220128848 A1, in view of Burgess, US 20120105773 A1. Regarding claim 19, Leard discloses an additive manufacturing system (additive manufacturing system 300, Fig. 3, [0075]) comprising: A laser system (laser source and amplifier(s) 312, Fig. 3, [0075]); a powder bed (bed 346 containing powder material 344, Fig. 3, [0075]); and a light valve (laser patterning unit 316 comprising a light valve, Fig. 3, [0075], [0077]) positioned to pattern light received from the laser system and direct the patterned light to the powder bed (Fig. 3). Leard does not detail structure of the light valve in the referenced embodiment and thus does not disclose the recited structure in this embodiment. Leard further discloses a light valve (composite light valve, Fig. 1J, [0057]) comprising: A liquid crystal layer (EO layer 130J, Fig. 1J, [0057]; the EO material being a liquid crystal material, [0034]-[0036]) having a first and a second side (left and right sides of layer 130J as shown in Fig. 1J), A first substrate (layers to left of EO layer 130J, Fig. 1J) positioned in contact with the first side of the liquid crystal layer (Fig. 1J), with the first substrate having a first semiconductor layer (photoconductor layer 140J, Fig. 1J, [0057]; the photoconductor being a semiconductor such as bismuth silicate oxide (BSO), [0038]-[0039]); and A second substrate (layers to right of EO layer 130J, Fig. 1J) positioned in contact with the second side of the liquid crystal layer (Fig. 1J), with the second substrate having a second semiconductor transparent electrode layer (TCO layer 112J, Fig. 1J; TCO being a transparent conductive oxide, [0037], [0042]), Wherein the first substrate further comprises a reflective layer positioned in contact with the first semiconductor layer to form a reflective light valve (reflective coating in contact with photoconductor 140J, [0057]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the specific structure of the disclosed light valve in the patterning system including a generic light valve in order to utilize a known structure suitable for the light patterning application as disclosed by Leard. Leard does not disclose the light valve includes a second semiconductor layer and a plurality of laser transparent aperture support structures positioned within the liquid crystal layer to contact both the first and the second substrate. In the analogous art, Burgess discloses a light valve as set forth above for claim 1 comprising an additional second semiconductor layer as part of a second substrate in contact with a second side of a liquid crystal layer 24 (photoresistor layer 23a, Fig. 4, [0029]; the photoconductive/photoresistor layer comprising a semiconductor such as BSO, [0014], [0029]-[0030]); and a plurality of laser transparent aperture support structures (spacer balls 25 being glass beads defining the aperture/gap between PR layers, Fig. 4, [0029]-[0030]) positioned within the liquid crystal layer to contact both the first and the second substrate (the balls/beads contact both PR layers and liquid crystal is filled into the gap, [0030], Fig. 4). Burgess discloses the second semiconductor layer improves light valve performance ([0010], [0013]) and the laser transparent aperture support structures form a supported gap between substrates into which the liquid crystal layer can be filled ([0030]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the light valve of Leard to include a second semiconductor layer and a plurality of laser transparent support structures positioned within the liquid crystal layer to contact both the first and the second substrate in order to improve the performance of the light valve and define an appropriately sized gap for the liquid crystal layer between substrates as taught by Burgess. Regarding claim 20, modified Leard discloses the system of claim 19, and Leard discloses the light valve is configured to form a two-dimensional light pattern (light valve is part of patterning unit 316 to form patterned light, [0075], [0077]). Response to Arguments Applicant's arguments filed 07/20/2026 have been fully considered but they are not persuasive. Regarding claim 1, Applicant acknowledges that Leard teaches a reflective structure having a reflective layer but argues (p. 7) that it is not obvious how to modify the light valve structure of Burgess to implement such a reflective structure. Applicant points to another embodiment (Fig. 1H) of Leard and argues that the identification of the “first semiconductor layer” and “first substrate” is not obvious in the context of the description of a “photoconductor layer” and an “alignment layer.” This argument is not found persuasive. Burgess and Leard both disclose light valves having similar arrangements and using similar materials. Each includes a photoconductor layer that is a semiconductor layer (e.g., Burgess: BSO PR layer, [0029]-[0030], Leard: photoconductor layer typically being BSO, [0038]-[0039]) and an alignment layer adjacent the semiconductor layer (Burgess: [0030], Leard: [0057], Fig. 1J). Leard teaches providing the reflective layer adjacent the semiconductor layer ([0057]). The claimed “first substrate” was mapped in the claim rejection to the layers to the left of the liquid crystal layer as depicted in Fig. 4 of Burgess, which applicant does not argue, and the proposed modification to include a reflective layer in contact with the semiconductor layer of this substrate would have been in line with the teachings of Leard. Other than a first semiconductor layer and a reflective layer in contact with said first semiconductor layer, the claimed “first substrate” is not limited to any particular structure, and the applied combination addresses the claimed structure. Furthermore, the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). Applicant argues that claim 19 is amended similar to claim 1 and thus is patentable for the same reasons. The examiner notes that while the same references are applied, the grounds of rejection are different between claim 19 and claim 1, and there are no arguments specific to the different rejection of claim 19. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JENNIFER L GROUX whose telephone number is (571)272-7938. The examiner can normally be reached Monday - Friday: 9am - 5pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Susan Leong can be reached at (571) 270-1487. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.L.G./Examiner, Art Unit 1754 /LARRY W THROWER/Primary Examiner, Art Unit 1754
Read full office action

Prosecution Timeline

Aug 29, 2024
Application Filed
Apr 21, 2026
Non-Final Rejection mailed — §103, §112
Jul 20, 2026
Response Filed
Sep 15, 2026
Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
35%
Grant Probability
74%
With Interview (+39.3%)
3y 3m (~1y 2m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 132 resolved cases by this examiner. Grant probability derived from career allowance rate.

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