Prosecution Insights
Last updated: October 02, 2026
Application No. 18/820,179

RADIO FREQUENCY TRANSCEIVER CIRCUIT AND ASSOCIATED CIRCUIT SET FOR PERFORMING DIGITAL PRE-DISTORTION COMPENSATION

Non-Final OA §103
Filed
Aug 29, 2024
Priority
Sep 06, 2023 — TW 112133783
Examiner
NGUYEN, HAI V
Art Unit
Tech Center
Assignee
Realtek Semiconductor Corporation
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
796 granted / 963 resolved
+22.7% vs TC avg
Minimal +4% lift
Without
With
+4.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
18 currently pending
Career history
978
Total Applications
across all art units

Statute-Specific Performance

§101
3.3%
-36.7% vs TC avg
§103
41.9%
+1.9% vs TC avg
§102
27.6%
-12.4% vs TC avg
§112
17.3%
-22.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 963 resolved cases

Office Action

§103
DETAILED ACTION This Office action is in response to the application filed on 29 August 2024. Claims 1-10 are presented for examination. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-10 are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. US Patent No. 9,762,268 B2. As to claim 1, Yang discloses substantially the invention as claimed, including a radio frequency (RF) transceiver circuit (Figures 2-6, wireless transceiver, title), comprising: a transmission circuit 142 (Figures 2-6, the TX circuit thru elements 11-12-13), arranged to generate a transmission signal, wherein the transmission signal is transmitted to an antenna (an antenna 40) through a first pin P1 (the output point of the Upconverter 13); a reception circuit 144 (Figures 2-6, the RX circuit thru elements 21-22-23), arranged to receive a reception signal through a second pin P2 (just before the input point of the Low Noise Amplifier (LNA) 21 after the RX Switch 30); and a pre-distortion processing circuit 146 (Figures 2-6, the Pre-distortion processing elements 80-90-70-11), arranged to receive a feedback signal through a third pin P3 (the output point of the ADC 23), and calculate distortion information of the transmission signal according to the feedback signal in order to generate and transmit a compensation signal to the transmission circuit for performing a pre-distortion compensation operation, wherein the feedback signal is generated according to a coupling signal of the transmission signal (Figures 2-6 and associated text, the coupler 50 indicates the feedback signal generated and traveled thru the coupler 50). As to claim 2, Yang discloses, wherein the pre-distortion processing circuit 146 comprises: a first filter 220, arranged to filter the feedback signal to generate a filtered signal; a mixer 230, arranged to perform a frequency down-conversion operation upon the filtered signal via an oscillation signal to generate a mixed signal; a second filter 250, arranged to perform a low-pass filtering operation upon the mixed signal to generate a low-pass filtered signal (In light of instant [17]-[18], it is obvious to an ordinary skill in the art to understand the Yang’s downconverter 22 (= instant elements 230-240-250) has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23); an Analog-to-Digital Converter 260 (Figures 2-6, the ADC converter 23), arranged to perform an Analog-to-Digital Conversion operation upon the low-pass filtered signal to generate a digital signal (Figures 2-6, and associated text; In light of instant [17]-[18], it is obvious to an ordinary skill in the art to understand the Yang’s downconverter 22 (= instant elements 230-240-250) has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23 generating a digital signal), and a Digital Processing Circuit 270 (Figures 2-6, the Digital Pre-Distorter 11), arranged to calculate the distortion information of the transmission signal according to the digital signal, and generate and transmit the compensation signal to the transmission circuit for performing the pre-distortion compensation operation (Figures 2-6, and associated text; In light of instant [17]-[18], the Yang’s downconverter 22 has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23 and the Digital Pre-Distorter (DPD) 11 may implement pre-distortion processing on the input signal according to the preset coefficient of the pre-distortion model, as to compensate for nonlinear distortion of the power amplifier PA 14, (col. 4, lines 24-31; col. 7, lines 45-60)). As to claim 3, Yang discloses, wherein the pre-distortion processing circuit 146 comprises: a single ended-to-differential converter 320, arranged to convert the feedback signal into a differential signal (It would have been obvious to one of ordinary skill in the art that the claimed element of “a single ended-to differential converter” is well-known to be utilized in the receiver 110 as shown in Figure 1, 2, illustrating that “the RF signal may be differential signal or a single-ended signal. The receive pins 112, 114 may be coupled to the antenna 115 via a transformer (not shown) configured to convert a single-ended RF signal from the antenna 115 into a differential RF signal at the receiver pins 112 and 114” in Singh et al. US patent No. 12,136,920 B2 in Figure 1,2 and (col. 13 line 9- 30, and col. 4, lines 14-49)); a first filter 330, arranged to filter the differential signal to generate a filtered signal; a mixer 340, arranged to perform a frequency down-conversion operation upon the filtered signal via an oscillation signal to generate a mixed signal; a second filter 360, arranged to perform a low-pass filtering operation upon the mixed signal to generate a low-pass filtered signal (In light of instant [17]-[18], it is obvious to an ordinary skill in the art to understand the Yang’s downconverter 22 (= instant elements 340-350-360) has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23); an analog-to-digital converter 370 (Figures 2-6, the ADC converter 23), arranged to perform an analog-to-digital conversion operation upon the low-pass filtered signal to generate a digital signal (Figures 2-6, and associated text; In light of instant [17]-[18], it is obvious to an ordinary skill in the art to understand the Yang’s downconverter 22 (= instant elements 230-240-250) has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23 generating a digital signal); and a digital processing circuit 380 (Figures 2-6, the Digital Pre-Distorter 11), arranged to calculate the distortion information of the transmission signal according to the digital signal in order to generate and transmit the compensation signal to the transmission circuit for performing the pre-distortion compensation operation (Figures 2-6, and associated text; In light of instant [17]-[18], the Yang’s downconverter 22 has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23 and the Digital Pre-Distorter (DPD) 11 may implement pre-distortion processing on the input signal according to the preset coefficient of the pre-distortion model, as to compensate for nonlinear distortion of the power amplifier PA 14, (col. 4, lines 24-31; col. 7, lines 45-60)). As to claim 4, Yang discloses, wherein the reception circuit comprises: a low-noise amplifier 430; a transformer 440; and a mixer 450; wherein when the RF transceiver circuit operates in a reception mode, the reception signal is processed by the low-noise amplifier, the transformer, and the mixer in sequence (It would have been obvious to one of ordinary skill in the art that the receiver 110 as shown in Figure 1, 2, illustrating that “the LNA 130, the attenuator 120, the mixer 135, the filter 140 and the ADC 150, wherein the attenuator 120 may be also be used in the receiver 110 coupled to a Power Amplifier in a pre-distortion or correction loop, in which case the attenuator 120 may need to have high power – handling capability …” in Singh et al. US patent No. 12,136,920 B2 in Figure 1,2 and (col. 13 line 9- 30, and col. 4, lines 14-49)); wherein when the RF transceiver circuit operates in a test mode, the pre-distortion processing circuit calculates the distortion information of the transmission signal according to the feedback signal by the mixer, for generating and transmitting the compensation signal to the transmission circuit to perform the pre-distortion compensation operation (It would have been obvious to one of ordinary skill in the art that the receiver 110 as shown in Figure 1, 2, illustrating that “the LNA 130, the attenuator 120, the mixer 135, the filter 140 and the ADC 150, wherein the attenuator 120 may be also be used in the receiver 110 coupled to a Power Amplifier in a pre-distortion or correction loop, in which case the attenuator 120 may need to have high power – handling capability …” in Singh et al. US patent No. 12,136,920 B2 in Figure 1,2 and (col. 13 line 9- 30, and col. 4, lines 14-49)). As to claim 5, Yang discloses, wherein the pre-distortion processing circuit comprises: a first filter 520, arranged to filter the feedback signal to generate a filtered signal, wherein the transformer and the mixer in the reception circuit process the filtered signal to generate a mixed signal; a second filter 570, arranged to perform a low-pass filtering operation upon the mixed signal to generate a low-pass filtered signal (It would have been obvious to one of ordinary skill in the art that the receiver 110 as shown in Figure 1, 2, illustrating that “the LNA 130, the attenuator 120, the mixer 135, the filter 140 and the ADC 150, wherein the attenuator 120 may be also be used in the receiver 110 coupled to a Power Amplifier in a pre-distortion or correction loop, in which case the attenuator 120 may need to have high power – handling capability …” in Singh et al. US patent No. 12,136,920 B2 in Figure 1,2 and (col. 13 line 9- 30, and col. 4, lines 14-49)); an analog-to-digital converter 580 (Figures 2-6, the ADC converter 23), arranged to perform an analog-to-digital conversion operation upon the low-pass filtered signal to generate a digital signal (Figures 2-6, and associated text; In light of instant [17]-[18], it is obvious to an ordinary skill in the art to understand the Yang’s downconverter 22 (= instant elements 230-240-250) has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23 generating a digital signal); and a digital processing circuit 590 (Figures 2-6, the Digital Pre-Distorter 11), arranged to calculate the distortion information of the transmission signal according to the digital signal in order to generate and transmit the compensation signal to the transmission circuit for performing the pre-distortion compensation operation (Figures 2-6, and associated text; In light of instant [17]-[18], the Yang’s downconverter 22 has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23 and the Digital Pre-Distorter (DPD) 11 may implement pre-distortion processing on the input signal according to the preset coefficient of the pre-distortion model, as to compensate for nonlinear distortion of the power amplifier PA 14, (col. 4, lines 24-31; col. 7, lines 45-60)). As to claim 6, Yang discloses, wherein the pre-distortion processing circuit comprises: an isolation circuit 534, coupled between the second pin and an input terminal of the low-noise amplifier, and arranged to attenuate intensity of noise from the second pin (It would have been obvious to one of ordinary skill in the art that the attenuator 120 and a matching network 125 (which is equivalent to the instant isolation circuit) coupled between the pins 112, 114 and an input of the LNA 130 in the receiver 110 as shown in Figure 1, 2, 6 and associated text that associated with the mixer 135 to generate the mixed signals” in Singh et al. US patent No. 12,136,920 B2 in Figure 1,2 and (col. 13 line 9- 30, and col. 4, lines 14-49 and col. 6, line 37 – col. 9, line 47)). As to claim 7, Yang discloses, wherein the pre-distortion processing circuit comprises: a single ended-to-differential converter 320, arranged to convert the feedback signal into a differential signal (It would have been obvious to one of ordinary skill in the art that the claimed element of “a single ended-to differential converter” is well-known to be utilized in the receiver 110 as shown in Figure 1, 2, illustrating that “the RF signal may be differential signal or a single-ended signal. The receive pins 112, 114 may be coupled to the antenna 115 via a transformer (not shown) configured to convert a single-ended RF signal from the antenna 115 into a differential RF signal at the receiver pins 112 and 114” in Singh et al. US patent No. 12,136,920 B2 in Figure 1,2 and (col. 13 line 9- 30, and col. 4, lines 14-49)); a first filter 330, arranged to filter the differential signal to generate a filtered signal, wherein the mixer in the reception circuit processes the filtered signal to generate a mixed signal; a second filter 360, arranged to perform a low-pass filtering operation upon the mixed signal to generate a low-pass filtered signal (In light of instant [17]-[18], it is obvious to an ordinary skill in the art to understand the Yang’s downconverter 22 (= instant elements 340-350-360) has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23); an analog-to-digital converter 370 (Figures 2-6, the ADC converter 23), arranged to perform an analog-to-digital conversion operation upon the low-pass filtered signal to generate a digital signal (Figures 2-6, and associated text; In light of instant [17]-[18], it is obvious to an ordinary skill in the art to understand the Yang’s downconverter 22 (= instant elements 230-240-250) has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23 generating a digital signal); and a digital processing circuit 380 (Figures 2-6, the Digital Pre-Distorter 11), arranged to calculate the distortion information of the transmission signal according to the digital signal in order to generate and transmit the compensation signal to the transmission circuit for performing the pre-distortion compensation operation (Figures 2-6, and associated text; In light of instant [17]-[18], the Yang’s downconverter 22 has the same technical functions and a signal output end of the down converter 22 is connected to a signal input end of the ADC 23 and the Digital Pre-Distorter (DPD) 11 may implement pre-distortion processing on the input signal according to the preset coefficient of the pre-distortion model, as to compensate for nonlinear distortion of the power amplifier PA 14, (col. 4, lines 24-31; col. 7, lines 45-60)). As to claim 8, Yang discloses a circuit set, comprising: a radio frequency (RF) transceiver circuit 140 (Figures 2-6, the wireless transceiver), comprising a first pin (the output point of the Upconverter 13), a second pin (just before the input point of the Low Noise Amplifier (LNA) 21 after the RX Switch 30), and a third pin (the output point of the ADC 23) (Figures 2-6, and associated text); an external front-end module (eFEM) 120, comprising a power amplifier (Figures 2-6, the PA 14) and a low-noise amplifier (Figures 2-6, the LNA 21), wherein the power amplifier is arranged to amplify a transmission signal from the first pin for transmitting through an antenna; and the low-noise amplifier is arranged to receive a signal through the antenna to generate and transmit a reception signal to the second pin (Figures 2-6, and associated text); a coupler 110 (Figures 2-6, the coupler 50), arranged to generate a coupling signal according to the transmission signal (Figures 2-6, and associated text, the coupler 50 generates a coupling signal based on the transmission signal); and a matching circuit 130, arranged to generate and transmit a feedback signal to the third pin (the output point of the ADC 23) according to the coupling signal in order for the RF transceiver circuit to perform a pre-distortion compensation operation (Figures 2-6 and associated text, “because a signal becomes a high-power signal after being amplified by the PA 14, power needs to be reduced when the observer is working, where to implement this function, the coupler 50 performs signal attenuation; a low-power signal obtained after the attenuation passes through the second control switch 60 to the downconverter 22 for underclocking, and is then converted by the ADC 23 into a digital based band signal; and the digital based signal is fed back to the algorithm module 70 through to the first signal output end of the ADC 23; the algorithm module 70 acquires a coefficient of a -re-distortion model according to the feedback signal and the input signal, that, calculates a specific distortion degree, to form an adjustment model for the input signal, and controls the DPD 11 module to perform specific adjustment on the input signal” (col. 7, lines 45-60)). As to claim 9, Yang discloses, wherein the RF transceiver circuit comprises: a transmission circuit 142 (Figures 2-6, the TX circuit thru elements 11-12-13), arranged to generate the transmission signal, wherein the transmission signal is transmitted to the eFEM through the first pin (the output point of the Upconverter 13); a reception circuit 144 (Figures 2-6, the RX circuit thru elements 21-22-23), arranged to receive the reception signal through the second pin (just before the input point of the Low Noise Amplifier (LNA) 21 after the RX Switch 30); and a pre-distortion circuit 146 (Figures 2-6, the Pre-distortion processing elements 80-90-70-11), arranged to receive the feedback signal from the third pin, and calculate distortion information of the transmission signal according to the feedback signal, to generate and transmit the compensation signal to the transmission circuit for performing the pre-distortion compensation operation (Figures 2-6 and associated text, the coupler 50 indicates the feedback signal generated and traveled thru the coupler 50, (col. 7, lines 45-60)). As to claim 10, Yang discloses, wherein the matching circuit comprises a resistance matching circuit and/or an attenuator (Figures 2-6 and associated text, (col. 7, lines 45-60)). The prior art cited in this Office action is: Yang et al. US Patent # 9,762,268 B2; Singh et al. US patent No. 12,136,920 B2. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAI V NGUYEN whose telephone number is (571)272-3901. The examiner can normally be reached M-F 6:00AM -3:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kevin Pan can be reached at 571-272-7855. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center/ for more information about Patent Center and https://www.uspto.gov/patents/docx/ for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HAI V NGUYEN/Primary Examiner, Art Unit 2649
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Prosecution Timeline

Aug 29, 2024
Application Filed
Aug 26, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
87%
With Interview (+4.3%)
2y 6m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 963 resolved cases by this examiner. Grant probability derived from career allowance rate.

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