DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in Japan on September 1, 2023. It is noted, however, that applicant has not filed a certified copy of the JP2023-142085 application as required by 37 CFR 1.55.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
a determination circuit configured to… in claim 1.
a determination circuit configured to… in claim 6.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 6, and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoshida US 20170225454 A1, Yamada US 20200406610 A1, and Fujisawa US 20170173948 A1.
Regarding claim 1 Yoshida teaches:
a head unit (Paragraph 0093, “Also, in the reciprocating, ink drops are appropriately ejected from respective inkjet heads 100 of the head units 35”) comprising:
an ejection unit that includes a piezoelectric element driven by a drive signal and that is configured to eject a liquid in accordance with drive of the piezoelectric element (Paragraph 0298, "The ink jet head 100A illustrated in FIG. 44 vibrates a vibration plate 212 by driving a piezoelectric element 200, and ejects ink (liquid) in a cavity 208 from nozzles 203"),
a waveform shaping circuit to which a first residual vibration signal corresponding to a residual vibration caused by the drive signal is input, and which is configured to output a second residual vibration signal obtained by shaping a waveform of the first residual vibration signal (Paragraph 0141, "The waveform shaping circuit 15 outputs the residue vibration waveform to the determination section 20 as a square wave"; Wherein the square wave outputted by the waveform shaping circuit of Yoshida is the second residual wave of the present claim),
a determination circuit configured to determine a state of the ejection unit (Paragraph 0191, "the determination section 20 determines whether the ejection is normal or abnormal"),
the determination circuit is configured to determine the state of the ejection unit based on the second residual vibration signal (Paragraph 0128, "the determination section 20 detects and determines the ejection abnormality of the respective inkjet heads 100 included in the respective head units 35 of the typing section 3 based on the cycle or the like of the measured residue vibration").
Yoshida does not disclose:
a temperature detection circuit configured to output a temperature information signal corresponding to a temperature of the waveform shaping circuit,
the determination circuit is configured to determine the state of the ejection unit based on the temperature information signal.
However, Yamada teaches a temperature detection circuit which detects a temperature of the drive signal selection control circuit and the integrated circuit and outputs a corresponding temperature information (Paragraph 0173, "The temperature detection circuit 250 detects the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and generates and outputs temperature information TH corresponding to the detected temperatures"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Yoshida to a temperature detection circuit configured to output a temperature information signal corresponding to a temperature of the waveform shaping circuit to allow a signal to be outputted when the temperature exceeds a predetermined threshold, as taught by Yamada (Paragraph 0173, “The temperature detection circuit 250 may detect the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and output both a voltage value corresponding to the detected temperatures and a signal indicating whether the detected temperatures exceed a predetermined threshold as the temperature information TH”).
Furthermore, Yamada teaches that the temperature detection circuit determines whether the temperature state is appropriate based on a predetermined threshold value, and emit a signal if that value is exceeded (Paragraph 0173, " The temperature detection circuit 250 may detect the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and output both a voltage value corresponding to the detected temperatures and a signal indicating whether the detected temperatures exceed a predetermined threshold as the temperature information TH"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have that the determination circuit would determine the state of the ejection unit based on the temperature information signal, as taught by Yamada, to prevent the temperature from exceeding the predetermined threshold.
Modified Yoshida further fails to disclose:
the waveform shaping circuit includes an amplifier circuit configured to amplify the first residual vibration signal and a gain setting circuit configured to set a gain of the amplifier circuit, and is configured to output the second residual vibration signal based on a signal amplified by the amplifier circuit,
the amplifier circuit and the gain setting circuit are configured as a single semiconductor device, and
However, Fujisawa teaches a waveform shaping circuit including a gain adjustment circuit and a low pass filter, having an operational amplifier, and generates a residual vibration signal based on a difference signal (Paragraphs 0183-0184, "As illustrated in FIG. 12, the waveform shaping circuit 202 includes a low pass filter 23, a gain adjustment circuit 24, and a buffer 25 and the waveform shaping circuit 202 generates the residual vibration signal NSA on the basis of the difference signal Vdif… The low pass filter 23 includes an operational amplifier OP4…"). It is clear that one could use the same waveform shaping circuit taught by Fujisawa, having an amplifier and a low pass filter, to generate a residual vibration signal based on a first residual vibration signal. Furthermore, Fujisawa discloses that the amplifier circuit and the gain setting circuit are configured as a single semiconductor device, since these elements are on the same detection circuit (Paragraph 0176, “As illustrated in FIG. 12, the detection circuit 20 includes a difference signal generation circuit 201 which generates a difference signal Vdif indicating a difference between a potential indicated by the signal Out1 and a potential indicated by the signal Out2, and a waveform shaping circuit 202 which adjusts the amplitude of the difference signal Vdif and generates the residual vibration signal NSA by eliminating a noise component in the difference signal Vdif”; Figure 12). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention include an amplifier circuit to amplify the first residual vibration signal and a gain setting circuit configured to set a gain of the amplifier circuit, as well as to configure the amplifier circuit and the gain setting circuit as a single semiconductor device, in order to adjust the amplitude and eliminate a noise component of the inputted signal, as well as to make the detection circuit compact, as taught by Fujisawa (Paragraph 0175, “…a waveform shaping circuit 202 which adjusts the amplitude of the difference signal Vdif and generates the residual vibration signal NSA by eliminating a noise component in the difference signal Vdif”).
Regarding claim 2,
Yoshida does not disclose that at least a part of the temperature detection circuit may be provided to the semiconductor device.
However, Yamada teaches that the temperature detection circuit is provided on the integrated circuit (Paragraph 0156, “As illustrated in FIG. 6, the integrated circuit 362 includes the restoration circuit 210, the drive signal selection control circuit 200, and a temperature detection circuit 250”; Figure 6, Items 362 and 250). Therefore, it would be obvious to one of ordinary skill in the art to provide that the temperature detection circuit may be provided to the semiconductor device, as taught by Yamada, to have the components provided in a compact device.
Regarding claim 6, Yoshida teaches:
a liquid ejection apparatus (Paragraph 0010, “According to an aspect of the invention, there is provided a liquid discharging apparatus…”) comprising:
a head unit configured to eject a liquid onto a medium (Paragraph 0093, “Also, in the reciprocating, ink drops are appropriately ejected from respective inkjet heads 100 of the head units 35”),
a control unit configured to control an operation of the head unit (Paragraph 0063, “The controller 6 controls the operation of each component of the ink jet printer 1”),
the head unit includes an ejection unit that includes a piezoelectric element driven by a drive signal and that is configured to eject a liquid in accordance with drive of the piezoelectric element (Paragraph 0298, "The ink jet head 100A illustrated in FIG. 44 vibrates a vibration plate 212 by driving a piezoelectric element 200, and ejects ink (liquid) in a cavity 208 from nozzles 203"),
a waveform shaping circuit to which a first residual vibration signal corresponding to a residual vibration caused by the drive signal is input, and which is configured to output a second residual vibration signal obtained by shaping a waveform of the first residual vibration signal (Paragraph 0141, "The waveform shaping circuit 15 outputs the residue vibration waveform to the determination section 20 as a square wave"; Wherein the square wave outputted by the waveform shaping circuit of Yoshida is the second residual wave of the present claim),
a determination circuit configured to determine a state of the ejection unit (Paragraph 0191, "the determination section 20 determines whether the ejection is normal or abnormal"),
the determination circuit is configured to determine the state of the ejection unit based on the second residual vibration signal (Paragraph 0128, "the determination section 20 detects and determines the ejection abnormality of the respective inkjet heads 100 included in the respective head units 35 of the typing section 3 based on the cycle or the like of the measured residue vibration").
Yoshida does not disclose:
a temperature detection circuit configured to output a temperature information signal corresponding to a temperature of the waveform shaping circuit,
the determination circuit is configured to determine the state of the ejection unit based on the temperature information signal.
However, Yamada teaches a temperature detection circuit which detects a temperature of the drive signal selection control circuit and the integrated circuit and outputs a corresponding temperature information (Paragraph 0173, "The temperature detection circuit 250 detects the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and generates and outputs temperature information TH corresponding to the detected temperatures"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Yoshida to a temperature detection circuit configured to output a temperature information signal corresponding to a temperature of the waveform shaping circuit to allow a signal to be outputted when the temperature exceeds a predetermined threshold, as taught by Yamada (Paragraph 0173, “The temperature detection circuit 250 may detect the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and output both a voltage value corresponding to the detected temperatures and a signal indicating whether the detected temperatures exceed a predetermined threshold as the temperature information TH”).
Furthermore, Yamada teaches that the temperature detection circuit determines whether the temperature state is appropriate based on a predetermined threshold value, and emit a signal if that value is exceeded (Paragraph 0173, " The temperature detection circuit 250 may detect the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and output both a voltage value corresponding to the detected temperatures and a signal indicating whether the detected temperatures exceed a predetermined threshold as the temperature information TH"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have that the determination circuit would determine the state of the ejection unit based on the temperature information signal, as taught by Yamada, to prevent the temperature from exceeding the threshold.
Modified Yoshida further fails to disclose:
the waveform shaping circuit includes an amplifier circuit configured to amplify the first residual vibration signal and a gain setting circuit configured to set a gain of the amplifier circuit, and is configured to output the second residual vibration signal based on a signal amplified by the amplifier circuit,
However, Fujisawa teaches a waveform shaping circuit including a gain adjustment circuit and a low pass filter, having an operational amplifier, and generates a residual vibration signal based on a difference signal (Paragraphs 0183-0184, "As illustrated in FIG. 12, the waveform shaping circuit 202 includes a low pass filter 23, a gain adjustment circuit 24, and a buffer 25 and the waveform shaping circuit 202 generates the residual vibration signal NSA on the basis of the difference signal Vdif… The low pass filter 23 includes an operational amplifier OP4…"). It is clear that one could use the same waveform shaping circuit taught by Fujisawa, having an amplifier and a low pass filter, to generate a residual vibration signal based on a first residual vibration signal. Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention include an amplifier circuit to amplify the first residual vibration signal and a gain setting circuit configured to set a gain of the amplifier circuit, in order to adjust the amplitude and eliminate a noise component of the inputted signal, as taught by Fujisawa (Paragraph 0175, “…a waveform shaping circuit 202 which adjusts the amplitude of the difference signal Vdif and generates the residual vibration signal NSA by eliminating a noise component in the difference signal Vdif”).
Regarding claim 7,
Yoshida does not disclose that at least a part of the temperature detection circuit is provided to the semiconductor device.
However, Yamada teaches that the temperature detection circuit is provided on the integrated circuit (Paragraph 0156, “As illustrated in FIG. 6, the integrated circuit 362 includes the restoration circuit 210, the drive signal selection control circuit 200, and a temperature detection circuit 250”; Figure 6, Items 362 and 250). Therefore, it would be obvious to one of ordinary skill in the art to provide that the temperature detection circuit may be provided to the semiconductor device, as taught by Yamada, to have the components provided in a compact device.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoshida, Yamada, and Fujisawa as applied to claim 1 above, further in view of Murayama US 20200198360 A1.
Regarding claim 3, Yoshida teaches a print head including the ejection unit (Paragraph 0093, “Also, in the reciprocating, ink drops are appropriately ejected from respective inkjet heads 100 of the head units 35”).
Yoshida does not disclose:
a flexible wiring board having one end electrically coupled to the print head,
a wiring board to which another end of the flexible wiring board is electrically coupled,
at least a part of the temperature detection circuit is provided to the wiring board.
However, Yamada teaches having a flexible printed circuit as a coupling wiring, which is coupled at one end to a print head (Paragraph 0143, "The other end of the coupling wiring 164 is coupled to a wiring substrate (not illustrated) of the print head 35... That is, the coupling wiring 164 is a member in which a plurality of wirings for transferring various signals to the integrated circuit 362 are formed, and is formed of, for example, a flexible printed circuit (FPC) or a flexible flat cable (FFC)"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have a flexible wiring board having one end electrically coupled to the print head to provide an electrical connection to the print head.
Furthermore, Yamada teaches that the other end of the flexible wiring board is electrically coupled to a wiring substrate (Paragraph 0141, "Further, one end of the coupling wiring 164 is electrically coupled to the wiring substrate 338"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have the other end of the flexible wiring board to be electrically coupled to a wiring board, as taught by Yamada, in order to provide an electrical connection between a wiring board and the print head through the flexible wiring board.
Furthermore, Yamada teaches a temperature detection circuit which detects a temperature of the drive signal selection control circuit and the integrated circuit and outputs a corresponding temperature information, and that the integrated circuit is provided on a surface of a wiring substrate (Paragraph 0173, "The temperature detection circuit 250 detects the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and generates and outputs temperature information TH corresponding to the detected temperatures"; “The integrated circuit 362 is provided on the surface G2 of the wiring substrate 338”). Since the integrated circuit of Yamada is provided on a surface of the wiring substrate, and the temperature detection circuit detects the temperature of the integrated circuit, it must be that at least a part of the temperature detection circuit of Yamada is provided on the surface of the wiring substrate. Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have that at least a part of the temperature detection circuit is provided to the wiring board, as taught by Yamada, so that the temperature detection circuit may acquire the temperature of components provided to the wiring board.
Modified Yoshida further fails to disclose:
the semiconductor device is provided to the flexible wiring board.
However, Murayama teaches a semiconductor element, fashioned as a drive circuit, mounted on a flexible wiring board (Paragraph 0058, "The flexible cable 120 is a flexible wiring board, and in this embodiment, a drive circuit 121, which is a semiconductor element, is mounted on the flexible cable 120"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have the semiconductor device provided to the flexible wiring board in order to supply the semiconductor device on the circuit between the print head and the wiring board.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoshida, Yamada and Fujisawa as applied to claim 1 above, further in view of Murate, US 20150367633 A1.
Regarding claim 4,
Yoshida does not disclose that the determination circuit includes an analog-to-digital converter configured to convert the second residual vibration signal into a digital signal, and is configured to determine the state of the ejection unit based on the second residual vibration signal converted into the digital signal.
However, Murate teaches an AD converter which converts an analog amplitude value of a residual vibration into digital values for outputting to a controller (Paragraph 0116, “The AD converter 242 converts the held amplitude values (analog signal) of the residual vibration held by the wave processing circuit 250 (peak-hold circuit 253) into digital values, for outputting to (feedback) the controller 211”). Therefore, it would obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Yoshida to include an analog-to-digital converter to convert the second residual signal into a digital signal based on which the determination circuit would determine the state of the ejection unit, so that a discrete amplitude value can be held by the determination circuit, as taught by Murate (Paragraph 105, “In addition, the controller 211 selects at least two residual vibrations (multiple cycles) from the output values (for example, digital signal: the amplitude values of the residual vibration held by the peak-hold circuit 253 are converted into digital values).”
Modified Yoshida further does not disclose that the determination circuit is configured to determine the state of the ejection unit based on the temperature information signal
However, Yamada teaches that the temperature detection circuit determines whether the temperature state is appropriate based on a predetermined threshold value, and emit a signal if that value is exceeded (Paragraph 0173, " The temperature detection circuit 250 may detect the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and output both a voltage value corresponding to the detected temperatures and a signal indicating whether the detected temperatures exceed a predetermined threshold as the temperature information TH"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have that the determination circuit would determine the state of the ejection unit based on the temperature information signal, as taught by Yamada, to prevent the temperature from exceeding the predetermined threshold.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoshida, Yamada, Fujisawa, and Murate as applied to claim 4 above, further in view of Nito, US 20180152126 A1.
Regarding claim 5,
Yoshida does not disclose:
wherein the analog-to-digital converter is configured to convert the temperature information signal into a digital signal.
However, Nito teaches an A/D converter that receives a detection signal from a thermistor and converts the signal from an analogue to a digital signal for transmitting to a system controller (Paragraph 0044, “The A/D converter 153 receives a detection signal detected by a thermistor 154 for detecting a temperature of a fixing heater 161, converts the detection signal from an analog signal to a digital signal, and transmits the digital signal to the system controller 151”). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have that the analog to digital converter would convert the temperature information signal into a digital signal, as taught by Nito, for reasons well known in the art, such as improved signal quality, use in digital processing, and storage efficiency.
Modified Yoshida further does not disclose:
the determination circuit is configured to determine the state of the ejection unit based on the second residual vibration signal converted into the digital signal.
However, Murate teaches that an AD converter which converts an analog amplitude value of a residual vibration into digital values for outputs the digital signal to a controller (Paragraph 0116, “The AD converter 242 converts the held amplitude values (analog signal) of the residual vibration held by the wave processing circuit 250 (peak-hold circuit 253) into digital values, for outputting to (feedback) the controller 211”). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Yoshida to have that the determination circuit determine the state of the ejection unit based on a digital second residual vibration signal, as taught by Murate.
Modified Yoshida further does not disclose:
the determination circuit is configured to determine the state of the ejection unit based on the temperature information signal converted into the digital signal.
Furthermore, Yamada teaches that the temperature detection circuit determines whether the temperature state is appropriate based on a predetermined threshold value, and emit a signal if that value is exceeded (Paragraph 0173, " The temperature detection circuit 250 may detect the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and output both a voltage value corresponding to the detected temperatures and a signal indicating whether the detected temperatures exceed a predetermined threshold as the temperature information TH"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have that the determination circuit would determine the state of the ejection unit based on the digital temperature information signal, as taught by Yamada, to prevent the temperature from exceeding the predetermined threshold.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoshida, Yamada, and Fujisawa as applied to claim 6 above, further in view of Murayama, US 20200198360 A1.
Regarding claim 8, Yoshida teaches that the head unit includes a print head including the ejection unit (Paragraph 0093, “Also, in the reciprocating, ink drops are appropriately ejected from respective inkjet heads 100 of the head units 35”).
Yoshida does not disclose:
a flexible wiring board having one end electrically coupled to the print head,
a wiring board to which another end of the flexible wiring board is electrically coupled,
at least a part of the temperature detection circuit is provided to the wiring board.
However, Yamada teaches having a flexible printed circuit as a coupling wiring, which is coupled at one end to a print head (Paragraph 0143, "The other end of the coupling wiring 164 is coupled to a wiring substrate (not illustrated) of the print head 35... That is, the coupling wiring 164 is a member in which a plurality of wirings for transferring various signals to the integrated circuit 362 are formed, and is formed of, for example, a flexible printed circuit (FPC) or a flexible flat cable (FFC)"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have a flexible wiring board having one end electrically coupled to the print head to provide an electrical connection to the print head.
Furthermore, Yamada teaches that the other end of the flexible wiring board is electrically coupled to a wiring substrate (Paragraph 0141, "Further, one end of the coupling wiring 164 is electrically coupled to the wiring substrate 338"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have the other end of the flexible wiring board to be electrically coupled to a wiring board, as taught by Yamada, in order to provide an electrical connection between a wiring board and the print head through the flexible wiring board.
Furthermore, Yamada teaches a temperature detection circuit which detects a temperature of the drive signal selection control circuit and the integrated circuit and outputs a corresponding temperature information, and that the integrated circuit is provided on a surface of a wiring substrate (Paragraph 0173, "The temperature detection circuit 250 detects the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and generates and outputs temperature information TH corresponding to the detected temperatures"; “The integrated circuit 362 is provided on the surface G2 of the wiring substrate 338”). Since the integrated circuit of Yamada is provided on a surface of the wiring substrate, and the temperature detection circuit detects the temperature of the integrated circuit, it must be that at least a part of the temperature detection circuit of Yamada is provided on the surface of the wiring substrate. Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have that at least a part of the temperature detection circuit is provided to the wiring board, as taught by Yamada, so that the temperature detection circuit may acquire the temperature of components provided to the wiring board.
Modified Yoshida further fails to disclose:
the semiconductor device is provided to the flexible wiring board.
However, Murayama teaches a semiconductor element, fashioned as a drive circuit, mounted on a flexible wiring board (Paragraph 0058, "The flexible cable 120 is a flexible wiring board, and in this embodiment, a drive circuit 121, which is a semiconductor element, is mounted on the flexible cable 120"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have the semiconductor device provided to the flexible wiring board in order to supply the semiconductor device on the circuit between the print head and the wiring board.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoshida, Yamada, and Fujisawa as applied to claim 6 above, further in view of Murate, US 20150367633 A1.
Regarding claim 9,
Yoshida does not disclose that the determination circuit includes an analog-to-digital converter configured to convert the second residual vibration signal into a digital signal, and is configured to determine the state of the ejection unit based on the second residual vibration signal converted into the digital signal.
However, Murate teaches an AD converter which converts an analog amplitude value of a residual vibration into digital values for outputting to a controller (Paragraph 0116, “The AD converter 242 converts the held amplitude values (analog signal) of the residual vibration held by the wave processing circuit 250 (peak-hold circuit 253) into digital values, for outputting to (feedback) the controller 211”). Therefore, it would obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Yoshida to include an analog-to-digital converter to convert the second residual signal into a digital signal based on which the determination circuit would determine the state of the ejection unit, so that a discrete amplitude value can be held by the determination circuit, as taught by Murate (Paragraph 105, “In addition, the controller 211 selects at least two residual vibrations (multiple cycles) from the output values (for example, digital signal: the amplitude values of the residual vibration held by the peak-hold circuit 253 are converted into digital values).”
Modified Yoshida further does not disclose that the determination circuit is configured to determine the state of the ejection unit based on the temperature information signal
However, Yamada teaches that the temperature detection circuit determines whether the temperature state is appropriate based on a predetermined threshold value, and emit a signal if that value is exceeded (Paragraph 0173, " The temperature detection circuit 250 may detect the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and output both a voltage value corresponding to the detected temperatures and a signal indicating whether the detected temperatures exceed a predetermined threshold as the temperature information TH"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have that the determination circuit would determine the state of the ejection unit based on the temperature information signal, as taught by Yamada, to prevent the temperature from exceeding the predetermined threshold.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over modified Yoshida as applied to claim 9 above, further in view of Nito, US 20180152126 A1.
Regarding claim 10,
Yoshida does not disclose:
wherein the analog-to-digital converter is configured to convert the temperature information signal into a digital signal.
However, Nito teaches an A/D converter that receives a detection signal from a thermistor and converts the signal from an analogue to a digital signal for transmitting to a system controller (Paragraph 0044, “The A/D converter 153 receives a detection signal detected by a thermistor 154 for detecting a temperature of a fixing heater 161, converts the detection signal from an analog signal to a digital signal, and transmits the digital signal to the system controller 151”). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have that the analog to digital converter would convert the temperature information signal into a digital signal, as taught by Nito, for reasons well known in the art, such as improved signal quality, use in digital processing, and storage efficiency.
Modified Yoshida further does not disclose:
the determination circuit is configured to determine the state of the ejection unit based on the second residual vibration signal converted into the digital signal.
However, Murate teaches that an AD converter which converts an analog amplitude value of a residual vibration into digital values for outputs the digital signal to a controller (Paragraph 0116, “The AD converter 242 converts the held amplitude values (analog signal) of the residual vibration held by the wave processing circuit 250 (peak-hold circuit 253) into digital values, for outputting to (feedback) the controller 211”). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Yoshida to have that the determination circuit determine the state of the ejection unit based on a digital second residual vibration signal, as taught by Murate.
Modified Yoshida further does not disclose:
the determination circuit is configured to determine the state of the ejection unit based on the temperature information signal converted into the digital signal.
Furthermore, Yamada teaches that the temperature detection circuit determines whether the temperature state is appropriate based on a predetermined threshold value, and emit a signal if that value is exceeded (Paragraph 0173, " The temperature detection circuit 250 may detect the temperatures of the drive signal selection control circuit 200 and the integrated circuit 362 and output both a voltage value corresponding to the detected temperatures and a signal indicating whether the detected temperatures exceed a predetermined threshold as the temperature information TH"). Therefore, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have that the determination circuit would determine the state of the ejection unit based on the digital temperature information signal, as taught by Yamada, to prevent the temperature from exceeding the predetermined threshold.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Rami Alshoroogi whose telephone number is (571)272-8946. The examiner can normally be reached Mon-Fri 10am-6pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Douglas Rodriguez can be reached at (571)431-0716. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/RAMI A ALSHOROOGI/Examiner, Art Unit 2853
/DOUGLAS X RODRIGUEZ/Supervisory Patent Examiner, Art Unit 2853
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