Prosecution Insights
Last updated: October 23, 2026
Application No. 18/820,689

LEVEL SHIFT CIRCUIT

Non-Final OA §112
Filed
Aug 30, 2024
Priority
Mar 01, 2022 — JP 2022-030820 +1 more
Examiner
NGUYEN, LONG T
Art Unit
2836
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co., Ltd.
OA Round
3 (Non-Final)
89%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
854 granted / 955 resolved
+21.4% vs TC avg
Moderate +8% lift
Without
With
+8.2%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 10m
Avg Prosecution
26 currently pending
Career history
985
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
19.1%
-20.9% vs TC avg
§102
37.2%
-2.8% vs TC avg
§112
33.0%
-7.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 955 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/12/26 has been entered. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the voltage controller response to the latch control signal and the timing diagram of the latch control signal such that “at a first time, the latch control signal is at the low level, and the voltage controller sets the second voltage to a middle value between the first voltage and the reference voltage," and “at a third time at which the first voltage reaches a first set value, the latch control signal switches from the low level to the high level and the latch circuit completes latching” (as recited in claim 1, see lines 17-27) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-8 and 11-12 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. For claim 1, the recitation “wherein at a first time, the latch control signal is at the low level, and the voltage controller sets the second voltage to a value between the first voltage and the reference voltage, wherein the voltage controller is configured to start raising the first voltage at a second time after the first time, wherein, at a third time at which the first voltage reaches a firs set value, the latch control signal switches from the low level to the high level and the latch circuit completes latching, wherein, after the third time, the reference voltage rises to a second set value equal to the second voltage, and wherein the voltage controller is configured to raise, after the third time, the first voltage to a third set value higher than the first set value.” as recited on lines 17-33 is not enabled because the disclosure fails to disclosure a detail circuitry of “a voltage controller” to set and/or raise the respective voltages at different times based on the latch control signal as recited in the claim (lines 17-33). Note that, the specification broadly discloses a block (labeled as VCNT) for a voltage controller “CNT1” for controls the voltages V1 and V2, but does not disclose the detail circuitry for the voltage controller (VCNT) “CNT1” and/or any connections of the voltage controller (VCNT) “CNT1” (that receives or connects to the latch control signal) so that the voltage controller (VCNT) “CNT1” set/raises the respective voltages at different times based on the latch control signal as recited in the claim (lines 17-33). Thus, the specification has failed to describe a voltage controller that set the voltages at different times based on the latch control signal as recited on lines 17-33 of the claim. Without the detail of the voltage controller circuitry, a person having ordinary skill in the art cannot make the level shifter work as claimed without undue experimentation to the design the internal circuitry of that voltage controller. Clarification and/or appropriate correction is required. Claims 2-8 and 11-12 are rejected because they depend on claim 1. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-8 and 11-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. For claim 1, the recitation “wherein at a first time, the latch control signal is at the low level, and the voltage controller sets the second voltage to a value between the first voltage and the reference voltage, wherein the voltage controller is configured to start raising the first voltage at a second time after the first time, wherein, at a third time at which the first voltage reaches a firs set value, the latch control signal switches from the low level to the high level and the latch circuit completes latching, wherein, after the third time, the reference voltage rises to a second set value equal to the second voltage, and wherein the voltage controller is configured to raise, after the third time, the first voltage to a third set value higher than the first set value.” as recited on lines 17-33 is indefinite because it is not clear how a voltage controller configured to set and/or raise the respective voltages at different time base on the level of the latch control signal as recited on lines 17-33. It is note that there are no connections between the voltage controller (VCNT) “CNT1” and the latch control signal, and there is no detail circuitry for voltage controller (VCNT) “CNT1”, so it is not clear how a voltage controller configured to set and/or raise the respective voltages at different time base on the level of the latch control signal as recited on lines 17-33. Clarification and/or appropriate correction is required. Claims 2-8 and 11-12 are indefinite because they depend on claim 1. Response to Arguments Applicant's arguments filed 08/12/26 have been fully considered but they are not persuasive. Regarding to the 35 U.S.C. 112(a) and 112(b), Applicant argues that: “Amended claim 1 no longer requires the voltage controller to generate, set, or switch the latch control signal. Instead, amended claim 1 separately recites the voltage-control operations performed by the voltage controller and the operating states and transition of the latch control signal …. The amended limitations are supported at least by paragraphs [0025], [0040], and [0048]- -[0051] and FIGS. 2-4 of the present application. For example, paragraph [0025] describes the voltage controller CNT1 and explains that CNT1 controls the first voltage V1 and the second voltage V2. The specification also identifies the first and second voltage lines L1 and L2 and the circuit components to which the respective voltages are supplied. Paragraph [0040] describes the initial voltage and latch-control-signal conditions. In particular, at time t0, the latch control signal S1 is at a low level, and the voltage controller CNT1 sets the second voltage V2 to the middle value between the first voltage V1 and the reference voltage VB 1. Paragraph [0048] further describes that, starting at time t2, the voltage controller CNT1 raises the first voltage V1. When the first voltage V1 reaches the first set value SV1 at time t3, the latch control signal S1 switches from the low level to the high level. The specification additionally explains that FIG. 4 illustrates the voltage changes before and after time t3, which corresponds to completion of latching. At time t3, the latch control signal S1 switches from the low level to the high level, and after time t3, the reference voltage VB1 rises to the second set value SV2. The voltage controller CNT1 thereafter raises the first voltage V1 to the third set value SV3. FIG. 2 also illustrates the relevant circuit architecture, including the voltage controller CNT 1, the first and second voltage lines L1 and L2, the latch control signal Si, the level shift circuit LS 1, the buffer B1, the level latch circuit LL 1, and the latch circuit formed by transistors Q2-Q5. FIG. 3 illustrates the timing relationship among times t0, t1, t2, and t3 and the corresponding changes in the first voltage V1, the second voltage V2, the reference voltage VB1, and the latch control signal S1. Thus, the specification discloses both the relevant circuit architecture and the operating sequence corresponding to amended claim 1. Because amended claim 1 no longer requires CNT1 itself to generate or directly switch the latch control signal S1, the absence of a direct connection between CNT1 and the latch-control-signal line does not establish that the amended claim is not enabled” (see Applicant’s Remarks). However, such amendment does not overcome the 35 U.S.C. 112(a) and 112(b) rejections as discussed above because the specification fails to disclose the detail circuitry for the voltage controller (VCNT) “CNT1” and/or any connections of the voltage controller (VCNT) “CNT1” (that receives or connects to the latch control signal) so that the voltage controller (VCNT) “CNT1” set/raises the respective voltages at different times based on the latch control signal as recited in claim 1 (lines 17-33). Without the detail of the voltage controller circuitry, a person having ordinary skill in the art cannot make the level shifter work as claimed without undue experimentation to the design the internal circuitry of that voltage controller. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directly to Examiner Long Nguyen whose telephone number is (571) 272-1753. The Examiner can normally be reached on Monday to Friday from 8:30am to 5:00pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis Betsch, can be reached at (571) 270-7101. The fax number for this group is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. /Long Nguyen/ Primary Examiner Art Unit 2836
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Prosecution Timeline

Aug 30, 2024
Application Filed
Dec 22, 2025
Non-Final Rejection mailed — §112
Mar 23, 2026
Response Filed
May 19, 2026
Final Rejection mailed — §112
Aug 12, 2026
Response after Non-Final Action
Sep 17, 2026
Request for Continued Examination
Sep 19, 2026
Response after Non-Final Action
Oct 14, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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AGING RESILIENT LEVEL SHIFTER
2y 8m to grant Granted Oct 13, 2026
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Patent 12744519
INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME
2y 2m to grant Granted Sep 22, 2026
Patent 12732169
SEMICONDUCTOR MODULE
2y 0m to grant Granted Sep 08, 2026
Patent 12719473
LEVEL SHIFTER
2y 1m to grant Granted Aug 25, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
89%
Grant Probability
98%
With Interview (+8.2%)
1y 10m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 955 resolved cases by this examiner. Grant probability derived from career allowance rate.

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