DETAILED ACTION
Status of Claims
This is a first office action on the merits in response to the application’s response to restriction requirement filed on 04/17/2026
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Applicant elected claims 1-7 with traverse. Claims 8-20 are withdrawn from consideration.
Response to Remarks
The applicant argues that the claims do not present a true combination/subcombination relationship under MPEP § 806.05©, but rather parallel inventions with overlapping subject matter. The applicant points out that Group I (monitoring device for power state) and Groups II/III (timers for transition time) do not encompass all limitations of each other, and thus, do not fit the combination/subcombination framework.
Examiner respectfully disagree and would like to point out that Even if the inventions are parallel rather than hierarchical, restriction may still be proper if the inventions are independent and distinct and examination of all would impose a serious search burden (see 37 C.F.R. § 1.141(a)). The applicant’s argument that the inventions are not in a combination/subcombination relationship is noted; however, the claims recite distinct core features (monitoring device vs. timer-based alerting vs. clock controller), each requiring different technical considerations. the technical differences between power monitoring, timer-based power control, and clock control with timer-based alerting may require searching different classes, subclasses, or distinct areas of the art (e.g., circuit monitoring, power management ICs, clock generation circuits).
Non-Compliant amendment Under 37 CFR 1.121
The amendment filed on 04/17/2026 is non-compliant under 37 CFR 1.121 c for not providing correct status of every claims. Claims 8-20 are non-elected claims but amended but does not show (Withdrawn). In the claim listing, the status of every claim must be indicated after its claim number by using one of the following identifiers in a parenthetical expression: (Original), (Currently amended), (Canceled), (Withdrawn), (Previously presented), (New), and (Not entered). The non-compliant amendment has been entered and considered, however, all future amendments must comply with 37 CFR 1.121.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/06/2003 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement has been considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-7 are rejected under 35 U.S.C. 103 as being unpatentable over Tsukamoto et al. (US 20130185582 A1) in view of Chiu (US 2003/0158609 A1).
Regarding Claim 1:
Tsukamoto teaches an apparatus, comprising:
a power controller configured to turn off power to one or more processing elements from a power source and turn on power to the one or more processing elements from the power source during a normal power state; and a monitoring device configured to: determine at least one of: whether the power is completely turned off to the one or more processing elements from the power source or whether the power is completely turned on to the one or more processing elements from the power source during the normal power state based on monitoring of the power controller; and transmit an alert signal when at least one of: the power is not completely turned off to the one or more processing elements from the power source or the power is not completely turned on to the one or more processing elements from the power source during the normal power state. (By disclosing, [0066] The power supply units 140a and 140b supply, to components of the storage apparatus 100, driving power for driving the components of the storage apparatus 100. The power state of the controller module 1a includes four states: an ON state in which the controller module is supplied with power and is operating normally, an OFF state in which the controller module is not supplied with power and is not operating, an OFF processing state in which an OFF process of switching from ON to OFF is being executed, and an ON processing state in which an ON process of switching from OFF to ON is being executed. The controller module 1a detects the power states of the controller module 1a at each time point, and stores power state information indicating the detected power state. Similarly, the controller module 1b stores power state information. The controller modules 1a and 1b may obtain power state information from each other, and thereby detect the power state of each other. If the monitoring results indicate that the controller module 1a is in the ON state and the controller module 1b is in the ON processing state in which an ON process of switching the power state from OFF to ON is being executed, the controller module 1a maintains the controller module 1a in the ON state when a power control signal for controlling the power state of the controller module 1a is detected. A power control signal may be output to the controller modules 1a and 1b on the basis of a user's operation on an operation unit (not illustrated) in order to control the power state of the storage apparatus 1, or may be output from an upper apparatus such as a host computer, a client, and the like. the monitoring PLD 114a receives from the monitoring PLD 114b a status packet indicating the power state of the controller module 110b, and thereby detects the power state of the controller module 110b. The monitoring PLD 114a sets a value corresponding to the received status packet in the other system state register. The monitoring PLD 114a includes a timer that monitors completion of an OFF process of the controller module 110b when OFF processes of the controller modules 110a and 110b are executed. If an error is detected in the controller module 110b, the controller module 110a sends to the controller module 110b a disconnection OFF command for turning OFF the controller module 110b and preventing execution of an ON process. In this case, if the controller module 110b receives the disconnection OFF command from the controller module 110a, the controller module 110b is switched to the disconnected OFF state in which the controller module 110b is turned OFF, and is not switched to the ON state when a power control signal for controlling the power state of the controller module 110b is detected. When being switched to the disconnected OFF state, for example, the controller module 110b sets in the own system disconnection OFF register a value indicating that the controller module 110b is in the disconnected OFF state. When not in the disconnected OFF state and when being switched from the disconnected OFF state to the normal state, the controller module 110b sets in the own system disconnection OFF register a value indicating that the controller module 110b is not in the disconnected OFF state. Thus, the controller module 110b may determine whether the own system is set to the disconnected OFF state by referring to the own system disconnection OFF register. However, the embodiment is not limited thereto. When switched to the disconnected OFF state, the controller module 110b may be disabled without using the own system disconnection OFF register. When switched to the disconnected OFF state, the controller module 110b ignores commands other than an ON command from the other system (for example, the controller module 110a), and does not execute an ON process even when a power control signal is received. However, when an ON command is received from the other system, the controller module 110b cancels the disconnection OFF and executes an ON process. In the case of cancelling the disconnection OFF of the controller module 110b, such as when the detected error is resolved, the other system sends an ON command to the controller module 110b such that the disconnected OFF state of the controller module 110b is canceled and an ON process is executed. Thus, the controller module 110b is enable. See at least paragraphs [0033]-[0087])
Tsukamoto does not specifically disclose performing (operation related to ) turn off power during a power saving state. However Chiu teaches power management system work for power staving state. (See at least paragraphs [0006]-[0008])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Tsukamoto with the technique of power saving management as disclosed by Chiu to reduce loss of data and efficiency. Furthermore, merely combining well known elements in the prior art with predictable results does not render an invention patentably distinct over such combination.
Regarding Claim 2:
Tsukamoto in view of Chiu teaches limitations shown above. Tsukamoto further teaches wherein each processing element comprises multiple processor cores. (See at least fig. 2 as well as associated text)
Regarding Claim 3:
Tsukamoto in view of Chiu teaches limitations shown above. Tsukamoto further teaches wherein the power controller is configured to receive two or more power control signals; and determine, based on the two or more power control signals transmission of one or more power switch control signals to one or more power switches between the one or more processing elements and the power source to turn on or turn off the power to the one or more processing elements from the power source. (See at least paragraphs [0033]-[0087])
Regarding Claim 4:
Tsukamoto in view of Chiu teaches limitations shown above. Tsukamoto further teaches wherein the monitoring device is configured to determine that the power is turned on to the one or more processing elements from the power source when at least one of the one or more power switches is switched on. (See at least paragraphs [0033]-[0087])
Regarding Claim 5:
Tsukamoto teaches limitations shown above. Tsukamoto further teaches wherein the alert signal carries information associated with the at least one of the one or more power switches that is switched on during the power saving state. (See at least paragraphs [0033]-[0087]) Tsukamoto does not specifically disclose performing (operation related to ) turn on power during a power saving state. However Chiu teaches power management system work for power staving state. (See at least paragraphs [0006]-[0008])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Tsukamoto with the technique of power saving management as disclosed by Chiu to reduce loss of data and efficiency. Furthermore, merely combining well known elements in the prior art with predictable results does not render an invention patentably distinct over such combination.
Regarding Claim 6:
Tsukamoto teaches limitations shown above. Tsukamoto further teaches wherein the monitoring device is configured to determine that the power is turned off to the one or more processing elements from the power source during the normal power state when at least one of the one or more power switches is switched off during the normal power state. (See at least paragraphs [0033]-[0087])
Regarding Claim 7:
Tsukamoto teaches limitations shown above. Tsukamoto further teaches wherein the alert signal carries information associated with the at least one of the one or more power switches that is switched off during the normal power state. (See at least paragraphs [0033]-[0087])
Conclusion
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/NEHA PATEL/Supervisory Patent Examiner, Art Unit 3699
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