DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-13 are pending.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The abstract of the disclosure is objected to because of the following minor informalities:
The language of the abstract should not repeat the information given in the title.
A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
The disclosure is objected to because of the following informalities:
-- base on -- should be -- based on-- in [0101].
-- men_limit -- should be -- mem_limit-- in [0111].
--men_base -- should be --mem_base-- in[0111].
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-13 are rejected under 35 U.S.C. 112 (b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or joint inventor regards as the invention.
The following claim language is not clearly understood:
Claim 1 recites “memory devices not bound to any host”. It is unclear what is being meant by “not bound to any host” i.e. if the memory is not allocated to any host or not connected/coupled to any host or not mapped to any host.
Claim 1 recites “to any host”. It is unclear how many host is being claimed.
Claim 1 recites “memory devices allocated to a host”, and “memory devices not bound to any host”. It is unclear the two instances of memory devices i.e. memory devices allocated to a host and memory devices bound to any host are same memory devices or different memory devices.
Claim 3 recites “first counter and the second counter of the memory device as the request frequency of the memory device”. It is unclear if first counter or the second counter or both are considered request frequency of the memory device and if the two counters are same or different or could be either.
Claims 6 recite elements of claim 1 and have similar deficiency as claim 1. Therefore, they are rejected for the same rationales. Remaining dependent claims 2-5 and 7-13 are also rejected due to similar deficiency inherited from the rejected independent claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kumar et al. (US 2022/0197819 A1, hereafter Kumar) in view of Kar et al. (US 11,601,377 B1, hereafter Kar).
Kumar and Kar were cited in the IDS filed on 03/06/2025 and 09/06/2024 respectively.
As per claim 1, Kumar teaches the invention substantially as claimed including a memory allocation method, performed by a network manager (fig. 3 orchestration and management 320 [0037] allocation of memory), comprising:
determining a first memory device among memory devices allocated to a host ([0016] fig. 2 platform 200 memory 230 server , platform 200, utilize, memory pool [0021] memory 230 connected to processors 202 [0015] allocation of memory, memory devices, single/multiple memory pool), wherein the first memory device is overloaded ([0015] subset of available memory pools being overloaded to the point of not meeting SLA [0012] tenants, allocated, use of single pool, memory pool A, overload, overused [0013] memory pool, over utilized);
selecting a second memory device from memory devices not bound to any host, wherein an attribute of the second memory device is superior to the attribute of the first memory device ([0036] selection of pooled memories, orchestrator , allocated memory address ranges, selected pool memories, particular class of service [0024] table-1 / 2 allocation of 200 / 300 GB capacity and 200/400 GB/s memory bandwidth is to be made, pool A is not selected but pool B or C can be selected / pool A-C allocated [0025] select one or more classes of bandwidth, class of memory bandwidth BW1 can be higher than a memory bandwidth BW2); and
allocating the second memory device to the host ([0036] selection of pooled memories, orchestrator , allocated memory address ranges, selected pool memories, particular class of service [0024] table-1 / 2 allocation of 200 / 300 GB capacity and 200/400 GB/s memory bandwidth is to be made, pool A is not selected but pool B or C can be selected / pool A-C allocated [0025] select one or more classes of bandwidth, class of memory bandwidth BW1 can be higher than a memory bandwidth BW2), so that the host migrates memory data from the first memory device to the second memory device ([0036] orchestrator 320, migration of data, another memory pools 340A-C, update memory pool mapping ).
Kumar doesn’t specifically teach memory device not bound to any host (although multiple pool indicate pools that are not allocated to any other host/platform).
Kar, however, teaches selecting a second memory device from memory devices not bound to any host (col 10 lines 65-67 col 11 lines 1-35: servers, compute resources in the free pool, servers with compute resources, free pool, narrow down the server, support, satisfy the memory constraint, HBM, local / remote resource, pooled DRAM).
It would have been obvious to one of ordinary skills in the art before the effective filing date of the invention was made to combine the teachings of Kumar with the teachings of Kar of narrowing the servers from the pool of free servers to satisfy the memory constraint and improve efficiency and allow selecting a second memory device from memory devices not bound to any host to the method of Kumar as in the instant invention. The combination would have been obvious because applying the known method of selecting resources from the pool of free compute resources as taught by Kar to the method of Kumar to yield expected results and improved utilization efficiency.
As per claim 2, Kumar teaches wherein determining the first memory device among the memory devices allocated to the host comprises (fig. 2 platform 200 processors 202 memory 230; fig. 3 310 340-A ):
for each of the memory devices allocated to the host, obtaining a request frequency of the memory device from the memory device ([0026] scheduling, memory access requests to one or more target memory pools, memory access requests, associated, SLAs i.e. request frequency has to be known to compare with the SLA );
obtaining a dynamic load status and bandwidth information of the memory device from the host ([0012] fig. 1B memory utilization spike, capacity and bandwidth, tenant allocated, use of single pool, memory pool A, overused [0033] heatmap of traffic to or from memory pools, network/bandwidth traffic monitoring); and
determining the first memory device based on the request frequency, the dynamic load status, and the bandwidth information of each of the memory devices allocated to the host ([0034] memory access traffic, determining whether a memory device and/or pool can satisfy a service level for a process [0039] conditioned allocation of resources, if network bandwidth < B1 and load < 50 %).
As per claim 3, Kumar teaches wherein each of the memory devices comprises a first counter and a second counter, the first counter records a difference between a number of memory requests received by the memory device from the host and a number of memory responses sent by the memory device to the host, and the second counter records the number of memory requests ([0027] memory bandwidth available at memory pools, bandwidth telemetry, bandwidth utilization, to and from different memory pools, memory access requests i.e. counter is product of available bandwidth and utilization [0032]; table-1/2 );
wherein, obtaining the request frequency of the memory device from the memory device comprises ([0033] monitoring, heatmap of traffic to or from memory pools 340A-C):
obtaining values recorded in the first counter and the second counter of the memory device as the request frequency of the memory device ([0033] monitoring, heatmap of traffic to or from memory pools 340A-C [0027] memory bandwidth available at memory pools, bandwidth telemetry, bandwidth utilization, to and from different memory pools, memory access requests i.e. counter is product of available bandwidth and utilization [0032]; table-1/2).
As per claim 4, Kumar teaches wherein the attribute comprises one or more of latency and bandwidth ([0013] memory pool, latency, memory bandwidth).
As per claim 5, Kumar teaches wherein the attribute comprises the latency ([0013] memory pool, latency, memory bandwidth);
wherein selecting the second memory device from the memory devices not bound to any host comprises ([0036] selection of pooled memories, orchestrator , allocated memory address ranges, selected pool memories, particular class of service [0024] table-1 / 2 allocation of 200 / 300 GB capacity and 200/400 GB/s memory bandwidth is to be made, pool A is not selected but pool B or C can be selected / pool A-C allocated [0025] select one or more classes of bandwidth, class of memory bandwidth BW1 can be higher than a memory bandwidth BW2):
selecting, based on a topology of a compute express link (CXL) network and from the memory devices not bound to any host, a second memory device which has a lowest communication latency with the host ([0035] near memory, coupled, host system, low latency [0041] allocated memory, scheduling, load balancing, satisfy an applicable SLA e.g. memory bandwidth and/or latency).
Kar teaches remaining claim elements of memory device not bound to any host (col 10 lines 65-67 col 11 lines 1-35: servers, compute resources in the free pool, servers with compute resources, free pool, narrow down the server, support, satisfy the memory constraint, HBM, local / remote resource, pooled DRAM), selecting, based on a topology of a compute express link (CXL) network (col 4 lines 25-40 additional hardware to satisfy user requirements, hot-plug resource, CXL_E device, topology information, perform admission control of the newly added CXL-e device).
As per claim 6, Kumar teaches wherein the first memory device is connected (fig. 1A memory pool A interconnect ), the second memory device is connected (fig. 1A memory pool B interconnect ).
Kar teaches remaining claim elements of memory device is connected to a first CXL switch (fig. 1 CXL switch 110 MLD appliance 108 ), second memory device connected to second CXL switch ( fig. 1 CXL switch 110 MLD appliance 108 fig. 2A CXL-E switches 110 CXL-E appliance 204 );
the first CXL switch and the second CXL switch are cascaded, and a higher-level CXL switch in the first CXL switch and the second CXL switch is connected to the host ( fig. 2A CXL-E switches 110 CXL-E appliance 204 host 208 col 3 lines 40- CXL-E devices, CXL-E switches, topology information, placement algorithm; col 12 lines 43-49 CXL hierarchies).
Claim 7 recites network manager, comprising a processor and a machine-readable storage medium, wherein the machine-readable storage medium stores machine-executable instructions executable by a processor, and the processor is prompted by the machine-executable instructions to perform elements similar to claim 1. Therefore, it is rejected for the same rationales.
Claim 8 recites network manager of claim 7, wherein the processor is further configured to perform elements similar to claim 2. Therefore, it is rejected for the same rationales.
Claim 9 recites network manager of claim 8 for elements similar to claim 3. Therefore, it is rejected for the same rationales.
Claim 10 recites network manager of claim 7 for elements similar to claim 4. Therefore, it rejected for the same rationales.
Claim 11 recites network manager of claim 10 for elements similar to claim 5. Therefore, it is rejected for the same rationales.
Claim 12 recites network manager of claim 7 for elements similar to claim 6. Therefore, it is rejected for the same rationales.
Claim 13 recites non-transitory computer-readable storage medium, comprising a computer program that, in response to execution by a processor, implements the method in claim 1. Therefore, it is rejected for the same rationales.
Examiners Note
Applicant is further reminded of that the cited paragraphs and in the references as applied to the claims above for the convenience of the applicant(s) and although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider all of the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Alatorre et al. (US 2012/0278511 A1) teaches system, method and program product to manage transfer of data to resolve overload of a storage system.
Farhan et al. (US 10,908,940 B1) teaches dynamically managed virtual server system
Gokam et al. (US 10,789,006 B1) teaches path-based data migration from source device to target device
Guim Bernat et al. (US 2022/0004330 A1) teaches memory pool data placement technologies including performance counters including memory bandwidth utilization, memory size usage, memory allocation
Gulati et al. (US 2015/0169341 A1) teaches virtual machine data store queue allocation
Pinto et al. (US 2022/0236902 A1) teaches system and method for data transfer for computational storage devices
Vallala et al. (US 2019/0220315 A1) teaches dynamic adjustment of application resources in a distributed computing system
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/ABU ZAR GHAFFARI/Primary Examiner, Art Unit 2195
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