Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-14 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-15 of copending Application No. US 20250374415 A1 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because Application No. US 20250374415 A1 teaches the claim limitations as shown in the claim to claim mapping below.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Instant Application
U.S. Patent No. 18/813388
Claim 1:
A printed circuit board (PCB) core laminate for a wireless power charger, the PCB core laminate comprising: a PCB substrate comprising a first PCB core and a second PCB core stacked on the first PCB core, wherein printed circuit patterns are located on surfaces of the PCB substrate; and a heat-dissipating material layer interposed between the first PCB core and the second PCB core.
Claim 1:
A printed circuit board (PCB) core laminate for a wireless power charger, the PCB core laminate comprising: a heat-dissipating material; and a PCB core embedded in the heat-dissipating material, wherein the PCB core comprises a PCB substrate and printed circuit patterns located on surfaces of the PCB substrate.
Claim 3:
The PCB core laminate of claim 1, wherein: a plurality of heat-dissipating materials are present; a plurality of PCB cores are embedded in each of the heat-dissipating materials, respectively; and the plurality of heat-dissipating materials are stacked.
Claim 2:
The PCB core laminate of claim 1, wherein the heat-dissipating material layer comprises one or more types of resins among an ethylene-based resin, an acrylic-based resin, and an amide-based resin.
Claim 4:
The PCB core laminate of claim 1, wherein the heat-dissipating material comprises one or more types of resins among an ethylene-based resin, an acrylic-based resin, and an amide-based resin.
Claim 3:
The PCB core laminate of claim 2, wherein the heat-dissipating material layer comprises one or more types of inorganic materials that include BN or Al2O3.
Claim 5:
The PCB core laminate of claim 4, wherein the heat-dissipating material further comprises one or more types of inorganic materials that include BN or Al2O3.
Claim 4:
The PCB core laminate of claim 1, wherein, in the first PCB core or the second PCB core, the printed circuit patterns are disposed on upper and lower surfaces of the PCB substrate.
Claim 6:
The PCB core laminate of claim 1, wherein, in the PCB core, the printed circuit patterns are disposed on upper and lower surfaces of the PCB substrate.
Claim 5:
The PCB core laminate of claim 4, wherein, in a cross-section of the PCB core laminate, the printed circuit pattern disposed on the upper surface of the PCB substrate and the printed circuit pattern disposed on the lower surface of the PCB substrate are arranged to correspond to each other.
Claim 7:
The PCB core laminate of claim 6, wherein, in a cross-section of the PCB core laminate, the printed circuit pattern disposed on the upper surface of the PCB substrate and the printed circuit pattern disposed on the lower surface of the PCB substrate are arranged to correspond to each other.
Claim 6:
The PCB core laminate of claim 4, wherein, in a cross-section of the PCB core laminate, a difference in pattern width between the printed circuit pattern disposed on the upper surface of the PCB substrate and the printed circuit pattern disposed on the lower surface of the PCB substrate is smaller than or equal to 5%.
Claim 8:
The PCB core laminate of claim 6, wherein, in a cross-section of the PCB core laminate, a difference in pattern width between the printed circuit pattern disposed on the upper surface of the PCB substrate and the printed circuit pattern disposed on the lower surface of the PCB substrate is smaller than or equal to 5%.
Claim 7:
The PCB core laminate of claim 1, further comprising a cut-out portion penetrating a portion of the PCB substrate in the first PCB core or the second PCB core.
Claim 9:
The PCB core laminate of claim 1, wherein a cut-out portion penetrating a portion of the PCB substrate is present in the PCB core.
Claim 8:
The PCB core laminate of claim 7, wherein the cut-out portion is present through a central portion of the PCB substrate in the first PCB core or the second PCB core.
Claim 10:
The PCB core laminate of claim 1, wherein a cut-out portion penetrating a portion of the PCB substrate is present in the PCB core.
Claim 9:
The PCB core laminate of claim 8, wherein the cut-out portion is filled with a heat-dissipating material.
Claim 11:
The PCB core laminate of claim 10, wherein the cut-out portion is filled with the heat-dissipating material.
Claim 10:
The PCB core laminate of claim 7, wherein the cut-out portion is filled with a heat-dissipating material.
Claim 12:
The PCB core laminate of claim 9, wherein the cut-out portion is filled with the heat-dissipating material.
Claim 11:
The PCB core laminate of claim 1, wherein, in a cross-section of the PCB core laminate, heat-conducting frames are connected to side end portions of the heat-dissipating material layer.
Claim 13:
The PCB core laminate of claim 1, wherein, in a cross-section of the PCB core laminate, heat-conducting frames are connected to side end portions of the heat-dissipating material.
Claim 12:
The PCB core laminate of claim 1, wherein one or more layers of PCB cores are stacked on the second PCB core, and the heat-dissipating material layer is interposed between the PCB cores.
Claim 1:
A printed circuit board (PCB) core laminate for a wireless power charger, the PCB core laminate comprising: a heat-dissipating material; and a PCB core embedded in the heat-dissipating material, wherein the PCB core comprises a PCB substrate and printed circuit patterns located on surfaces of the PCB substrate.
Claim 3:
The PCB core laminate of claim 1, wherein: a plurality of heat-dissipating materials are present; a plurality of PCB cores are embedded in each of the heat-dissipating materials, respectively; and the plurality of heat-dissipating materials are stacked.
Claim 13:
The PCB core laminate of claim 1, further comprising a magnetic sheet and a control PCB stacked on the second PCB core.
Claim 14:
The PCB core laminate of claim 1, wherein a magnetic sheet and a control PCB are stacked on the heat-dissipating material.
Claim 14:
The PCB core laminate of claim 13, further comprising: a second heat-dissipating material layer interposed between the second PCB core and the magnetic sheet; and a third heat-dissipating material layer interposed between the magnetic sheet and the control PCB.
Claim 14:
The PCB core laminate of claim 1, wherein a magnetic sheet and a control PCB are stacked on the heat-dissipating material.
Claim 15:
The PCB core laminate of claim 14, wherein a second heat-dissipating material is interposed between the magnetic sheet and the control PCB.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 4, 5, 7-10, 15, and 17 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Kang (US 20110061912 A1).
Regarding claim 1, Kang teaches in figure 1 a PCB core laminate comprising:
a PCB substrate comprising a first PCB core (121) and a second PCB core (131) stacked on the first PCB core, wherein printed circuit patterns (122 and 133) are located on surfaces of the PCB substrate; and
a heat-dissipating material layer ([0034]; wherein layer 110 is a resin) interposed between the first PCB core and the second PCB core.
The Examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. See, e.g., In re Pearson, 181 USPQ 641 (CCPA); In re Minks, 169 USPQ 120 (Bd Appeals); In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). See MPEP §2114. The recitation of “for a wireless power charger” does not distinguish the present invention over the prior art of Kang who teaches the structure as claimed.
Regarding claim 4, Kang teaches in figure 1 that in the first PCB core (121) or the second PCB core (131), the printed circuit patterns (122 and 133) are disposed on upper and lower surfaces of the PCB substrate (wherein 122 is on the upper surface of 121 and 133 is on the lower surface of 131).
Regarding claim 5, Kang teaches in figure 1 wherein, in a cross-section of the PCB core laminate, the printed circuit pattern disposed on the upper surface of the PCB substrate (122) and the printed circuit pattern disposed on the lower surface of the PCB substrate (133) are arranged to correspond to each other (see figure 1).
Regarding claim 7, Kang teaches in figure 1 a PCB core laminate, further comprising a cut-out portion (V5) penetrating a portion of the PCB substrate in the first PCB core (121) or the second PCB core (131).
Regarding claim 8, Kang teaches in figure 1 that the cut-out portion (V5) is present through a central portion (see figure 1) of the PCB substrate in the first PCB core (121) or the second PCB core (131).
Regarding claim 9, Kang teaches in figure 1 that the cut-out portion (V5) is filled with a heat-dissipating material (V5 is a via).
Regarding claim 10, Kang teaches in figure 1 that the cut-out portion (V5) is filled with a heat-dissipating material (V5 is a via).
Regarding claim 15, Kang teaches in figure 1 a method of manufacturing a printed circuit board (PCB) core laminate, the method comprising:
stacking a first PCB core (121) and a second PCB core (131) with a heat-dissipating material layer ([0034]; wherein layer 110 is a resin) interposed between the first PCB core and the second PCB core, wherein printed circuit patterns (122 and 133) are located on surfaces of the first PCB core and the second PCB core; and
pressing the first PCB core and the second PCB core together ([0070]; the core layers are pressed together).
The Examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. See, e.g., In re Pearson, 181 USPQ 641 (CCPA); In re Minks, 169 USPQ 120 (Bd Appeals); In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). See MPEP §2114. The recitation of “for a wireless power charger” does not distinguish the present invention over the prior art of Kang who teaches the structure as claimed.
Regarding claim 17, Kang teaches in figure 1 wherein, in a cross-section of the PCB core laminate, the printed circuit patterns (122) disposed on the first PCB core (121) and the printed circuit patterns (133) disposed on the second PCB core (131) are arranged to correspond to each other (see figure 1).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20110061912 A1).
Regarding claim 6, Kang teaches in figure 1 wherein, in a cross-section of the PCB core laminate, a difference in pattern width between the printed circuit pattern disposed on the upper surface of the PCB substrate (122) and the printed circuit pattern (133) disposed on the lower surface of the PCB substrate is smaller than or equal to 5% (Kang does not explicitly disclose the difference is smaller than or equal to 5%; however, 122 is a mirrored version of 133 with the same number of conductive lines and via pads).
It would have been obvious to one of ordinary skill in the art before the effective filing date to use the same circuit pattern on both the upper and lower surfaces of the circuit board as a simple matter of design choice, in order to make the PCB arrangement easy to use.
Claim(s) 2, 3, and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20110061912 A1) in view of Asai (CN 102373019 A).
Regarding claim 2, Kang teaches in figure 1 a heat-dissipating material layer ([0034]; wherein layer 110 is a resin).
Kang does not teach that the heat-dissipating material layer comprises one or more types of resins among an ethylene-based resin, an acrylic-based resin, and an amide-based resin.
However, Asai teaches in figure 1 that the heat-dissipating material layer (2) comprises one or more types of resins among an ethylene-based resin, an acrylic-based resin, and an amide-based resin ([0050] corresponding to paragraph 55 in the translation; wherein the resin can be any of these resins or a combination thereof).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the resin materials of Asai in the layer of Kang, in order to improve adhesion between PCB layers (Asai [0049] corresponding to paragraph 54 in the translation).
Regarding claim 3, Kang teaches in figure 1 a heat-dissipating material layer ([0034]; wherein layer 110 is a resin).
Kang does not teach that the heat-dissipating material layer comprises one or more types of inorganic materials that include BN or Al2O3.
However, Asai teaches in figure 1 that the heat-dissipating material layer (2) comprises one or more types of inorganic materials that include BN or Al2O3 ([0084] corresponding to paragraph 89 in the translation; wherein inorganic filler in the layer can be alumina).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the inorganic material of Asai in the layer of Kang, in order to improve thermal conductivity (Asai [0084] corresponding to paragraph 89 in the translation).
Regarding claim 16, Kang teaches in figure 1 a heat-dissipating material layer ([0034]; wherein layer 110 is a resin).
Kang does not teach that the heat-dissipating material layer comprises one or more types of resins among an ethylene-based resin, an acrylic-based resin, and an amide-based resin.
However, Asai teaches in figure 1 that the heat-dissipating material layer (2) comprises one or more types of resins among an ethylene-based resin, an acrylic-based resin, and an amide-based resin ([0050]; wherein the resin can be any of these resins or a combination thereof).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the resin materials of Asai in the layer of Kang, in order to improve adhesion between PCB layers (Asai [0049]).
Claim(s) 11 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20110061912 A1) in view of Cho (KR 200207243 Y1).
Regarding claim 11, Kang teaches in figure 1 a heat-dissipating material layer ([0034]; wherein layer 110 is a resin).
Kang does not teach wherein, in a cross-section of the PCB core laminate, heat-conducting frames are connected to side end portions of the heat-dissipating material layer.
However, Cho teaches in figure 2 wherein, in a cross-section of the PCB core laminate, heat-conducting frames are connected to side end portions of the heat-dissipating material layer (paragraph 22 of the translation; wherein layers 31 and 32 have exposed parts connected to metal chassis).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the layer of Kang to be attached to the chassis, in order to further improve heat dissipation in the system (Cho; paragraph 22 of translation).
Regarding claim 18, Kang teaches in figure 1 a heat-dissipating material layer ([0034]; wherein layer 110 is a resin).
Kang does not teach wherein, in a cross-section of the PCB core laminate, heat-conducting frames are connected to side end portions of the heat-dissipating material layer.
However, Cho teaches in figure 2 wherein, in a cross-section of the PCB core laminate, heat-conducting frames are connected to side end portions of the heat-dissipating material layer (paragraph 22 of the translation; wherein layers 31 and 32 have exposed parts connected to metal chassis).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the layer of Kang to be attached to the chassis, in order to further improve heat dissipation in the system (Cho; paragraph 22 of translation).
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20110061912 A1) in view of Li (CN 110809358 A).
Regarding claim 12, Kang teaches in figure 1 a PCB core laminate with a second PCB core (131) and a heat-dissipating material layer ([0034]; wherein layer 110 is a resin).
Kang does not teach one or more layers of PCB cores are stacked on the second PCB core with heat-dissipating material layers interposed between the multiple PCB cores.
However, Li teaches in figure 2 one or more layers of PCB cores (10) are stacked on the second PCB core (bottom layer of 10) with heat-dissipating material layers (20) interposed between the multiple PCB cores.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the PCB core laminate of Kang to include multiple core and heat-dissipating layers, in order to be able to have more circuit patterns attached to perform various circuit operations.
Claim(s) 13, 14, 19, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20110061912 A1) in view of Tsuk (US 7350292 B2).
Regarding claim 13, Kang teaches in figure 1 a PCB core laminate with a second PCB core (131).
Kang does not teach a magnetic sheet and a control PCB stacked on the second PCB core.
However, Tsuk teaches in figure 1 a magnetic sheet (18) and a control PCB (layer 22 and surrounding layers 16) stacked on the second PCB core (layers 12 and 14).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the PCB core laminate of Kang to include a magnetic sheet and control PCB, in order to provide EMI shielding to the system and to be able to have more circuit patterns attached to perform various circuit operations.
Regarding claim 14, Kang teaches in figure 1 a PCB core laminate with a second PCB core (131) and a heat-dissipating material layer ([0034]; wherein layer 110 is a resin).
Kang does not teach a second heat-dissipating material layer interposed between the second PCB core and a magnetic sheet and a third heat-dissipating material layer interposed between a magnetic sheet and a control PCB.
However, Tsuk teaches in figure 1 a second heat-dissipating material layer (layer 16 below magnetic layer 18) interposed between the second PCB core (layers 12 and 14) and a magnetic sheet (18) and a third heat-dissipating material layer (layer 16 above magnetic layer 18) interposed between a magnetic sheet and a control PCB (layer 22 and surrounding layers 16).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the PCB core laminate of Kang to include a magnetic sheet, a control PCB, and more heat-dissipating layers, in order to provide EMI shielding to the system and to be able to have more circuit patterns attached to perform various circuit operations.
Regarding claim 19, Kang teaches in figure 1 a PCB core laminate with a second PCB core (131).
Kang does not teach a magnetic sheet and a control PCB stacked on the second PCB core.
However, Tsuk teaches in figure 1 a magnetic sheet (18) and a control PCB (layer 22 and surrounding layers 16) stacked on the second PCB core (layers 12 and 14).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the PCB core laminate of Kang to include a magnetic sheet and control PCB, in order to provide EMI shielding to the system and to be able to have more circuit patterns attached to perform various circuit operations.
Regarding claim 20, Kang teaches in figure 1 a PCB core laminate with a second PCB core (131) and a heat-dissipating material layer ([0034]; wherein layer 110 is a resin).
Kang does not teach a second heat-dissipating material layer interposed between the second PCB core and a magnetic sheet and a third heat-dissipating material layer interposed between a magnetic sheet and a control PCB.
However, Tsuk teaches in figure 1 a second heat-dissipating material layer (layer 16 below magnetic layer 18) interposed between the second PCB core (layers 12 and 14) and a magnetic sheet (18) and a third heat-dissipating material layer (layer 16 above magnetic layer 18) interposed between a magnetic sheet and a control PCB (layer 22 and surrounding layers 16).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the PCB core laminate of Kang to include a magnetic sheet, a control PCB, and more heat-dissipating layers, in order to provide EMI shielding to the system and to be able to have more circuit patterns attached to perform various circuit operations.
Pertinent Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure Hayashi (US 6191367 B1), Shin (US 20110067902 A1), and Hata (US 20200013690 A1).
Hayashi teaches a multilayer body with resin and conductive or magnetic sheet layers for use in a PCB.
Shin teaches a circuit board with a core layer and surface circuit patterns and a heat dissipating layer.
Hata teaches a PCB core with surface circuit patterns, resin materials with the same bases, a heat-dissipating layer, and heat-dissipating cut-outs.
The above references are considered of particular relevance to the claimed invention but cannot
be considered to teach the limitations or combined to being obvious to a person skilled in the art to
disclose the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ABIGAIL MARIE THAYER whose telephone number is (571)270-0134. The examiner can normally be reached M-Th/F 7:30-5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ABIGAIL MARIE THAYER/Examiner, Art Unit 2847
/Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2847
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