Prosecution Insights
Last updated: October 02, 2026
Application No. 18/826,381

INSPECTION DEVICE, INSPECTION METHOD, AND PROGRAM

Final Rejection §101
Filed
Sep 06, 2024
Priority
Dec 27, 2023 — JP 2023-220508
Examiner
PHAN, MINH Q
Art Unit
2852
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kabushiki Kaisha Toshiba
OA Round
2 (Final)
76%
Grant Probability
Favorable
3-4
OA Rounds
1m
Est. Remaining
71%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
646 granted / 852 resolved
+7.8% vs TC avg
Minimal -5% lift
Without
With
+-4.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
28 currently pending
Career history
870
Total Applications
across all art units

Statute-Specific Performance

§101
2.8%
-37.2% vs TC avg
§103
46.5%
+6.5% vs TC avg
§102
28.1%
-11.9% vs TC avg
§112
16.0%
-24.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 852 resolved cases

Office Action

§101
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 12-17 is/are rejected under 35 U.S.C. 101 because the claimed invention is 7directed to an abstract idea without significantly more. Claim 12 recites the limitation, “determine, based on a magnitude of a gradient of a change over time of the drain current, to what classification of a plurality of classifications sampling data included in the inspection data group corresponds, wherein the plurality of classifications comprises a first classification, a second classification, and a third classification, the first classification is a classification of sampling data included in a section other than a turning-on section and than a turning-off section, the first classification corresponds to a first safe operating area in a case that a direct current as the drain current flows in the transistor, the second classification is a classification of sampling data included in the turning-off section, the second classification corresponds to a second safe operating area in a case that a pulse current with a first pulse width flows in the transistor, the third classification is a classification of sampling data included in the turning-off section, the third classification corresponds to a third safe operating area in a case that a pulse current with a second pulse width narrower than the first pulse width flows in the transistor”. This limitation, as drafted is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for a recitation of generic computer components. That is, other than reciting “a data determining circuitry”, nothing in the claim element precludes the limitations from practically being perform in the mind. The limitation, “calculate first, second, and third electrical standards, based on the rated value of the drain-source voltage of the transistor, the maximum value of the on-resistance of the transistor, permissible loss of the transistor, and values of the drain current and the drain-source voltage that are associated with a secondary breakdown of the transistor, wherein the first electrical standard corresponds to the first safe operating area as the first classification in the case that a direct current as the drain current flows in the transistor, the second electrical standard corresponds to the second safe operating area as the second classification in the case that a pulse current with the first pulse width flows in the transistor, and the third electrical standard corresponds to the third safe operating area as the third classification in the case that a pulse current with the second pulse width flows in the transistor”. This limitation, as drafted, recites a mathematical concept or calculation that is used to calculate first, second, and third electrical standards based on the stored data. Thus, the claim recites a further mathematical calculation, which falls within the mathematical concept grouping of abstract ideas. Lastly, the limitation, “determine whether the sampling data included in the inspection data group satisfies each of the first, second, and third electrical standards, determine that sampling data in the first classification satisfy the first electrical standard in response to determination that the sampling data in the first classification are included in all of a first current limit area, a first voltage limit area, a first on-resistance limit area, a first thermal limit area, and a first secondary breakdown area which define the first safe operating area, determine that the sampling data in the first classification do not satisfy the first electrical standard in response to determination that the sampling data in the first classification are not included in at least one of the first current limit area, the first voltage limit area, the first on-resistance limit area, the first thermal limit area, and the first secondary breakdown, determine that sampling data in the second classification satisfy the second electrical standard in response to determination that the sampling data in the second classification are included in all of a second current limit area, a second voltage limit area, a second on-resistance limit area, a second thermal limit area, and a second secondary breakdown area which define the second safe operating area, determine that the sampling data in the second classification do not satisfy the second electrical standard in response to determination that the sampling data in the second classification are not included in at least one of the second current limit area, the second voltage limit area, the second on-resistance limit area, the second thermal limit area, and the second secondary breakdown, determine that sampling data in the third classification satisfy the third electrical standard in response to determination that the sampling data in the third classification are included in all of a third current limit area, a third voltage limit area, a third on-resistance limit area, a third thermal limit area, and a second third breakdown area which define the third safe operating area, and determine that the sampling data in the third classification do not satisfy the third electrical standard in response to determination that the sampling data in the third classification are not included in at least one of the third current limit area, the third voltage limit area, the third on-resistance limit area, the third thermal limit area, and a third secondary breakdown”. This limitation, as drafted is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for a recitation of generic computer components. That is, other than reciting “a standard determining circuitry”, nothing in the claim element precludes the limitations from practically being perform in the mind. Thus, the claim recites a combination of mental steps and mathematical concept. This judicial exception is not integrated into a practical application. In particular, the claim recites an inspection data storage and a specification data storage, however both storage units are recited at high level of generality, i.e. as a general means to store collected data, and they also amount to no more than a mere data gathering, which is a form of insignificant extra-solution activity. The claim further recites three additional elements: a data determining circuitry, a standard calculating circuitry and a standard determining circuitry. However, all circuitry elements are also recited at a high-level of generality, i.e. as generic computer components, such that they amount to no more than mere instructions to apply the exception using the generic computer components. Accordingly, the additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. Thus, the claim is not patent eligible. Independent claim 15 recites subject matter that is similar or analogous to that of claim 12, and therefore, the claim is also patent ineligible. Claims 13 and 16 fail to incorporate anything significantly more than the abstract idea of claim 12 and 15, respectively. Each claim recites an additional step of calculating, which is considered a part of an expanded abstract idea of independent claims 12 and 15, respectively, and do not integrate the abstract idea into a practical application, therefore the claim is also patent ineligible. Claims 14 and 17, each additional recites a waveform generating circuitry, however, it is recited at a high-level of generality, i.e. as a generic computer component. It also amounts to no more than a mere data gathering and outputting, which is a form of insignificant extra solution activity. (See MPEP 2106.05(g), selecting information, based on types of information and availability of information in a power-grid environment, for collection, analysis and display, Electric Power Group, LLC v. Alstom S.A., 830 F.3d 1350, 1354-55, 119 USPQ2d 1739, 1742 (Fed. Cir. 2016)). Accordingly, the additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. Thus, the claim is not patent eligible. Response to Arguments Applicant's arguments filed 07/07/2026 have been fully considered but they are not persuasive. Applicant alleges that the claimed features "a direct current rated value", "a pulse current rated value", "a rated value of the drain-source voltage", "a maximum value of an on-resistance of the transistor", and "a channel temperature of the transistor", each of those elements are physical elements that are not merely performed in the human mind, however the Examiner respectfully disagrees provided that the claimed features are just data configured to be stored on a generic storage device(s), which amounts to no more than just a mere data gathering, is a form of insignificant extra-solution activity. Secondly, applicant alleges that the ”data determining circuitry”, “standard calculating circuitry” and “standard determining circuitry” are circuitry elements that performs operations not in a human mind, however the Examiner, once again, respectfully disagrees provided these circuitry elements are recited at a high-level of generality, i.e. as generic computer components, such that they amount to no more than mere instructions to apply the exception, i.e. the abstract idea, using the generic computer components. Lastly, applicant further alleges that the claims are clearly directed to a practical application, citing that the claimed features can operate to inspect a circuit including a transistor, however the Examiner respectfully disagrees provided that the claimed feature, “operate to inspect a circuit including a transistor” is recited in the preamble as intended use for the invention. Therefore, the intended use limitation in the preamble does not carry patentable weight. See MPEP 2111.02(II). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MINH Q PHAN whose telephone number is (571)270-3898. The examiner can normally be reached Mon-Fri 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Stephanie Bloss can be reached at 571-272-3555. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MINH Q. PHAN Primary Examiner Art Unit 2852 /MINH Q PHAN/Primary Examiner, Art Unit 2852
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Prosecution Timeline

Sep 06, 2024
Application Filed
Apr 10, 2026
Non-Final Rejection mailed — §101
Jul 07, 2026
Response Filed
Sep 09, 2026
Final Rejection mailed — §101 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
76%
Grant Probability
71%
With Interview (-4.7%)
2y 2m (~1m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 852 resolved cases by this examiner. Grant probability derived from career allowance rate.

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