Prosecution Insights
Last updated: August 16, 2026
Application No. 18/826,871

RANGE IMAGING DEVICE AND RANGE IMAGING APPARATUS

Non-Final OA §102
Filed
Sep 06, 2024
Priority
Mar 08, 2022 — JP 2022-034960 +1 more
Examiner
SHAFI, MUHAMMAD
Art Unit
Tech Center
Assignee
Toppan Holdings Inc.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
1000 granted / 1122 resolved
+29.1% vs TC avg
Strong +16% interview lift
Without
With
+16.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
28 currently pending
Career history
1148
Total Applications
across all art units

Statute-Specific Performance

§101
17.3%
-22.7% vs TC avg
§103
52.1%
+12.1% vs TC avg
§102
8.2%
-31.8% vs TC avg
§112
19.5%
-20.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1122 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . 2. This communication is a first office action, non-final rejection on the merits. Claims 1-20, as originally filed, are currently pending and have been considered below. Claim Rejections - 35 USC § 102 3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 4. Claims 1-20 are rejected under 35 U.S.C. 102 (1) (a) as being anticipated by Isogai et al. (USP 2023/0154950). As Per Claim 1, Isogai et al. ( Isogai) teaches, a range imaging device, ( via a distance measuring device 1 , which includes a signal processing section 13, which is equipped with a distance generation section 22, [0049], Fig.1) comprising: a semiconductor substrate; ( via "the pixel array section 41, the vertical drive section 42, the column processing section 43, the horizontal drive section 44, and the system control section 45 are provided on a not-illustrated semiconductor substrate (chip)", [0057], see Fig. 2), a pixel circuit formed at a surface of the semiconductor substrate and including a photoelectric conversion device, a plurality of charge storages, a transfer transistor, and a charge drainage transistor, wherein the photoelectric conversion device is configured to generate charge carriers based on light incident from a space targeted for measurement, (via "the pixel array section 41, the vertical drive section 42, the column processing section 43, the horizontal drive section 44, and the system control section 45 are provided on a not-illustrated semiconductor substrate (chip)", see Fig. 2),[0057], .."The PD 51A is, for example, a photoelectric conversion section including a PN-junction photodiode; and receives light (reflected light) obtained by irradiation light being reflected by an object and returning, generates a charge according to the amount of received light by photoelectric conversion", [0076].. "The N-type semiconductor region 122 is a photoelectric conversion region that converts injected reflected light into electrons as a signal charge. A high-concentration P-type semiconductor region (P+ semiconductor region) 123 serving as a hole storage layer is formed in a near-surface region", see Fig. 6,15(123))[0106]); the charge drainage transistor is positioned on a drainage path and configured to drain the charge carriers from the photoelectric conversion device through the drainage path, ([0076], [0106]); also "The reset transistor 54A is a reset, section that, when turned on by a drive signal supplied to the gate, initializes (resets) the FD 53A to a reset voltage")[0079]); each of the charge storages is configured to store at least portion of the charge carriers generated by the photoelectric conversion device, (via "The first and second configuration examples described above are pixels of a two-tap structure in which one pixel includes two charge storage sections"); [0178].. "The pixel 50 of FIG. 3 is a pixel circuit of a pixel structure called a two- tap structure in which two charge storage sections that store a charge obtained by photoelectrically converting reflected light are provided in one pixel", [0069], see in particular the pixel circuits of Figs. 6 and 15), the transfer transistor is positioned on a transfer path and configured to transfer at least portion of the charge carriers from the photoelectric conversion device to a corresponding one of the charge storages through the transfer path, ( via "when the first transfer transistor 52A is turned on, the stored charge of the PD 51 is transferred to and held in a memory section formed in an N+ semiconductor region between the first transfer transistor 52 and the second transfer transistor 65. When the second transfer transistor 65 is turned on by a drive signal supplied to the gate CG of the second transfer transistor 65, the charge stored in the memory section is transferred to the FD 53 formed in an N+ semiconductor region", [0171], [0079], [0069], see Fig. 6 and 15); the photoelectric conversion device has a rectangular shape, (See Figs. 6 and 15), the charge drainage transistor includes two charge drainage transistors (see the transistors marked "RST" in Figs. 6,15 (54A,54B)); positioned on a y-axis and facing each other symmetrically with respect to a x-axis, where the x-axis is parallel to long sides of the photoelectric conversion device and passes through a center of the photoelectric conversion device, and the y-axis is parallel to short sides of the photoelectric conversion device and passes through the center of the photoelectric conversion device (via the drainage transistors are located on a horizontal axis in the figures and are symmetrical with respect to a vertical axis in the figures, and wherein any side of the photoelectric conversion device qualifies as both "long" and "short" due to the device being quadratic, Figs. 6 and 15)). As per Claim 2, Isogai teaches the limitation of Claim 1. However, Isogai further teaches, wherein the transfer transistor includes 2M transfer transistors where M is an integer greater than or equal to 2, and M transfer transistors of the 2M transfer transistors are positioned on each of long sides symmetrically with respect to the x-axis such that the M transfer transistors on one of the long sides is facing the M transfer transistors on the other of the long sides (via "the transfer transistors 52A and 52B are arranged facing each other on the outsides of the two sides in the left-right direction of the P+ semiconductor region 123 in a square shape", [0113]) and .. "in each of the first tap 71A and the second tap 71B, a second transfer transistor 65 is added between the transfer transistor 52 and the FD 53. That is, in the first tap 71A, a second transfer transistor 65A is added between the transfer transistor 52A and the PD 53A, and in the second tap 71B, a second transfer transistor 65B is added between the transfer transistor 52B and the FD 53B",[0165], see Fig.. 15 (52AB,65AB)). As per Claim 3, Isogai teaches the limitation of Claim 1. However, Isogai further teaches, wherein the transfer transistor has a channel length longer than a channel length of the charge drainage transistor. (See Fig. 5 (52AB,54AB)). As per Claim 4, Isogai teaches the limitation of Claim 1. However, Isogai further teaches, wherein the transfer transistor has a channel region that is entirely or partially channel-doped with n-type impurities ( via "Each pixel transistor of the transfer transistor 52, the reset transistor 54, the feedback enable transistor 55, the discharge transistor 56, the amplification transistor 57, the selection transistor 58, and the switching transistor 59 includes, for example, an N-type MOS transistor" [0073])). As per Claim 5, Isogai teaches the limitation of Claim 1. However, Isogai further teaches, a microlens facing a surface of the pixel circuit such that the surface of the pixel circuit is positioned to receive the light and that the microlens has an optical axis perpendicular to an entrance surface of the photoelectric conversion device and passing through a center of the entrance surface positioned to receive the light. ( via "the pixel 50 is formed in a semiconductor substrate 100 containing, for example, silicon (Si) or the like; an on-chip lens 111 is formed on one surface (a first surface) of the semiconductor substrate 100", see Fig. 5, wherein $0145: "the on-chip lens 111 is formed on the back surface side serving as a light incident surface of the semiconductor substrate 100", [0105])). As per Claim 6, Isogai teaches the limitation of Claim 1. However, Isogai further teaches, a range imaging apparatus, comprising: a light receiving unit including the range imaging device (via “ A distance measuring device 1 of FIG. 1 is a device that performs distance measurement by an indirect ToF system, and includes a lens 11, a light receiving section (light receiving device) 12,[0049]); and a distance image processing unit comprising circuitry configured to obtain a distance from the range imaging device to a subject based on a distance image captured by the range imaging device. ( via "The distance image generation section 22 of the signal processing section 13 generates, on the basis of a detection signal supplied from the light receiving section 12, a distance image in which information of the distance to an object is stored for each pixel, and outputs the distance image. The distance image generation section 22 functions as a calculation section that calculates the distance from the distance measuring device 1 to an object", [0054], see Fig. 1). As per Claim 7, Isogai teaches the limitation of Claim 2. However, Isogai further teaches, wherein the transfer transistor has a channel length longer than a channel length of the charge drainage transistor (See Fig. 5 (52AB,54AB)). As per Claim 8, Isogai teaches the limitation of Claim 2. However, Isogai further teaches, wherein the transfer transistor has a channel region that is entirely or partially channel-doped with n-type impurities ( via "Each pixel transistor of the transfer transistor 52, the reset transistor 54, the feedback enable transistor 55, the discharge transistor 56, the amplification transistor 57, the selection transistor 58, and the switching transistor 59 includes, for example, an N-type MOS transistor" [0073])). As per Claim 9, Isogai teaches the limitation of Claim 2. However, Isogai further teaches, a microlens facing a surface of the pixel circuit such that the surface of the pixel circuit is positioned to receive the light and that the microlens has an optical axis perpendicular to an entrance surface of the photoelectric conversion device and passing through a center of the entrance surface positioned to receive the light. ( via "the pixel 50 is formed in a semiconductor substrate 100 containing, for example, silicon (Si) or the like; an on-chip lens 111 is formed on one surface (a first surface) of the semiconductor substrate 100", see Fig. 5, wherein $0145: "the on-chip lens 111 is formed on the back surface side serving as a light incident surface of the semiconductor substrate 100", [0105])). As per Claim 10, Isogai teaches the limitation of Claim 2. However, Isogai further teaches, a range imaging apparatus, comprising: a light receiving unit including the range imaging device ( via “ A distance measuring device 1 of FIG. 1 is a device that performs distance measurement by an indirect ToF system, and includes a lens 11, a light receiving section (light receiving device) 12,[0049]); and a distance image processing unit comprising circuitry configured to obtain a distance from the range imaging device to a subject based on a distance image captured by the range imaging device ( via "The distance image generation section 22 of the signal processing section 13 generates, on the basis of a detection signal supplied from the light receiving section 12, a distance image in which information of the distance to an object is stored for each pixel, and outputs the distance image. The distance image generation section 22 functions as a calculation section that calculates the distance from the distance measuring device 1 to an object", [0054], see Fig. 1). As per Claim 11, Isogai teaches the limitation of Claim 3. However, Isogai further teaches, wherein the transfer transistor has a channel region that is entirely or partially channel-doped with n-type impurities ( via "Each pixel transistor of the transfer transistor 52, the reset transistor 54, the feedback enable transistor 55, the discharge transistor 56, the amplification transistor 57, the selection transistor 58, and the switching transistor 59 includes, for example, an N-type MOS transistor" [0073])). As per Claim 12, Isogai teaches the limitation of Claim 3. However, Isogai further teaches, a microlens facing a surface of the pixel circuit such that the surface of the pixel circuit is positioned to receive the light and that the microlens has an optical axis perpendicular to an entrance surface of the photoelectric conversion device and passing through a center of the entrance surface positioned to receive the light ( via "the pixel 50 is formed in a semiconductor substrate 100 containing, for example, silicon (Si) or the like; an on-chip lens 111 is formed on one surface (a first surface) of the semiconductor substrate 100", see Fig. 5, wherein $0145: "the on-chip lens 111 is formed on the back surface side serving as a light incident surface of the semiconductor substrate 100", [0105])). As per Claim 13, Isogai teaches the limitation of Claim 3 . However, Isogai further teaches, a range imaging apparatus, comprising: a light receiving unit including the range imaging device (via “ A distance measuring device 1 of FIG. 1 is a device that performs distance measurement by an indirect ToF system, and includes a lens 11, a light receiving section (light receiving device) 12,[0049]); and a distance image processing unit comprising circuitry configured to obtain a distance from the range imaging device to a subject based on a distance image captured by the range imaging device ( via "The distance image generation section 22 of the signal processing section 13 generates, on the basis of a detection signal supplied from the light receiving section 12, a distance image in which information of the distance to an object is stored for each pixel, and outputs the distance image. The distance image generation section 22 functions as a calculation section that calculates the distance from the distance measuring device 1 to an object", [0054], see Fig. 1). As per Claim 14, Isogai teaches the limitation of Claim 4. However, Isogai further teaches, a microlens facing a surface of the pixel circuit such that the surface of the pixel circuit is positioned to receive the light and that the microlens has an optical axis perpendicular to an entrance surface of the photoelectric conversion device and passing through a center of the entrance surface positioned to receive the light ( via "the pixel 50 is formed in a semiconductor substrate 100 containing, for example, silicon (Si) or the like; an on-chip lens 111 is formed on one surface (a first surface) of the semiconductor substrate 100", see fig. 5, wherein $0145: "the on-chip lens 111 is formed on the back surface side serving as a light incident surface of the semiconductor substrate 100", [0105])). As per Claim 15, Isogai teaches the limitation of Claim 4. However, Isogai further teaches, range imaging apparatus, comprising: a light receiving unit including the range imaging device (via “ A distance measuring device 1 of FIG. 1 is a device that performs distance measurement by an indirect ToF system, and includes a lens 11, a light receiving section (light receiving device) 12,[0049]); and a distance image processing unit comprising circuitry configured to obtain a distance from the range imaging device to a subject based on a distance image captured by the range imaging device ( via "The distance image generation section 22 of the signal processing section 13 generates, on the basis of a detection signal supplied from the light receiving section 12, a distance image in which information of the distance to an object is stored for each pixel, and outputs the distance image. The distance image generation section 22 functions as a calculation section that calculates the distance from the distance measuring device 1 to an object", [0054], see Fig. 1). As per Claim 16, Isogai teaches the limitation of Claim 5. However, Isogai further teaches, a range imaging apparatus, comprising: a light receiving unit including the range imaging device (via “ A distance measuring device 1 of FIG. 1 is a device that performs distance measurement by an indirect ToF system, and includes a lens 11, a light receiving section (light receiving device) 12,[0049]); and a distance image processing unit comprising circuitry configured to obtain a distance from the range imaging device to a subject based on a distance image captured by the range imaging device ( via "The distance image generation section 22 of the signal processing section 13 generates, on the basis of a detection signal supplied from the light receiving section 12, a distance image in which information of the distance to an object is stored for each pixel, and outputs the distance image. The distance image generation section 22 functions as a calculation section that calculates the distance from the distance measuring device 1 to an object", [0054], see Fig. 1). As per Claim 17, Isogai teaches the limitation of Claim 7. However, Isogai further teaches, wherein the transfer transistor has a channel region that is entirely or partially channel-doped with n-type impurities ( via "Each pixel transistor of the transfer transistor 52, the reset transistor 54, the feedback enable transistor 55, the discharge transistor 56, the amplification transistor 57, the selection transistor 58, and the switching transistor 59 includes, for example, an N-type MOS transistor" [0073])). As per Claim 18, Isogai teaches the limitation of Claim 7. However, Isogai further teaches, a microlens facing a surface of the pixel circuit such that the surface of the pixel circuit is positioned to receive the light and that the microlens has an optical axis perpendicular to an entrance surface of the photoelectric conversion device and passing through a center of the entrance surface positioned to receive the light (via "the pixel 50 is formed in a semiconductor substrate 100 containing, for example, silicon (Si) or the like; an on-chip lens 111 is formed on one surface (a first surface) of the semiconductor substrate 100", see Fig. 5, wherein $0145: "the on-chip lens 111 is formed on the back surface side serving as a light incident surface of the semiconductor substrate 100", [0105])). As per Claim 19, Isogai teaches the limitation of Claim 7. However, Isogai further teaches, a range imaging apparatus, comprising: a light receiving unit including the range imaging device (via “ A distance measuring device 1 of FIG. 1 is a device that performs distance measurement by an indirect ToF system, and includes a lens 11, a light receiving section (light receiving device) 12,[0049]); and a distance image processing unit comprising circuitry configured to obtain a distance from the range imaging device to a subject based on a distance image captured by the range imaging device. ( via "The distance image generation section 22 of the signal processing section 13 generates, on the basis of a detection signal supplied from the light receiving section 12, a distance image in which information of the distance to an object is stored for each pixel, and outputs the distance image. The distance image generation section 22 functions as a calculation section that calculates the distance from the distance measuring device 1 to an object", [0054], see Fig. 1). As per Claim 20, Isogai teaches the limitation of Claim 17. However, Isogai further teaches, a microlens facing a surface of the pixel circuit such that the surface of the pixel circuit is positioned to receive the light and that the microlens has an optical axis perpendicular to an entrance surface of the photoelectric conversion device and passing through a center of the entrance surface positioned to receive the light ( via "the pixel 50 is formed in a semiconductor substrate 100 containing, for example, silicon (Si) or the like; an on-chip lens 111 is formed on one surface (a first surface) of the semiconductor substrate 100", see Fig. 5, wherein $0145: "the on-chip lens 111 is formed on the back surface side serving as a light incident surface of the semiconductor substrate 100", [0105])). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUHAMMAD SHAFI whose telephone number is (571)270-5741. The examiner can normally be reached M-F 8:30 am -5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Scott Browne can be reached at 571-270-0151. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MUHAMMAD SHAFI/Primary Examiner, Art Unit 3666C
Read full office action

Prosecution Timeline

Sep 06, 2024
Application Filed
Aug 06, 2026
Non-Final Rejection mailed — §102 (current)

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
99%
With Interview (+16.3%)
2y 4m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1122 resolved cases by this examiner. Grant probability derived from career allowance rate.

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