CTNF 18/827,067 CTNF 86257 DETAILED ACTION This Office action is in response to the application filed on 06 September 2024. Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 07-20-02-aia AIA This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Priority 02-26 AIA Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 16, 18-21, 29-30, 33 and 35 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Chen et al. (US 2022/0399820; “Chen”) . In re claims 16, 33 and 35, Chen discloses a switched mode power supply, SMPS (Fig. 1), and the corresponding method if its control 1 , the SMPS comprising a primary winding (Fig. 1: 103, Np) configured to receive an input voltage (voltage output from rectifier 101) at a first terminal of the primary winding (primary winding receives input voltage at the upper, dotted terminal thereof); a first capacitor (CSN or the unlabeled capacitor in parallel with diode D2, within box 104 of Fig. 1) coupled in series between a second terminal of the primary winding and a reference terminal configured to be coupled to a reference voltage (e.g., the unlabeled capacitor is in series between the lower, non-dotted terminal of Np and the reference node being the circuit node at the upper terminal of the capacitor; the reference voltage is interpreted to be defined as the voltage at such reference node); and a secondary winding (Ns within 103) configured to provide an output voltage of the SMPS based on the input voltage (NS provides output voltage Vo based on transformation of input voltage); and an auxiliary winding (Na within 109) inductively coupled to one or both of the primary winding and the secondary winding (Na is part of the transformer 103, as understood from the descriptions of operation in [0034] and [0037]) and configured to provide an auxiliary voltage based at least on a voltage of the first capacitor (winding Na provides aux voltage Vaux based on the operation of the primary side circuitry, including the first capacitor: see [0034]); and a controller (105), wherein the controller is configured to output an overvoltage signal (see Fig. 4: signal VINOVP is output from 215 within controller 105) indicative of an overvoltage across the first capacitor (see [0050]: signal VINOVP is indicative of overvoltage on the input/primary side circuitry, to include the first capacitor), based on a comparison of the auxiliary voltage during a primary stroke of the SMPS [0041]: OVP detection occurs during primary stroke duration ton) to a threshold indicative of a predetermined maximum first capacitor voltage (Fig. 4 and [0050]: the circuit compares signal IM/IFB, indicative 0f the aux voltage Vaux ([0043], [0048]), to the reference signal IVINOVP_TH, that sets the threshold of maximum allowed voltage on the input/primary side circuit, to include the first capacitor). In re claim 18, out of the three recited alternatives requiring the predetermined maximum first capacitor voltage to be an analogue signal comprising the predetermined maximum capacitor voltage or a signal representative of the predetermined maximum capacitor voltage or a digital signal representative of the predetermined maximum capacitor voltage, Chen discloses that the predetermined maximum first capacitor voltage is a signal representative of the predetermined maximum capacitor voltage (Figs. 1, 4: signal IVINOVP_TH from source 213 in Fig. 4 is a signal representing the overvoltage threshold for the primary side circuit, to include the first capacitor). In re claim 19, Chen discloses wherein the controller is configured to, in response to the overvoltage signal (VINOVP in Fig. 4), control the SMPS to stop charging the first capacitor (Abstract, [0050]: triggering of the overvoltage protection function by signal VINOVP). In re claim 20, Chen discloses wherein the controller is thereby configured to control the duration for which the first capacitor is charged during each primary stroke based at least in part on the overvoltage signal (that is, the duration of primary stroke will be controlled for each primary stroke that triggers the OVP function; see Abstract, [0050]). In re claim 21, Chen discloses wherein the controller comprises: a first input terminal (Fig. 1: terminal Vcc of controller 105) configured to receive a first voltage indicative of the input voltage (Vcc is indicative of input voltage at startup because of starter circuit R_ON, C2: [0034]); a second input terminal (Fig. 1: terminal FB of controller 105) configured to receive a second voltage indicative of the auxiliary voltage (signal FB is received from voltage divider detecting Vaux: [0038]); and a comparator (circuit of Fig. 4) configured to receive a first signal indicative of the first voltage (Fig. 4: circuit receives Vcc at top of figure), and a second signal indicative of the second voltage (Fig. 4: circuit receives IFB indicative of VFB: [0040]), wherein the comparator is further configured to output the overvoltage signal (VINOVP) indicative of an overvoltage across the first capacitor based on the second signal during the primary stroke of the SMPS and the first signal and the threshold indicative of the predetermined maximum first capacitor voltage ([0050]). In re claim 29, Chen discloses wherein, the comparison is based on the auxiliary voltage present on the auxiliary winding only during the primary stroke ([0040], [0041]). In re claim 30, Chen discloses wherein the controller is configured to receive the second voltage from a first voltage divider (Fig. 1: R1, R2) coupled in parallel across the auxiliary winding (Na), wherein the first voltage divider comprises a first resistor (R1) having a resistance R 1 and a second resistor (R2) having a resistance R 2 , wherein a first terminal of the first resistor is coupled to a first terminal of the auxiliary winding (Fig. 1: top of R1 connected to top of Na) and a second terminal of the first resistor is coupled to a first node (bottom of R1 connected to FB node) and a first terminal of the second resistor is coupled to the first node (top of R2 connected to FB node) and wherein the second terminal of the second resistor is coupled to the reference terminal (bottom of R2 indirectly connected to reference terminal via ground), and wherein the first node provides the second voltage upon which the second signal is based (first node FB provides VFB; see [0041]) . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 17, 22-28, 31-32, and 34 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims . 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: With respect to claim 17, the closest prior art in Chen (cited above) discloses the invention according to claim 16, but does not disclose wherein said comparison comprises a comparison between the threshold and a difference between the input voltage and the auxiliary voltage. That is, in Chen, the comparison is between the threshold and the auxiliary voltage, rather than a difference between the input voltage and the auxiliary voltage. Furthermore, the additional prior art on record does not suggest a reason to modify Chen in a manner that would arrive at the claimed solution. With respect to claim 22, the closest prior art in Chen (cited above) discloses the invention according to claim 21, but does not disclose the further features of wherein the first signal is based on a difference between the first voltage and the threshold indicative of the predetermined maximum first capacitor voltage. That is, in Chen, the first signal is merely based on the first voltage, without regard to the threshold. Furthermore, the additional prior art on record does not suggest a reason to modify Chen in a manner that would arrive at the claimed solution. With respect to claim 23, the closest prior art in Chen (cited above) discloses the invention according to claim 16, but does not disclose wherein the controller is configured to generate the first signal by performing one or more arithmetic operations on the first voltage before being provided to the first input terminal of the comparator. That is, in Chen, the first signal is generated directly from the first voltage, without regard to arithmetic operations. Furthermore, the additional prior art on record does not suggest a reason to modify Chen in a manner that would arrive at the claimed solution. With respect to claim 24, the closest prior art in Chen (cited above) discloses the invention according to claim 16, but does not disclose wherein the controller is configured to generate the second signal by performing one or more arithmetic operations on the second voltage before being provided to the second input terminal of the comparator. That is, in Chen, the second signal is generated directly from the second voltage, without regard to any arithmetic operations. Furthermore, the additional prior art on record does not suggest a reason to modify Chen in a manner that would arrive at the claimed solution. With respect to claim 25, the closest prior art in Chen (cited above) discloses the invention according to claim 16, but does not disclose wherein the controller is configured to generate both the first signal and second signal by performing one or more arithmetic operations on the first voltage and second voltage before being provided to the first input terminal and the second input terminal of the comparator respectively. That is, in Chen, first and second signals are generated directly form the first and second voltages, without regard to any arithmetic operations. Furthermore, the additional prior art on record does not suggest a reason to modify Chen in a manner that would arrive at the claimed solution. With respect to claim 26, the closest prior art in Chen (cited above) discloses the invention according to claim 16, but does not disclose wherein the comparator is configured to output the overvoltage signal when the second signal exceeds the first signal. That is, in Chen, the comparison is between the threshold and the second signal, rather than between the first signal and the second signal. Furthermore, the additional prior art on record does not suggest a reason to modify Chen in a manner that would arrive at the claimed solution. With respect to claim 27, the closest prior art in Chen (cited above) discloses the invention according to claim 16, but does not disclose wherein the controller is configured to, in response to the output of the overvoltage signal, shorten the duration of the primary stroke to thereby limit the voltage to which the first capacitor is charged during one or more subsequent primary strokes of the SMPS. That is, in Chen, the overvoltage signal merely triggers the OVP function, without regard to shortening a duration of charging the first capacitor in one or more subsequent primary strokes. Furthermore, the additional prior art on record does not suggest a reason to modify Chen in a manner that would arrive at the claimed solution. With respect to claim 28, the closest prior art in Chen (cited above) discloses the invention according to claim 16, but does not disclose wherein the controller includes a difference element, wherein the difference element is configured to generate the first signal based on a third signal that is indicative of the first voltage, minus the predetermined maximum first capacitor voltage. That is, in Chen, the comparator simply uses the threshold signal, without regard to a difference circuit for subtracting the predetermined maximum capacitor voltage from the first voltage. Furthermore, the additional prior art on record does not suggest a reason to modify Chen in a manner that would arrive at the claimed solution. Claim 34 depends from claim 28 and thus inherits the above subject matter indicated to be allowable. With respect to claim 31, the closest prior art in Chen (cited above) discloses the invention according to claim 16, but does not disclose wherein the controller is configured to receive the first voltage from a second voltage divider comprising: a third resistor and a fourth resistor, wherein a first terminal of the third resistor is configured to receive the input voltage and a second terminal of the third resistor is coupled to a second node and a first terminal of the fourth resistor is coupled to the second node and wherein the second terminal of the fourth resistor is coupled to the reference terminal, and wherein the second node provides the first voltage upon which the first signal is based. That is, in Chen, the first voltage is received through resistor R_ON and capacitor C2, rather than from a voltage divider having two resistors as claimed. Furthermore, the additional prior art on record does not suggest a reason to modify Chen in a manner that would arrive at the claimed solution. With respect to claim 32, the closest prior art in Chen (cited above) discloses the invention according to claim 16, but does not disclose wherein the controller is configured to provide a first switching signal to control the primary stroke of the SMPS during which the first capacitor is charged and a second switching signal to control a secondary stroke of the SMPS during which the first capacitor is discharged. That is, in Chen, only one signal (DRV, provided to gate of Q3 in Fig. 1) is provided to control the primary stroke, without regard to a second signal for controlling a secondary stroke. Furthermore, the additional prior art on record does not suggest a reason to modify Chen in a manner that would arrive at the claimed solution . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure : US 2006/0202562 discloses a Quasi Resonant Type Switching Power Supply Unit And Quasi Resonant Type Switching Power Apparatus Using The Same including an OVP mechanism that detects voltage on an auxiliary winding. US 2024/0275275 discloses a RESONANT AHB FLYBACK POWER CONVERTER AND SWITCHING CONTROL CIRCUIT THEREOF including detecting an overvoltage condition based on voltage across an auxiliary winding of the transformer. US 2024/0305206 discloses OVERLOAD PROTECTION IN A VOLTAGE CONVERTER involving detection of voltage on an auxiliary winding of the transformer. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FRED E FINCH III whose telephone number is (571)270-7883. The examiner can normally be reached Monday-Friday, 8:00 AM - 4:30 PM ET. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FRED E FINCH III/Primary Examiner, Art Unit 2838 Application/Control Number: 18/827,067 Page 2 Art Unit: 2838 Application/Control Number: 18/827,067 Page 3 Art Unit: 2838 Application/Control Number: 18/827,067 Page 4 Art Unit: 2838 Application/Control Number: 18/827,067 Page 5 Art Unit: 2838 Application/Control Number: 18/827,067 Page 6 Art Unit: 2838 Application/Control Number: 18/827,067 Page 7 Art Unit: 2838 Application/Control Number: 18/827,067 Page 8 Art Unit: 2838 Application/Control Number: 18/827,067 Page 9 Art Unit: 2838 Application/Control Number: 18/827,067 Page 10 Art Unit: 2838 Application/Control Number: 18/827,067 Page 11 Art Unit: 2838 Application/Control Number: 18/827,067 Page 12 Art Unit: 2838 1 The control method of claim 35 contains the essentially the same structural and functional limitations as recited in the controller and SMPS of claims 16 and 33. Thus, the citations made to Chen are understood as equally applicable to the method as to the controller itself.
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