DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 recites the limitation "the field-effect transistors" in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 9, 10, 12-14, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhan et al (US PGPUB 2007/0268072).
Regarding claim 9, Figure 2 of Zhan discloses a source-follower circuit, comprising:
an input node configured to receive an input signal VIN having a dominant frequency fPPF [gate of 206]
a field-effect transistor M1 with its gate terminal connected to the input node [206]
a capacitor CPPF connected to the source terminal of the field-effect transistor M1 [216]
wherein the output resistance RM1 seen at the source terminal of the field-effect transistor M1 and the capacitance of the capacitor CPPF are configured to define the frequency response of the source-follower circuit so that, based on the input signal VIN, a signal VLAG is generated at the source terminal of the transistor M1 which lags the input signal VIN in phase by a given phase shift ∆ϕLAG [inherent]
the capacitor CPFF is substantially directly connected between the source terminal of the field-effect transistor and a supply voltage node [216]
Zhan does not explicitly disclose a MOS capacitor
However, it would have been obvious to of ordinary skill in the art before the effective filing date of the claimed invention to modify the circuit of Zhan by using a MOS capacitor as a matter of simple design-choice, since MOS capacitors were well-known and it would have been a matter of simple substitution of one known element for another to obtain predictable results.
Regarding claim 10, Figure 2 of Zhan, as applied to claim 9, discloses wherein the capacitor CPPF is implemented as a field-effect transistor configured as the MOS capacitor [see rejection of claim 9].
Regarding claim 12, Figure 2 of Zhan, as applied to claim 9, discloses wherein: a current source or a resistor is connected between the source terminal of the transistor and a supply voltage node, optionally wherein that current source or resistor is implemented as a field-effect transistor [214].
Regarding claim 13, Figure 2 of Zhan, as applied to claim 9, discloses wherein: the drain terminal of the transistor is connected directly to its supply voltage node [206 and VDD].
Regarding claim 14 as best understood, Figure 2 of Zhan, as applied to claim 9, disclose wherein the field-effect transistors are of the same or similar type and/or of the same semiconductor fabrication process [206].
Regarding claim 17, Figure 2 of Zhan, as applied to claim 9, discloses integrated circuitry, such as an IC chip, comprising the source-follower circuit [Figure 2].
Allowable Subject Matter
Claims 1-8, 15, and 16 are allowed.
Claim 11 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tomi S Skibinski whose telephone number is (571)270-7581. The examiner can normally be reached Mon. - Fri. 10am - 8pm.
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/TOMI SKIBINSKI/Primary Examiner, Art Unit 2842
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