DETAILED ACTION
This office action is in response to the application filed on 09/06/2024. Claims 1-14 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Drawing
The drawing submitted on 09/06/2024 is objected to under 37 CFR 1.83(a). Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
.Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claims 9-14, Applicant recite the limitations “… The control method for multi-phase control of the high-voltage converter of claim 1 …” in claims 9-11, 13, and “… The control method for multi-phase control of the high-voltage converter of claim 4 …” in claim 12, and “… The control method for multi-phase control of the high-voltage converter of claim 6 …” in claim 14 without proper antecedence basis. It is not clear what control method of the respective claims Applicants are referring to. Therefore, the metes and bounds of the claim are unclear. Applicant’s correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 4, 6, 8-9, 11, 13-14 are rejected under 35 U.S.C. 102(a)(1) and/or (a)(2) as being anticipated by ABE (US Patent or PG Pub. No. 20180301987, hereinafter ‘987)
Claim 1, ‘987 teaches a control system for multi-phase control of a high-voltage converter (e.g., see Fig. 1), the control system comprising: a multi-phase converter (e.g., the m-phase converter 1) comprising inputs and outputs each connected in parallel to convert a direct current (DC) input voltage (e.g., the voltage of 91) into a DC output voltage (e.g., the voltage across 92) of a different level, and having different phases (e.g., m phases, see [0026][0035], Fig. 1); and a microcontroller (e.g., the circuit 3, see [0035]) outputting a control signal, which is a PWM signal (e.g., the PWMs), to boost or lower the DC input voltage of the multi-phase converter to the DC output voltage of a different level, wherein the microcontroller comprises at least one core, and the core comprises: a first controller (e.g., the means generating driving signals for, CV1, CV3, when phase number m=4) controlling two phases of the multi-phase converter having a phase difference of 180 degrees (e.g., the phase difference of CV1 and CV3 being 2*360/4 = 180 degree, see [0035], Fig. 1); and a second controller (e.g., the means generating driving signals for, CV2, CV4, when phase number m=4) controlling two different phases of the multi-phase converter having a phase difference of 180 degrees (e.g., the phase difference of CV2 and CV4 being 2*360/4 = 180 degree) and having a predetermined phase difference from the two phases of the first controller (e.g., the phase difference of CV1-CV2 and/or the phase difference of CV3-CV4 being 1*360/4 = 90 degree, see [0035], Fig. 1).
Claim 2, ‘987 teaches the limitations of claim 1 as discussed above. It further teaches that wherein when the core of the microcontroller is a single core (e.g., 3) and the first controller and the second controller control four phases (e.g., when m=4), a first phase (e.g., the phase CV1) of the first controller has a phase difference of 90 degrees from a first phase (e.g., the phase CV2) of the second controller, and a second phase (e.g., the phase CV3) of the first controller has a phase difference of 90 degrees from a second phase (e.g., the phase CV4) of the second controller (e.g., see [0035], Fig. 1).
Claim 4, ‘987 teaches the limitations of claim 1 as discussed above. It further teaches that wherein when the microcontroller includes three cores (e.g., the means generating PWM driving signals of CV1, CV7, CV4, CV10, the corresponding means generating PWM driving signals of CV2, CV8, CV5, CV11, and the means generating PWM driving signals of CV3, CV9, CV6, CV12, respectively), and the three cores control 12 phases (e.g., when m=12), each core including a first controller (e.g., the corresponding means generating the PWM driving signals of CV1 and CV4, and the corresponding means generating the PWM driving signals of CV2 and CV5, the corresponding means generating the PWM driving signals of CV3 and CV6, respectively) and a second controller each controlling 2 phases (e.g., the corresponding means generating the PWM driving signals of CV7 and CV10, and the corresponding means generating the PWM driving signals of CV8 and CV11, the corresponding means generating the PWM driving signals of CV9 and CV12, respectively), each phase of the first core is controlled to sequentially have a phase difference of 30 degrees from each phase of the second core (e.g., the phase difference of respective adjacent phase of CV1-CV12 being 360/12= 30 degree, when m=12, see [0035], Fig. 1), and each phase of the second core is controlled to sequentially have a phase difference of 30 degrees from each phase of the third core (e.g., the phase difference of respective adjacent phase of CV1-CV12 being 360/12=30 degree when m=12, see [0035], Fig. 1).
Claim 6, ‘987 teaches the limitations of claim 1 as discussed above. It further teaches that wherein when the microcontroller includes three cores (e.g., the means generating PWM driving signals of CV1, CV4, CV7, CV10, CV13, CV16, the corresponding means generating PWM driving signals of CV2, CV5, CV8, CV11, CV14, CV17, and the means generating PWM driving signals of CV3, CV6, CV9, CV12, CV15, CV18, respectively), and the three cores control 18 phases (e.g., when m=18), each core including a first controller (e.g., the corresponding means generating the PWM driving signals of CV1 and CV4, and the corresponding means generating the PWM driving signals of CV2 and CV5, the corresponding means generating the PWM driving signals of CV3 and CV6, respectively), a second controller (e.g., the corresponding means generating the PWM driving signals of CV7 and CV10, and the corresponding means generating the PWM driving signals of CV8 and CV11, the corresponding means generating the PWM driving signals of CV9 and CV12, respectively) and a third controller (e.g., the corresponding means generating the PWM driving signals of CV13 and CV16, and the corresponding means generating the PWM driving signals of CV14 and CV17, the corresponding means generating the PWM driving signals of CV15 and CV18, respectively), each controlling 2 phases, each phase of the first core is controlled to sequentially have a phase difference of 20 degrees from each phase of the second core (e.g., the phase difference of respective adjacent phase of such as CV1-CV12 being 360/12= 20 degree, when m=18, see [0035], Fig. 1), and each phase of the second core is controlled to sequentially have a phase difference of 20 degrees from each phase of the third core (e.g., the phase difference of respective adjacent phase of CV1-CV12 being 360/12=20 degree when m=18, see [0035], Fig. 1).
For method claims 8-14, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore, the previous rejections based on the apparatus will not be repeated.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1,148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating
obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims under 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various claims was commonly owned at the time any inventions covered therein were made absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was not commonly owned at the time a later invention was made in order for the examiner to consider the applicability of 35 U.S.C. 103(c) and potential 35 U.S.C. 102(e), (f) or (g) prior art under 35 U.S.C. 103(a).
Claims 3, 5, 7, 10, 12 are rejected under 35 U.S.C. 103(a) as being unpatentable over ABE (US Patent or PG Pub. No. 20180301987, hereinafter ‘987), in view of BURKE et al. (US Patent or PG Pub. No. 20200287495, hereinafter ‘495).
Claims 3, 10 ‘987 teaches the limitations of claim 1 as discussed above. ‘987 further discloses that wherein the first controller and the second controller perform AD sampling and analog-to-digital conversion for each phase of its PWM duty (e.g., AD sampled during the PWM duties in the order of CV1-CV2-CV3-CV4, see Fig. 1-2), and perform AD sampling and analog-to-digital conversion of the second controller at a point in time when each AD sampling and analog-to-digital conversion of the first controller is completed (e.g., AD sampled and AD conversion during the PWM duties in the order of CV1-CV2-CV3-CV4, see Fig. 1-2).
‘987 does not explicitly disclose that performing AD sampling and analog-to-digital conversion for each phase at a center point of a PWM duty.
‘495 discloses a multiphase converter system with current sensing using ADC (e.g., see Abstract; Fig. 6, 7), and further discloses that performing AD sampling and analog-to-digital conversion for each corresponding phase at the center point of the PWM duty to minimize any disturbance on the current sensor readings caused by the fast switching edges of the phase switches (e.g., see [0080][0081], Fig, 7).
Therefore, It would have been obvious to one having ordinary skill in the art before the effective filing date to modify ‘987 by the performing AD sampling and analog-to-digital conversion for each phase at a center point of the corresponding PWM duty as taught by ‘495 in order of being able to minimize any disturbance on the current sensor readings caused by the fast switching edges of the phase switches (e.g., see [0080][0081], Fig, 7).
Claims 5, 12, ‘987 teaches the limitations of claim 4 as discussed above. ‘987 further discloses that wherein the first controller and the second controller of each core control two phases having a phase difference of 180 degrees, the first controller and the second controller of each core perform AD sampling and analog-to-digital conversion for each phase of its PWM duty (e.g., AD sampled during the PWM duties in the order of CV1-CV2-CV3-CV4 … -CV12, see [0035], Fig. 1), and perform AD sampling and analog-to-digital conversion of the second controller at a point in time when each AD sampling and analog-to-digital conversion of the first controller is completed (e.g., AD sampled and AD conversion during the PWM duties in the order of CV1-CV2-CV3-CV4 … -CV12, see [0035], Fig. 1).
‘987 does not explicitly disclose that performing AD sampling and analog-to-digital conversion for each phase at a center point of the PWM duty.
‘495 discloses a multiphase converter system with current sensing using ADC (e.g., see Abstract; Fig. 6, 7), and further discloses that performing AD sampling and analog-to-digital conversion for each phase at a center point of a PWM duty to minimize any disturbance on the current sensor readings caused by the fast switching edges of the phase switches (e.g., see [0080][0081], Fig, 7).
‘495 reads the same obviousness as discussed in claim 3 rejection above.
Claim 7, ‘987 teaches the limitations of claim 6 as discussed above. ‘987 further discloses that wherein the first controller, the second controller and the third controller of each core control two phases having a phase difference of 180 degrees, the first controller, the second controller and the third controller of each core perform AD sampling and analog-to-digital conversion for each phase of its PWM duty (e.g., AD sampled during the PWM duties in the order of CV1-CV2-CV3-CV4 … -CV18, see [0035], Fig. 1), AD sampling and analog-to-digital conversion of the second controller are performed at a point in time when each AD sampling and analog-to-digital conversion of the first controller is completed, and AD sampling and analog-to-digital conversion of the third controller are performed at a point in time when each AD sampling and analog-to-digital conversion of the second controller is completed (e.g., AD sampled and AD conversion during the PWM duties in the order of CV1-CV2-CV3-CV4 … -CV18, see [0035], Fig. 1).
‘987 does not explicitly disclose that performing AD sampling and analog-to-digital conversion for each phase at a center point of the PWM duty.
‘495 discloses a multiphase converter system with current sensing using ADC (e.g., see Abstract; Fig. 6, 7), and further discloses that performing AD sampling and analog-to-digital conversion for each phase at a center point of a PWM duty to minimize any disturbance on the current sensor readings caused by the fast switching edges of the phase switches (e.g., see [0080][0081], Fig, 7).
‘495 reads the same obviousness as discussed in claim 3 rejection above.
Examiner's Note:
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUE ZHANG whose telephone number is (571)270-1263. The examiner can normally be reached on M-F: 8:30AM-5:00PM
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 571-272-2838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JUE ZHANG/
Primary Examiner, Art Unit 2838
Prosecution Insights