DETAILED ACTION
This office action is in response to the application filed on 09/06/2024. Claims 1-20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, or 365(c) is acknowledged.
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in TAIWAN on 05/29/2024. It is noted, however, that applicant has not filed a certified copy of the TW113119830 application as required by 37 CFR 1.55.
Drawing
The drawing submitted on 09/06/2024 is acknowledged and accepted by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 4-8, 11-12, 14-18 are rejected under 35 U.S.C. 102(a)(1) and/or (a)(2) as being anticipated by BIANCO et al. (US Patent or PG Pub. No. 20180342957, hereinafter ‘829).
Claim 1, ‘957 teaches a power converter (e.g., see Fig. 1-6), comprising: a high-side transistor (e.g., 128), coupled between an input voltage (e.g., Vin) and a switching node (e.g., 152); a low-side transistor (e.g., 126), coupled between the switching node and a ground (e.g., 124); a transformer (e.g., 134), comprising a primary coil (e.g., 154), wherein the primary coil is coupled between the switching node and a first node (e.g., 156); a first capacitor (e.g., 148), coupled between the first node and the ground; and a current detection circuit (e.g., 116), connected in parallel with the first capacitor and comprising: a second capacitor (e.g., 146), coupled to the first node; and a current detection resistor (e.g., 150), coupled between the second capacitor and the ground (e.g., see Fig. 2).
Claim 2, ‘957 teaches the limitations of claim 1 as discussed above. It further teaches that wherein the power converter is an asynchronous half-bridge flyback converter (e.g., see Fig. 2); wherein the power converter acknowledges a current flowing through the transformer and the first capacitor based on a voltage across the current detection resistor (e.g., the voltage across 150, see Fig. 2).
Claim 4, ‘957 teaches the limitations of claim 1 as discussed above. It further teaches that wherein the transformer comprises a first secondary coil (e.g., 162, see Fig. 2).
Claim 5, ‘957 teaches the limitations of claim 4 as discussed above. It further teaches that further comprising: an output circuit (e.g., the circuit comprising 138, 142), coupled to the first secondary coil and configured to convert energy stored in the first secondary coil into an output voltage (e.g., Vout2).
Claim 6, ‘957 teaches the limitations of claim 5 as discussed above. It further teaches that wherein the output circuit comprises: a third capacitor (e.g., 142), comprising a first terminal and a second terminal and configured to generate an output voltage (e.g., Vout2), wherein the first terminal is coupled to the first secondary coil; and
a first rectifying unit (e.g., 138), coupled between the first secondary coil and the second node and configured to rectify some of energy of the first secondary coil into a third current (e.g., the output current passing 138); wherein the third current charges the third capacitor to generate the output voltage (e.g., see Fig. 2).
Claim 7, ‘957 teaches the limitations of claim 6 as discussed above. It further teaches that wherein when the high-side transistor is turned on, the low-side transistor is turned off, and the first rectifying unit is turned off, the input voltage stores energy in the transformer and the first capacitor (e.g., 158 and 162 of 134 operating under inverted phase, 138 being reversely biased during the positive half cycle of the primary-side switching cycle, see Fig. 2); wherein when the high-side transistor is turned off, the low-side transistor is turned on, and the first rectifying unit is turned on, energy stored in the transformer and the first capacitor is transferred to the first secondary coil through the primary coil to charge the third capacitor to generate the output voltage (e.g., 158 and 162 of 134 operating under inverted phase, 138 being positively biased and conducting during the negative half cycle of the primary-side switching cycle, see Fig. 2).
Claim 8, ‘957 teaches the limitations of claim 6 as discussed above. It further teaches that wherein the transformer further comprises a second secondary coil (e.g., 160); wherein the first secondary coil and the second secondary coil are connected in series to a second node (e.g., the node connecting to 125, see Fig. 2).
Claim 11, ‘957 teaches a current detection circuit adapted to a power converter (e.g., see Fig. 1-6), wherein the power converter comprises a high-side transistor (e.g., 128) coupled between an input voltage and a switching node, a low-side transistor (e.g., 126) coupled between the switching node and a ground, a transformer (e.g., 134) comprising a primary coil, and a first capacitor (e.g., 148) coupled to the ground, wherein the primary coil is coupled between the switching node and the first capacitor (e.g., see Fig, 2), wherein the current detection circuit comprises: a second capacitor (e.g., 146), coupled to the first node; and a current detection resistor (e.g., 150), coupled between the second capacitor and the ground (e.g., see Fig. 2).
Claim 12, ‘957 teaches the limitations of claim 11 as discussed above. It further teaches that wherein the power converter is an asynchronous half-bridge flyback converter (e.g., see Fig. 2); wherein the power converter acknowledges a current flowing through the transformer and the first capacitor based on a voltage across the current detection resistor (e.g., the voltage across 150, see Fig. 2).
Claim 14, ‘957 teaches the limitations of claim 11 as discussed above. It further teaches that wherein the transformer comprises a first secondary coil (e.g., 162, see Fig. 2).
Claim 15, ‘957 teaches the limitations of claim 14 as discussed above. It further teaches that wherein the power converter further comprises an output circuit (e.g., the circuit comprising 138, 142); wherein the output circuit is coupled to the first secondary coil and configured to convert energy of the first secondary coil into an output voltage (e.g., Vout2).
Claim 16, ‘957 teaches the limitations of claim 15 as discussed above. It further teaches that wherein the output circuit comprises a third capacitor(e.g., 142) and a first rectifying unit (e.g., 138); wherein the third capacitor comprises a first terminal and a second terminal and the third capacitor is configured to generate an output voltage; wherein the first terminal is coupled to the first secondary coil; wherein the first rectifying unit is coupled between the first secondary coil and the second terminal and the first rectifying unit is configured to rectify some of energy of the first secondary coil to generate a third current (e.g., the current passing 138); wherein the third current charges the third capacitor to generate the output voltage (e.g., see Fig. 2).
Claim 17, ‘957 teaches the limitations of claim 16 as discussed above. It further teaches that wherein when the high-side transistor is turned on, the low-side transistor is turned off, and the first rectifying unit is turned off, the input voltage stores energy in the transformer and the first capacitor (e.g., 158 and 162 of 134 operating under inverted phase, 138 being reversely biased during the positive half cycle of the primary-side switching cycle, see Fig. 2); wherein when the high-side transistor is turned off, the low-side transistor is turned on, and the first rectifying unit is turned on, energy of the transformer and the first capacitor is transferred to the first secondary coil, so as to charge the third capacitor to generate the output voltage (e.g., 158 and 162 of 134 operating under inverted phase, 138 being positively biased and conducting during the negative half cycle of the primary-side switching cycle, see Fig. 2)..
Claim 18, ‘957 teaches the limitations of claim 16 as discussed above. It further teaches that wherein the transformer further comprises a second secondary coil (e.g., 160); wherein the first secondary coil and the second secondary coil are connected in series to a second node (e.g., the node connecting to 125, see Fig. 2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1,148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating
obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims under 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various claims was commonly owned at the time any inventions covered therein were made absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was not commonly owned at the time a later invention was made in order for the examiner to consider the applicability of 35 U.S.C. 103(c) and potential 35 U.S.C. 102(e), (f) or (g) prior art under 35 U.S.C. 103(a).
Claims 3, 13, rejected under 35 U.S.C. 103(a) as being unpatentable over BIANCO et al. (US Patent or PG Pub. No. 20180342957, hereinafter ‘829), in view of TONG et al. (CN 116667658 A, hereinafter TONG).
Claims 3, 13, ‘957 teaches the limitations of claim 1 as discussed above. ‘957 further teaches that wherein a first current flows through the first capacitor (e.g., the current passing 148), and a second current flows through the second capacitor (e.g., the current passing 146); wherein a first ratio of the first current to the second current is equal to a second ratio of the first capacitor to the second capacitor (e.g., the second ratio being the ratio of the respective impedance of 148 and (146+150) at the primary-side switching frequency , See Fig. 2);
‘957 does not explicitly disclose that wherein the first current exceeds the second current, and a capacitance value of the first capacitor exceeds a capacitance value of the second capacitor.
Tong discloses current sensing circuit for a half-bridge converter comprising a first capacitor Cr, a second capacitor Cc1, and a current detection resistor Rs (e.g., see [0089], Fig. 7). It further discloses that the first current exceeds the second current (e.g., the impedance of Rs + impedance of the detection capacitor Cs being greater than the impedance of resonant capacitor Cr, see [0090]), and a capacitance value of the first capacitor exceeds a capacitance value of the second capacitor (e.g., as commonly known the capacitance of a capacitor is inverse proportional to impedance of the capacitor, see [0090], Fig. 7).
Therefore, It would have been obvious to one having ordinary skill in the art before the effective filing date to modify ‘957 by including the current sensing circuit as taught by Tong in order of being able to provide accurate sensing and detecting results for the current passing through the circuit capacitor under detection (e.g., see [0090], Fig. 7).
Claims 9-10, 19-20 are rejected under 35 U.S.C. 103(a) as being unpatentable over BIANCO et al. (US Patent or PG Pub. No. 20180342957, hereinafter 957), in view of Xing et al. (US Patent or PG Pub. No. 6545883, hereinafter ‘883).
Claims 9, 19, ‘957 teaches the limitations of claims 8 and 18 as discussed above. ‘957 further teaches that wherein the output circuit further comprises: a second rectifying unit (e.g., 136), coupled between the second secondary coil and the second terminal and configured to rectify some of energy of the second secondary coil into a fourth current (e.g., the current passing 136, see Fig. 2); and wherein the fourth current charges the third capacitor to generate the output voltage (e.g., see Fig. 2).
‘957 does not explicitly disclose that the output circuit further comprises: a choke, coupled between the second node and the first terminal.
‘883 discloses an output circuit (e.g., the circuits comprising Ns1, Ns2, Q3, Q4, L2 Co) for a DC-DC converter (e.g., 10, see Fig. 5) comprising
a second rectifying unit (e.g., Q3), coupled between the second secondary coil and a second terminal (e.g., the terminal connecting Q3 and Co) and configured to rectify some of energy of the second secondary coil into a fourth current (e.g., the current passing through Q3, Ns1 and Lo); and a choke (e.g., the output filter coil Lo of output filter 14), coupled between the second node and a first terminal (e.g., the output terminal connecting Lo and Co); wherein the fourth current charges the third capacitor to generate the output voltage (e.g., Vout, see Fig. 5).
Therefore, It would have been obvious to one having ordinary skill in the art before the effective filing date to modify ‘957 by including the output circuit with the output filter coil as taught by ‘883 in order of being able to produce the output voltage by averaging the rectified voltage received by the output filter coil (e.g., see col. 6 lines 60-65, Fig. 5-6).
Claims 10, 20, the combination of ‘957 and ‘880 teaches the limitations of claims 9 and 19 as discussed above. ‘957 further teaches that wherein when the high-side transistor is turned on, the low-side transistor is turned off (e.g., during the switching cycle while 128 ON and 126 OFF, charging current charging through Vin, 128, Lr, 158, 148),), and the second rectifying unit is turned on (e.g., 136 being positively biased during the switching cycle while 128 ON and 126 OFF), the input voltage stores energy in the transformer and the first capacitor, and the energy stored in the transformer is transferred to the second secondary coil through the primary coil, so as to charge the third capacitor to generate the output voltage (e.g., see Fig. 2); wherein when the high-side transistor is turned off, the low-side transistor is turned on (e.g., during the switching cycle while 128 OFF and 126 ON, discharging current discharging through Vin, 126, Lr, 158, 148), and the first rectifying unit is turned on (e.g., 138 being positively biased during the switching cycle while 128 ON and 126 OFF), the energy of the transformer and the first capacitor is transferred to the first secondary coil through the primary coil, so as to charge the third capacitor to generate the output voltage (e.g., see Fig. 2).
Examiner's Note:
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUE ZHANG whose telephone number is (571)270-1263. The examiner can normally be reached on M-F: 8:30AM-5:00PM
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 571-272-2838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JUE ZHANG/
Primary Examiner, Art Unit 2838
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