DETAIL ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to Applicant’s filing 09/07/2024.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 17, 19-20, 22-24, 25 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shen et al. (“Shen”, US Pub 2024/0313662; wherein, Shen’s Chinese (CN) application’s priority date is 03/13/2023, which is prior to Applicant’s possible priority date 03/28/2024; and for easier use of English translation Examiner is using citation from the US Pub art, however CN art is also provided, if required).
Regarding independent claim 17, Shen teaches (Fig. 1-9. Note Fig. 5 shares similar operation as Fig. 1-4 and more, which is shown in Fig. 6-9; Para 34-84) a control circuit (Fig. 5; combined operation of ‘204, 206, 220’. Note Fig. 5 shares similar operation as Fig. 1-4 and more, which is shown in Fig. 6-9) for controlling a resonant (102 resonant) flyback power converter (Para 76, 83), comprising:
a high-side signal to control a high-side transistor (204 providing adjusted PWM high-side signal SH to drive high-side switch/transistor NHS); and
a low-side signal to control a low-side transistor (204 providing adjusted PWM low-side signal SL to drive low-side switch/transistor NLS);
wherein through a resonant capacitor (CRS), the high-side (NHS) and low-side (NLS) transistors are configured to switch a primary winding (LP) of the transformer (TF), generating an output voltage (VOUT) through a secondary winding (LS) of the transformer (TF);
wherein an off-period (Fig. 2-4; off period being a duration from NHL being OFF to a subsequently ON of NHL, and vice versa, such as Fig. 2: ‘TD11 and TD12’ and Fig. 4: ‘TD21 and TD22’) is regulated to be equal to a predetermined target period (varied switching cycle time limit period TBLNK, based on comparison between Vout & Vtar; Para 50) by adjusting a pulse width of the low-side signal (204 providing adjusted PWM low-side signal SL to drive low-side switch/transistor NLS) to achieve zero voltage switching (ZVS) of the high-side transistor (ZVS operation of subsequent activation of NHS; Paras ‘2, 6, 10, 12’ and claims ‘1, 13’);
wherein the off-period is a duration (Fig. 2-4; off period being a duration from NHL being OFF to a subsequently ON of NHL, and vice versa, such as Fig. 2: ‘TD11 and TD12’ and Fig. 4: ‘TD21 and TD22’) from the deactivation of the low-side signal (OFF of NHL) to a subsequent activation of the high-side signal (subsequent ON of NHS).
Regarding independent claim 19, Shen teaches (Fig. 1-9. Note Fig. 5 shares similar operation as Fig. 1-4 and more, which is shown in Fig. 6-9; Para 34-84) a control method (Fig. 5; combined operation of ‘204, 206, 220’. Note Fig. 5 shares similar operation as Fig. 1-4 and more, which is shown in Fig. 6-9) for controlling a resonant flyback power converter (102 resonant), comprising:
generating a high-side signal to control a high-side transistor (204 providing adjusted PWM high-side signal SH to drive high-side switch/transistor NHS);
generating a low-side signal to control a low-side transistor (204 providing adjusted PWM low-side signal SL to drive low-side switch/transistor NLS);
generating a negative current signal (Fig. 2, 4; i.e., negative current Imag in a negative sloped manner below Iprim, which is eventually passed as Isec and Vout) related to a voltage across (Vaux) an auxiliary winding (LA) of a transformer (TF);
generating a threshold (i.e., compensation signal, used to determine varied switching cycle time limit period TBLNK; wherein the compensation signal is based on comparison between Vout & Vtar; Para 50) generated by the negative current signal (Fig. 2, 4; i.e., negative current Imag in a negative sloped manner below Iprim, which is eventually passed as Isec and Vout; wherein Vout is used to determine taught threshold ‘compensation signal) in response to the activation of the high-side transistor (ON of NHS);
after deactivation of the low-side transistor (after OFF of NHL), activating the high-side signal (ON of NHS) once the negative current signal (Fig. 2, 4; i.e., negative current Imag in a negative sloped manner below Iprim, which is eventually passed as Isec and Vout; wherein Vout is used to determine taught threshold ‘compensation signal) exceeds the threshold (i.e., compensation signal, used to determine varied switching cycle time limit period TBLNK; wherein the compensation signal is based on comparison between Vout & Vtar; Para 50);
switching (i.e., switching of NHS & NHL) a primary winding (LP) of the transformer (TF) through a resonant capacitor (CRS) by the high-side transistor (NHS) and the low-side transistor (NHL), thereby generating an output voltage (Vout) through a secondary winding (LS) of the transformer (TF); and
adjusting a pulse width of the low-side signal (204 providing adjusted PWM low-side signal SL to drive low-side switch/transistor NLS) to achieve zero voltage switching (ZVS) of subsequent activation of the high-side transistor (ZVS operation of subsequent activation of NHS; Paras ‘2, 6, 10, 12’ and claims ‘1, 13’) according to a comparison between the negative current signal (Fig. 2, 4; i.e., negative current Imag in a negative sloped manner below Iprim, which is eventually passed as Isec and Vout; wherein Vout is used to determine taught threshold ‘compensation signal) and the threshold (i.e., compensation signal, used to determine varied switching cycle time limit period TBLNK; wherein the compensation signal is based on comparison between Vout & Vtar; Para 50).
Regarding claim 20, Shen teaches (Fig. 1-9. Note Fig. 5 shares similar operation as Fig. 1-4 and more, which is shown in Fig. 6-9)
regulating an off-period (Fig. 2-4; off period being a duration from NHL being OFF to a subsequently ON of NHL, and vice versa, such as Fig. 2: ‘TD11 and TD12’ and Fig. 4: ‘TD21 and TD22’) to be equal to a predetermined target period (varied switching cycle time limit period TBLNK, based on comparison between Vout & Vtar; Para 50) by adjusting the pulse width of the low-side signal (204 providing adjusted PWM low-side signal SL to drive low-side switch/transistor NLS);
wherein the off-period is a duration (Fig. 2-4; off period being a duration from NHL being OFF to a subsequently ON of NHL, and vice versa, such as Fig. 2: ‘TD11 and TD12’ and Fig. 4: ‘TD21 and TD22’) from the deactivation of the low-side signal (OFF of NHL) to a subsequent activation of the high-side signal (subsequent ON of NHS).
Regarding claim 22, Shen teaches (Fig. 1-9. Note Fig. 5 shares similar operation as Fig. 1-4 and more, which is shown in Fig. 6-9) the step of regulating the off-period (Fig. 2-4; off period being a duration from NHL being OFF to a subsequently ON of NHL, and vice versa, such as Fig. 2: ‘TD11 and TD12’ and Fig. 4: ‘TD21 and TD22’) further includes: configure the predetermined target period (varied switching cycle time limit period TBLNK, based on comparison between Vout & Vtar; Para 50) to be correlated with an optimized circulating current (optimized circulating current in LL, LP, LS, using switching operation of ‘NHS, NLS, NSR’) generated by the low-side transistor (NLS), such that the cross-voltage of the high-side transistor is sufficiently low for ZVS (ZVS operation of subsequent activation of NHS; Paras ‘2, 6, 10, 12’ and claims ‘1, 13’) while the circulating current remains sufficiently low to achieve a target conversion efficiency (high conversion efficiency for NHS).
Regarding claim 23, Shen teaches (Fig. 1-9. Note Fig. 5 shares similar operation as Fig. 1-4 and more, which is shown in Fig. 6-9) limiting the off-period (Fig. 2-4; off period being a duration from NHL being OFF to a subsequently ON of NHL, and vice versa, such as Fig. 2: ‘TD11 and TD12’ and Fig. 4: ‘TD21 and TD22’) no longer than a maximum off-period (i.e., at Vro).
Regarding claim 24, Shen teaches (Fig. 1-9. Note Fig. 5 shares similar operation as Fig. 1-4 and more, which is shown in Fig. 6-9) wherein the active period of the low-side signal (active on period of NLS) equals or exceeds a demagnetization time (i.e., during TD12, TD22) of the transformer (TF).
Regarding independent claim 25, Shen teaches (Fig. 1-9. Note Fig. 5 shares similar operation as Fig. 1-4 and more, which is shown in Fig. 6-9; Para 34-84) a control method (Fig. 5; combined operation of ‘204, 206, 220’. Note Fig. 5 shares similar operation as Fig. 1-4 and more, which is shown in Fig. 6-9) for a resonant (102 resonant) flyback power converter (Para 76, 83), comprising:
generating a high-side signal to control a high-side transistor (204 providing adjusted PWM high-side signal SH to drive high-side switch/transistor NHS);
generating a low-side signal to control a low-side transistor (204 providing adjusted PWM low-side signal SL to drive low-side switch/transistor NLS);
switching a primary winding (LP) of the transformer (TF) through a resonant capacitor (CRS) by the high-side transistor (NHS) and the low-side transistor (NLS), thereby generating an output voltage (Vout) through a secondary winding (LS) of the transformer (TF); and
regulating an off-period (Fig. 2-4; off period being a duration from NHL being OFF to a subsequently ON of NHL, and vice versa, such as Fig. 2: ‘TD11 and TD12’ and Fig. 4: ‘TD21 and TD22’) to be equal to a predetermined target period (varied switching cycle time limit period TBLNK, based on comparison between Vout & Vtar; Para 50) by adjusting a pulse width of the low-side signal (204 providing adjusted PWM low-side signal SL to drive low-side switch/transistor NLS) to achieve zero voltage switching (ZVS) of the high-side transistor (ZVS operation of subsequent activation of NHS; Paras ‘2, 6, 10, 12’ and claims ‘1, 13’);
wherein the off-period is a duration (Fig. 2-4; off period being a duration from NHL being OFF to a subsequently ON of NHL, and vice versa, such as Fig. 2: ‘TD11 and TD12’ and Fig. 4: ‘TD21 and TD22’) from the deactivation of the low-side signal (OFF of NHL) to a subsequent activation of the high-side signal (subsequent ON of NHS).
Allowable Subject Matter
Claims 18, 21 and 26 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 18, cited art(s) failed to teach, “a period reference signal generated based on the predetermined target period; and an off-period signal generated based on the off-period; wherein a level of the off-period signal is regulated to be aligned with a level of the period reference signal by adjusting the pulse width of the low-side signal, thereby aligning the off-period with the predetermined target period”.
Regarding claim 21, cited art(s) failed to teach, “wherein the voltage threshold includes an upper threshold and a lower threshold; wherein the step of regulating the off-period further includes: regulating the off-period only when the second signal is between the upper threshold and the lower threshold”.
Regarding claim 26, cited art(s) failed to teach, “generating a period reference signal based on the predetermined target period; generating an off-period signal generated based on the off-period; and regulating a level of the off-period signal to be aligned with a level of the period reference signal by adjusting the pulse width of the low-side signal, thereby aligning the off-period with the predetermined target period”.
Claims 1-17 are allowed. The following is an examiner’s statement of reasons for allowance:
Regarding independent claim 1, cited art(s) failed to teach using a control circuit for controlling a resonant flyback power converter, comprising: “a first signal generated by the negative current signal (generated by an auxiliary winding of a transformer, wherein the negative current signal is related to a cross-voltage of the auxiliary winding) in response to the activation of the high-side transistor; a second signal generated by the negative current signal (generated by an auxiliary winding of a transformer, wherein the negative current signal is related to a cross-voltage of the auxiliary winding) in response to the deactivation of the low-side transistor when the high-side transistor is off; and a third signal generated by comparing the second signal with a voltage threshold, wherein the voltage threshold is related to the level of the first signal; wherein a pulse width of the low-side signal is adjusted based on the third signal to achieve zero voltage switching (ZVS) of the high-side transistor.”
Claims 2-17 are depending from claim 1.
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Conclusion
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/NUSRAT QUDDUS/Examiner, Art Unit 2838
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