Prosecution Insights
Last updated: September 19, 2026
Application No. 18/828,198

MULTI-LEVEL SWITCHING POWER CONVERTER SYSTEMS

Non-Final OA §102§103§112
Filed
Sep 09, 2024
Examiner
TRAN, NGUYEN
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mission Power Corp.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
923 granted / 1104 resolved
+15.6% vs TC avg
Moderate +8% lift
Without
With
+7.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
29 currently pending
Career history
1137
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
55.2%
+15.2% vs TC avg
§102
29.3%
-10.7% vs TC avg
§112
11.3%
-28.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1104 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION 1. This action is in response to the election filed on 7/2/26. Notice of Pre-AIA or AIA Status 2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions 3. Applicant's election with traverse of Species I (figures 1-2, 3, and 6) in the reply filed on 7/2/26 is acknowledged. The traversal is on the ground(s) that “claims 1 and 12, as well as claims 2-11 and claims 13-15 that depend therefrom, respectively, are represented by FIGS. 1-7. Therefore, Applicant respectfully submits that Species 1, Species 2, and Species 3 are not mutually exclusive with respect to each other, and that a search in view of FIGS. 1-7 as representative of claims 1-15 would not be an extraordinary search and examination burden. This is found persuasive. However, non-elected Species 4 (figures 8-13) are directed to claim 8-10. Therefore, claims 1-7 and 12-15 directed to Species 1-3 (figures 1-7). Claims 8-10 should have been withdrawn. Claim Rejections - 35 USC § 112 4. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 5. Claim 13-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 13 recites the limitation “the remaining voltage levels”. There is insufficient antecedent basis for this limitation in the claim. Claims 14-15 depend directly or indirectly from a rejected claim are, therefore, also rejected under 35 USC 112, second paragraph for the reasons stated above. Claim Rejections - 35 USC § 102 6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 7. Claims 12-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Salem (US 20140043010). Regarding claim 12: Salem discloses (i.e. figures 2 and 3A-F) a method for generating a plurality of voltage levels (i.e. levels of Vout) via a multi-level switching converter (i.e. 300), the method comprising: providing an input voltage (i.e. Vin) to an input of the multi-level switching converter (i.e. 300), the multi-level switching converter (i.e. 300) comprising: a plurality of switching stages (i.e. stages for 302, 304, 306); and a plurality of flying capacitors (i.e. capacitors of cells 302, 304, 306) each arranged (i.e. see the flying capacitor arranged of figure 2, includes in cell 302, 304, 306) between a pair of the switching stages (i.e. stages for 302, 304, 306); controlling the switching stages via switching signals (i.e. signals to control the switches of the stages) to convert the input voltage (i.e. Vin) to the voltage levels (i.e. levels of Vout), the voltage levels (i.e. levels of Vout) having a nominal quantity (i.e. desired Vout of 7-8V) based on a quantity of the flying capacitors (i.e. capacitors of cells 302, 304, 306); and selectively adjusting a quantity of the voltage levels (i.e. levels of Vout) between the nominal quantity (i.e. desired Vout of 7-8V) in a first operating mode (i.e. mode 8) having 1:1) and an adjusted quantity (i.e. voltage less than 7-8V) less than the nominal quantity (i.e. desired Vout of 7-8V) in a second operating mode (i.e. mode 1-7) via at least one set of the switching signals (i.e. signals to control the switches of the stages) provided to a respective at least one of the switching stages (i.e. stages for 302, 304, 306) (i.e. ¶ 76). Regarding claim 13: (i.e. figures 2 and 3A-F) wherein each of the switching stages (i.e. stages for 302, 304, 306) comprises a pair of switches (i.e. switches of each stage) coupled (i.e. electrically coupled) to opposite terminals of at least one of the flying capacitors (i.e. capacitors of cells 302, 304, 306), wherein providing the at least one set of the switching signals (i.e. signals to control the switches of the stages) comprises: providing a set of the switching signals (i.e. signals to pairs of switches) to a respective one of the switching stages (i.e. stages for 302, 304, or 306) to concurrently activate the pair of switches (i.e. switches of each stage) of the respective one of the switching stages (i.e. stages for 302, 304, 306) to decrease the quantity of the voltage levels (i.e. levels of Vout is decreasing by each mode) by one and to reallocate amplitudes of the remaining voltage levels (i.e. level of voltage for each mode) (i.e. ¶ 76); and providing remaining sets of the switching signals (i.e. signals to stage 304 or 306) to each other one of the switching stages (i.e. stages for 302, 304, 306) to alternately switch the pair of switches (i.e. switches of each stage) in each respective other one of the switching stages (i.e. stages for 302, 304, 306) at a switching frequency (i.e. frequency of the control signals to the switches) in the second operating mode (i.e. ¶ 61-80). Claim Rejections - 35 USC § 103 8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 9. Claims 1-4 are rejected under 35 U.S.C. 103 as being unpatentable over Lai et al. (US 20050111246) in view of Reichard et al. (US 20130155730) and Qattum et al. (US 20240348154). Regarding claim 1: Lai et al. disclose (i.e. figure 1) a multi-level switching power converter system (i.e. 100) comprising: a switch controller (i.e. controller for figure 1) configured to generate a plurality of switching signals (i.e. signal to swiches of 102) at a variable frequency (i.e. ¶ 58-59); a multi-level switching converter (i.e. converter of 100) comprising a plurality of switches (i.e. switches of 102) configured to receive the respective switching signals(i.e. signal to swiches of 102) to convert an input voltage (i.e. VAB) to an output voltage (i.e. voltage of 108, 102, and/or 104), one of the input and output voltages being an AC voltage (i.e. AC of VAB), the switch controller (i.e. controller for figure 1) providing the switching signals (i.e. signal to swiches of 102) at the variable frequency (i.e. ¶ 116, 139-140); and a filter (i.e. filter connected between 114 and 116 or filter of 118) coupled (i.e. electrically coupled) to the multi-level switching converter (i.e. converter of 100) and comprising an inductor (i.e. inductor of the filter), but does not specifically disclose wherein the variable frequency varies within a fundamental period of the AC voltage; and an inductor is a saturable inductor. Reichard et al. disclose a system (i.e. figure 1) comprising the variable frequency varies (i.e. ¶ 12 and 65) within a fundamental period of the AC voltage (i.e. the fundamental period of the AC voltage having the frequency from 50-60 HZ). Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Lai et al.’s invention with the system as disclose by Reichard et al. to improve the response time of the controller to variations in the amplitude of the current during low power operation. Qattum et al. disclose a power converter comprising the inductor is a saturable inductor (i.e. ¶ 22-23). Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Lai et al.’s invention with the filter as disclose by Qattum et al. in order to prevent damage. Regarding claim 2: Lai et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the filter is arranged as an output LCL filter comprising a first inductor, a second inductor, and a capacitor, wherein at least one of the first and second inductors is the saturable inductor. Qattum et al. disclose a power converter (i.e. figure 2) comprising the filter (i.e. 216) is arranged as an output LCL filter comprising a first inductor (i.e. 222), a second inductor (i.e. 218), and a capacitor (i.e. 220), wherein at least one of the first and second inductors is the saturable inductor (i.e. ¶ 22-23). Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Lai et al.’s invention with the filter as disclose by Qattum et al. in order to prevent damage. Regarding claim 3: Lai et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the first inductor is configured as the saturable inductor and is coupled to an output of the multi-level switching converter, wherein the second inductor is coupled to a load, and the capacitor is coupled between the first and second inductors. Qattum et al. disclose a power converter (i.e. figure 2) comprising the first inductor is configured as the saturable inductor (i.e. 222) and is coupled to an output of converter (i.e. 200), wherein the second inductor (i.e. 218) is coupled (i.e. electrically coupled) to a load (i.e. 204), and the capacitor (i.e. 220) is coupled between the first and second inductors (i.e. 218, 220) (i.e. ¶ 22-23). Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Lai et al.’s invention with the filter as disclose by Qattum et al. in order to have the saturable inductor and is coupled to an output of the multi-level switching converter to prevent damage. Regarding claim 4: Lai et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the saturable inductor is configured to saturate in response to an amplitude of current through the multi-level switching converter being less than approximately 20% of a rated peak current of the multi-level switching converter. Qattum et al. disclose a power converter (i.e. figure 2) comprising the saturable inductor (i.e. 22) is configured to saturate in response to an amplitude of current through the converter (i.e. ¶ 22-23). Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Lai et al.’s invention with the filter as disclose by Qattum et al. in order to prevent damage. Furthermore, it would have been obvious to one having ordinary skill in the art at the time the invention was made to modify the circuit of Lai et al. and Qattum to have the saturable inductor is configured to being less than approximately 20% of a rated peak current of the multi-level switching converter to increase the efficiency of the power converter, since it has been held that where the general conditions of a claim are discloses in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. 10. Claims 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Lai et al. (US 20050111246) in view of Reichard et al. (US 20130155730) and Qattum et al. (US 20240348154) and further in view of Menzi et al. (US 20230268844). Regarding claim 5: Lai et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose a plurality of switching stages that each include at least one of the switches; and a plurality of flying capacitors each arranged between a pair of the switching stages. Menzi et al. disclose a power supply (i.e. figure 1) comprising a plurality of switching stages (i.e. stage of figure 1) that each include at least one of the switches (i.e. switches of converter 10); and a plurality of flying capacitors (i.e. flying capacitor of converter 10) each arranged between a pair of the switching stages (i.e. stage of figure 1). Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Lai et al.’s invention with the power supply as disclose by Menzi et al. to improved system performance. Regarding claim 6: Lai et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose each of the switching stages comprises a pair of the switches arranged respectively on opposite terminals of at least one of the flying capacitors. Menzi et al. disclose a power supply (i.e. figure 1) comprising each of the switching stages (i.e. stage of figure 1) comprises a pair of the switches (i.e. switches of first to third legs) arranged respectively on opposite terminals of at least one of the flying capacitors (i.e. flying capacitor of converter 10). Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Lai et al.’s invention with the power supply as disclose by Menzi et al. to improved system performance. Regarding claim 7: Lai et al. disclose (i.e. figure 1) wherein the multi-level switching converter further comprises a plurality of switching stages (i.e. state of 106) that each include a set of the switches that are arranged as an H-bridge (i.e. configuration of 106). Allowable Subject Matter 11. Claims 11 and 14-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion 12. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached at 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Nguyen Tran/ Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Sep 09, 2024
Application Filed
Aug 19, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
91%
With Interview (+7.6%)
2y 5m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1104 resolved cases by this examiner. Grant probability derived from career allowance rate.

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