Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Terminal Disclaimer
1. The terminal disclaimer filed on 12/03/2025 disclaiming the terminal portion of any patent granted on this application has been reviewed and is accepted. The terminal disclaimer has been recorded.
Claim Rejections - 35 USC § 102
2. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
3. Claims 1-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Choi et al. (Pub. No. US20170315956)
As per claims 1 and 15, Choi discloses a spread spectrum clock negotiation method (paragraph 6, line 3-4, supporting a separate reference clock with independent spread spectrum clocking (SSC) (SRIS), comprising:
receiving, by a first device (fig.2, PCIe device 200) from a second device (PCIe host 100), a first ordered set carrying first indication information (paragraph 59, line 3, the indication data IND), wherein the first indication information indicating whether the second device has a spread spectrum clock capability (paragraph 59, lines 3-5, the indication data IND provides data indicating which one of the plurality of reference clock signals is to be selected as the reference clock to be used by the PCIe device 200); and
determining, by the first device based on the first indication information, whether to perform spread spectrum clock on a reference clock of the first device. (paragraph 7, detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal)
As per claim 8, Choi discloses a device, comprising:
a storage configured to store a program (paragraph 58, lines 4-5, The register 282B may also store indication data IND for selecting a reference clock signal); and
a processor (fig.3, CPU 284B) configured to execute the program in the storage, to enable the device to perform (paragraph 76, lines 3-5, the clock enable signal CLK_EN and the control signal CLKGEN_DIS may both be activated (and/or simultaneously activated)) a method, the method comprising:
receiving, from a second device, a first ordered set carrying first indication information (paragraph 59, line 3, the indication data IND);
wherein the first indication information indicating whether the second device has a spread spectrum clock capability (paragraph 59, lines 3-5, the indication data IND provides data indicating which one of the plurality of reference clock signals is to be selected as the reference clock to be used by the PCIe device 200,); and
determining, based on the first indication information, whether to perform spread spectrum clock on a reference clock of the first device. (paragraph 7, detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal)
As per claims 2 and 16, Choi discloses wherein the determining, by the first device based on the first indication information, whether to perform spread spectrum clock on a reference clock of the first device comprises: performing, by the first device, spread spectrum clock on the reference clock in response to that the first indication information indicates that the second device has the spread spectrum clock capability. (paragraph 7, detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal)
As per claims 3 and 17, Choi discloses wherein after the performing, by the first device, spread spectrum clock on the reference clock, the method further comprises: sending, by the first device to the second device, data based on the reference clock obtained after the spread spectrum clock. (paragraph 39, The receiver 266 receives a serial data signal PCIe RX transmitted from the PCIe host 100 through a second lane 310-2 connected to the transmitting section TX of the PCIe host 100)
As per claims 4, 11 and 18, Choi disclose the method further comprising:
parsing, by the first device, the first ordered set to obtain the first indication information. (paragraph 74, lines 2-3, selector 285 may select one of the reference clock signals based on the activated clock selection signal.)
As per claims 5, 12 and 19, Choi discloses the method further comprising: receiving, by the first device from the second device, second indication information indicating whether the second device supports transmission/reception of an ordered set at a specified rate less than a preset rate. (paragraph 81, comparator decided and/or set based on an internal clock signal AUXCLK, and the desired reference value (e.g., desired threshold value) may vary with a change in the comparison time))
As per claims 6, 13 and 20, Choi discloses the method according to claim 5, wherein after the receiving, by the first device from the second device, second indication information, the method further comprises: periodically sending (paragraph 7, lines 4-5, automatically detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal), by the first device to the second device, a second ordered set at the specified rate in response to that the second indication information indicates that the second device supports transmission/reception of the ordered set at the specified rate. (paragraph 44, lines 1-4, compares the first count value REFCLK_MB_CNT with the second count value REFCLK_AIC_CNT, generates a clock selection signal CLK_SEL according to a result of the comparison based on desired criteria, and outputs the clock selection signal CLK_SEL to the selector 285)
As per claims 7 and 14, Choi discloses wherein the receiving, by the first device from the second device, second indication information comprises: receiving, by the first device from the second device, the first ordered set carrying the second indication information(paragraph 81, comparator decided and/or set based on an internal clock signal AUXCLK, and the desired reference value (e.g., desired threshold value) may vary with a change in the comparison time)); and parsing, by the first device, the first ordered set to obtain the second indication information. (paragraph 74, lines 2-3, selector 285 may select one of the reference clock signals based on the activated clock selection signal.)
As per claim 9, Choi discloses wherein the determining, based on the first indication information, whether to perform spread spectrum clock on the reference clock of the device, comprising:
performing spread spectrum clock on the reference clock in response to that the first indication information indicates that the second device has the spread spectrum clock capability. (paragraph 7, detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal)
As per claim 10, Choi discloses wherein after the performing, spread spectrum clock on the reference clock, the method further comprises: sending, to the second device, data based on the reference clock obtained after the spread spectrum clock. (paragraph 39, The receiver 266 receives a serial data signal PCIe RX transmitted from the PCIe host 100 through a second lane 310-2 connected to the transmitting section TX of the PCIe host 100,)
As per claims 4, 11 and 18, Choi discloses the method further comprising:
parsing, by the first device, the first ordered set to obtain the first indication information. (paragraph 74, lines 2-3, selector 285 may select one of the reference clock signals based on the activated clock selection signal.)
As per claims 5, 12 and 19, Choi discloses the method further comprising:
receiving, by the first device from the second device, second indication information indicating whether the second device supports transmission/reception of an ordered set at a specified rate less than a preset rate. (paragraph 93, lines 2-4, the PCIe device for supporting SRIS that automatically determine whether a first reference clock signal is supplied to the outside of the PCIe device (e.g., is output to one or more external destinations)).
As per claims 6, 13 and 20, Choi discloses wherein after the receiving, by the first device from the second device, second indication information, the method further comprises:
periodically sending (paragraph 7, lines 4-5, automatically detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal), by the first device to the second device, a second ordered set at the specified rate in response to that the second indication information indicates that the second device supports transmission/reception of the ordered set at the specified rate. (paragraph 44, lines 1-4, compares the first count value REFCLK_MB_CNT with the second count value REFCLK_AIC_CNT, generates a clock selection signal CLK_SEL according to a result of the comparison based on desired criteria, and outputs the clock selection signal CLK_SEL to the selector 285)
As per claims 7 and 14, Choi discloses wherein the receiving, by the first device from the second device, second indication information comprises: receiving, by the first device from the second device, the first ordered set carrying the second indication information (paragraph 93, lines 2-4, the PCIe device for supporting SRIS that automatically determine whether a first reference clock signal is supplied to the outside of the PCIe device (e.g., is output to one or more external destinations)); and
parsing, by the first device, the first ordered set to obtain the second indication information. (paragraph 74, lines 2-3, selector 285 may select one of the reference clock signals based on the activated clock selection signal.)
Response to Amendment
4. Applicant's amendment filed on 11/20/2025 have been fully considered but does not place the application in condition for allowance.
As per claim 1, Applicant argues that Choi does not disclose or suggested “first indication information indicating whether the second device has a spread spectrum clock capability. Choi relates to a PCIE device that supports separate source signals. The selection circuit includes a register that stores IND data, which indicates whether the PCIe device should use a clock signal received from the host or a separate reference clock generated locally.” Examiner respectfully disagrees. As Choi notes at (paragraph 7, Choi discloses concepts is directed to a peripheral component interconnect express (PCIe) device for supporting a separate reference clock with independent spread spectrum clocking (SSC) (SRIS), including a clock signal generator configured to generate the second reference clock signal, and a physical layer configured to automatically detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal as a main reference clock signal of the PCIe device according to a result of the detection.” This is equivalent as Applicant’s recited claims indicating wherein the second device has a spread spectrum clock capability, Thus, the prior art teaches the invention as claimed and the claims do not distinguish over the prior art as applied.
Applicant' s arguments are thus not persuasive towards patentability of the claims as presented and the rejections of record are maintained.
5. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Bai et al. [Pub. No. US2018/0284835] discloses a plurality of receiving devices to synchronize modulation of spread spectrum clocks to an incoming synchronization signal(viii) greatly ease system design and clock routing,
Conclusion
6. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information
7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIM T HUYNH whose telephone number is (571)272-3635 or via e-mail addressed to [kim.huynh3@uspto.gov]. The examiner can normally be reached on M-F 7.00AM- 4:00PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tsai Henry can be reached at (571)272-4176 or via e-mail addressed to [Henry.Tsai@USPTO.GOV].
The fax phone numbers for the organization where this application or proceeding is assigned are (571)273-8300 for regular communications and After Final communications. Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is (571)272-2100.
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/K. T. H./
Examiner, Art Unit 2184
/HENRY TSAI/ Supervisory Patent Examiner, Art Unit 2184