Prosecution Insights
Last updated: October 02, 2026
Application No. 18/829,008

SPREAD SPECTRUM CLOCK NEGOTIATION METHOD, AND PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICE AND SYSTEM

Non-Final OA §103
Filed
Sep 09, 2024
Priority
Mar 24, 2020 — continuation of PCTCN2020080976 +1 more
Examiner
HUYNH, KIM T
Art Unit
2184
Tech Center
2100 — Computer Architecture & Software
Assignee
Huawei Technologies Co., Ltd.
OA Round
3 (Non-Final)
83%
Grant Probability
Favorable
3-4
OA Rounds
8m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
592 granted / 717 resolved
+27.6% vs TC avg
Moderate +7% lift
Without
With
+7.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
18 currently pending
Career history
741
Total Applications
across all art units

Statute-Specific Performance

§101
3.4%
-36.6% vs TC avg
§103
50.1%
+10.1% vs TC avg
§102
32.1%
-7.9% vs TC avg
§112
3.5%
-36.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 717 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 1. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/20/2026 has been entered. Claim Rejections - 35 USC § 103 2. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 3. Claims 1-3, 5-10, 12-17, 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (Pub. No. US20170315956) in view of Cherian et al. (Pub. No. US20150063336) As per claims 1 and 15, Choi discloses a spread spectrum clock negotiation method (paragraph 6, line 3-4, supporting a separate reference clock with independent spread spectrum clocking (SSC) (SRIS), comprising: receiving, by a first device (fig.2, PCIe device 200) from a second device (PCIe host 100), a first ordered set carrying first indication information (paragraph 59, line 3, the indication data IND), wherein the first indication information indicating whether the second device has a spread spectrum clock capability (paragraph 59, lines 3-5, the indication data IND provides data indicating which one of the plurality of reference clock signals is to be selected as the reference clock to be used by the PCIe device 200); and determining, by the first device based on the first indication information, whether to perform spread spectrum clock on a reference clock of the first device. (paragraph 7, detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal) Choi discloses all the limitations as the above but does not explicitly disclose parsing the first ordered set to obtain the first indication information. However, Cherian discloses this (Paragraph 179-180, the wireless device 106 transmits a probe request 1410 include indications of one or more of: a service set identification (SSID), an information request, a direct-sequence spread spectrum (DSSS) parameter set, an SSID list, a channel usage, an interworking indication, and a mesh identification.) It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of Cherian with the teaching of Choi so as to rapidly in a pipeline without manual file inspection so as to yield the predicatable result so as to control efficiently, thus enhance the system performance. As per claim 8, Choi discloses a device, comprising: a storage configured to store a program (paragraph 58, lines 4-5, The register 282B may also store indication data IND for selecting a reference clock signal); and a processor (fig.3, CPU 284B) configured to execute the program in the storage, to enable the device to perform (paragraph 76, lines 3-5, the clock enable signal CLK_EN and the control signal CLKGEN_DIS may both be activated (and/or simultaneously activated)) a method, the method comprising: receiving, from a second device, a first ordered set carrying first indication information (paragraph 59, line 3, the indication data IND); wherein the first indication information indicating whether the second device has a spread spectrum clock capability (paragraph 59, lines 3-5, the indication data IND provides data indicating which one of the plurality of reference clock signals is to be selected as the reference clock to be used by the PCIe device 200,); and determining, based on the first indication information, whether to perform spread spectrum clock on a reference clock of the first device. (paragraph 7, detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal) Choi discloses all the limitations as the above but does not explicitly disclose parsing the first ordered set to obtain the first indication information. However, Cherian discloses this (Paragraph 179-180, the wireless device 106 transmits a probe request 1410 include indications of one or more of: a service set identification (SSID), an information request, a direct-sequence spread spectrum (DSSS) parameter set, an SSID list, a channel usage, an interworking indication, and a mesh identification.) It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of Cherian with the teaching of Choi so as to rapidly in a pipeline without manual file inspection so as to yield the predicatable result so as to control efficiently, thus enhance the system performance. As per claims 2 and 16, Choi discloses wherein the determining, by the first device based on the first indication information, whether to perform spread spectrum clock on a reference clock of the first device comprises: performing, by the first device, spread spectrum clock on the reference clock in response to that the first indication information indicates that the second device has the spread spectrum clock capability. (paragraph 7, detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal) As per claims 3 and 17, Choi discloses wherein after the performing, by the first device, spread spectrum clock on the reference clock, the method further comprises: sending, by the first device to the second device, data based on the reference clock obtained after the spread spectrum clock. (paragraph 39, The receiver 266 receives a serial data signal PCIe RX transmitted from the PCIe host 100 through a second lane 310-2 connected to the transmitting section TX of the PCIe host 100) As per claims 4, 11 and 18, Choi disclose the method further comprising: parsing, by the first device, the first ordered set to obtain the first indication information. (paragraph 74, lines 2-3, selector 285 may select one of the reference clock signals based on the activated clock selection signal.) As per claims 5, 12 and 19, Choi discloses the method further comprising: receiving, by the first device from the second device, second indication information indicating whether the second device supports transmission/reception of an ordered set at a specified rate less than a preset rate. (paragraph 81, comparator decided and/or set based on an internal clock signal AUXCLK, and the desired reference value (e.g., desired threshold value) may vary with a change in the comparison time)) As per claims 6, 13 and 20, Choi discloses the method according to claim 5, wherein after the receiving, by the first device from the second device, second indication information, the method further comprises: periodically sending (paragraph 7, lines 4-5, automatically detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal), by the first device to the second device, a second ordered set at the specified rate in response to that the second indication information indicates that the second device supports transmission/reception of the ordered set at the specified rate. (paragraph 44, lines 1-4, compares the first count value REFCLK_MB_CNT with the second count value REFCLK_AIC_CNT, generates a clock selection signal CLK_SEL according to a result of the comparison based on desired criteria, and outputs the clock selection signal CLK_SEL to the selector 285) As per claims 7 and 14, Choi discloses wherein the receiving, by the first device from the second device, second indication information comprises: receiving, by the first device from the second device, the first ordered set carrying the second indication information(paragraph 81, comparator decided and/or set based on an internal clock signal AUXCLK, and the desired reference value (e.g., desired threshold value) may vary with a change in the comparison time)); and parsing, by the first device, the first ordered set to obtain the second indication information. (paragraph 74, lines 2-3, selector 285 may select one of the reference clock signals based on the activated clock selection signal.) As per claim 9, Choi discloses wherein the determining, based on the first indication information, whether to perform spread spectrum clock on the reference clock of the device, comprising: performing spread spectrum clock on the reference clock in response to that the first indication information indicates that the second device has the spread spectrum clock capability. (paragraph 7, detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal) As per claim 10, Choi discloses wherein after the performing, spread spectrum clock on the reference clock, the method further comprises: sending, to the second device, data based on the reference clock obtained after the spread spectrum clock. (paragraph 39, The receiver 266 receives a serial data signal PCIe RX transmitted from the PCIe host 100 through a second lane 310-2 connected to the transmitting section TX of the PCIe host 100,) As per claims 4, 11 and 18, Choi discloses the method further comprising: parsing, by the first device, the first ordered set to obtain the first indication information. (paragraph 74, lines 2-3, selector 285 may select one of the reference clock signals based on the activated clock selection signal.) As per claims 5, 12 and 19, Choi discloses the method further comprising: receiving, by the first device from the second device, second indication information indicating whether the second device supports transmission/reception of an ordered set at a specified rate less than a preset rate. (paragraph 93, lines 2-4, the PCIe device for supporting SRIS that automatically determine whether a first reference clock signal is supplied to the outside of the PCIe device (e.g., is output to one or more external destinations)). As per claims 6, 13 and 20, Choi discloses wherein after the receiving, by the first device from the second device, second indication information, the method further comprises: periodically sending (paragraph 7, lines 4-5, automatically detect whether the first reference clock signal is supplied from the PCIe host and select the first reference clock signal or the second reference clock signal), by the first device to the second device, a second ordered set at the specified rate in response to that the second indication information indicates that the second device supports transmission/reception of the ordered set at the specified rate. (paragraph 44, lines 1-4, compares the first count value REFCLK_MB_CNT with the second count value REFCLK_AIC_CNT, generates a clock selection signal CLK_SEL according to a result of the comparison based on desired criteria, and outputs the clock selection signal CLK_SEL to the selector 285) As per claims 7 and 14, Choi discloses wherein the receiving, by the first device from the second device, second indication information comprises: receiving, by the first device from the second device, the first ordered set carrying the second indication information (paragraph 93, lines 2-4, the PCIe device for supporting SRIS that automatically determine whether a first reference clock signal is supplied to the outside of the PCIe device (e.g., is output to one or more external destinations)); and parsing, by the first device, the first ordered set to obtain the second indication information. (paragraph 74, lines 2-3, selector 285 may select one of the reference clock signals based on the activated clock selection signal.) Response to Amendment 4. Applicant's amendment filed on 5/18/2026 have been fully considered but are moot in view of the new ground(s) of rejection. 5. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. Bai et al. [Pub. No. US2018/0284835] discloses a plurality of receiving devices to synchronize modulation of spread spectrum clocks to an incoming synchronization signal(viii) greatly ease system design and clock routing, Conclusion 6. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIM T HUYNH whose telephone number is (571)272-3635 or via e-mail addressed to [kim.huynh3@uspto.gov]. The examiner can normally be reached on M-F 7.00AM- 4:00PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tsai Henry can be reached at (571)272-4176 or via e-mail addressed to [Henry.Tsai@USPTO.GOV]. The fax phone numbers for the organization where this application or proceeding is assigned are (571)273-8300 for regular communications and After Final communications. Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is (571)272-2100. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /K. T. H./ Examiner, Art Unit 2184 /HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
Read full office action

Prosecution Timeline

Show 1 earlier event
Sep 25, 2024
Response after Non-Final Action
Sep 12, 2025
Non-Final Rejection mailed — §103
Nov 20, 2025
Response Filed
Mar 20, 2026
Final Rejection mailed — §103
May 18, 2026
Response after Non-Final Action
Jul 20, 2026
Request for Continued Examination
Jul 22, 2026
Response after Non-Final Action
Aug 26, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
83%
Grant Probability
90%
With Interview (+7.2%)
2y 8m (~8m remaining)
Median Time to Grant
High
PTA Risk
Based on 717 resolved cases by this examiner. Grant probability derived from career allowance rate.

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