DETAILED ACTION
This office action is in response to the amendment filed on 07/15/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jin CN109274273 in view of Kondo JP2010284029.
Regarding Claim 1, Jin teaches (Figure 3) A flyback power supply circuit (Fig. 3) for generating a power supply to drive six semiconductor switching elements constituting a three- phase inverter circuit (par. 2 of specification), the flyback power supply circuit comprising: a plurality of transformers (T1-T2) each of which has a primary winding, winding and a secondary winding, and an auxiliary winding (Np, Ns and Nfb), wherein one end of each auxiliary winding is commonly connected to ground (gnd); a single rectifier element (Dfb) having an input terminal commonly connected to an other end of each auxiliary winding; a capacitor (Co) having one end connected to an output terminal of the single rectifier element and an other end connected to the ground; a semiconductor switch (Q) that turns on and off a current flowing from an input power supply (Vin) to each primary winding; a control unit (31-32) that controls an on operation and an off operation of the semiconductor switch; and a rectifier circuit (D1-D6) connected to each secondary winding (Ns). (For Example: Par. 2-8, par. 1 is the first paragraph of the description)
Jin does not teach a plurality of primary windings of the plurality of the transformers are connected in series.
Kondo teaches (Figures 1-2) a plurality of primary windings of the plurality of the transformers are connected in series (see fig. 2, T11-T61, primary side).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Jin to include each of the plurality of transformers further includes an other secondary winding, as taught by Kondo to improve efficiency and reduce power consumption.
Regarding Claim 7, Jin teaches (Figure 3) wherein: the control unit (31-32) monitors output voltages for a plurality of phases and performs feedback control of turning on and off the semiconductor switch (Q). (For Example: Par. 2-8, par. 1 is the first paragraph of the description)
Claim(s) 5-6 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jin in view of Kondo and further in view of Xue US 2025/0167717.
Regarding Claim 5, Jin teaches (Figure 3) the converter.
Jin does not teach wherein: a numerical number of the transformers is three apparatus; each of the plurality of transformers further includes an other secondary winding.
Xue teaches (Figure 4) wherein: a numerical number of the transformers is three apparatus (T31-T33); each of the plurality of transformers further includes an other secondary winding (Tc). (For Example: Par. 57-69)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Jin to include wherein: a numerical number of the transformers is three apparatus, each of the plurality of transformers further includes an other secondary winding, as taught by Xue to improve operation of the flyback by providing isolation between the primary and secondary side.
Regarding Claim 6, Jin teaches (Figure 3) the secondary winding (Ns).
Jin does not teach each of the plurality of transformers further includes an other secondary winding.
Xue teaches (Figure 4) wherein: one of the secondary winding and the other secondary winding of each transformer is connected in parallel (Fig. 4, with Tb and Tc). (For Example: Par. 57-69)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Jin to include each of the plurality of transformers further includes an other secondary winding, as taught by Xue to improve operation of the flyback by providing isolation between the primary and secondary side.
Regarding Claim 8, Jin teaches (Figure 3) the apparatus.
Jin does not teach further comprising: at least one of (i) a circuit and (ii) a processor having a memory storing computer program code, wherein: the at least one of the circuit and the processor having the memory is configured to cause the control unit to control an on operation and an off operation of the semiconductor switch.
Xue teaches (Figure 4) further comprising: at least one of (i) a circuit and (ii) a processor having a memory storing computer program code(par. 100-101, controller) , wherein: the at least one of the circuit and the processor having the memory is configured to cause the control unit to control an on operation and an off operation of the semiconductor switch (51). (For Example: Par. 57-69)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Jin to include further comprising: at least one of (i) a circuit and (ii) a processor having a memory storing computer program code, wherein: the at least one of the circuit and the processor having the memory is configured to cause the control unit to control an on operation and an off operation of the semiconductor switch, as taught by Xue to improve operation of the flyback by providing isolation between the primary and secondary side.
Claim(s) 4 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jin in view of Kondo and further in view of Miyauchi US 2015/0085536.
Regarding Claim 4, Jin teaches (Figure 3) the primary winding, the secondary winding and auxiliary windings (see fig. 3).
Jin does not teach wherein: a numerical number of turns of the auxiliary winding is set to be smaller than a numerical number of turns of the primary winding and the secondary winding.
Miyauchi teaches (Figure 4) wherein: a numerical number of turns of the auxiliary winding (at 66) is set to be smaller (see fig. 4) than a numerical number of turns of the primary winding and the secondary winding (at 68). (For Example: Par. 63-66)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Jin to include wherein: a numerical number of turns of the auxiliary winding is set to be smaller than a numerical number of turns of the primary winding and the secondary winding, as taught by Miyauchi to reduce radiation noise due to switching of the transistor.
Regarding Claim 9, Jin teaches (Figure 3) An inverter device (par. 2) comprising: the flyback power supply circuit according to claim 1 (Fig. 3).
Jin does not teach wherein: a numerical number of the transformers is three; three phases are defined as a U-phase, a V-phase, and a W-phase; and a connection order of the primary winding of each of the transformers on a circuit board on which the three-phase inverter circuit is mounted is an order of an input power supply, a U-phase upper arm, a V-phase upper arm, a W-phase upper arm, a W-phase lower arm, a V-phase lower arm, a U-phase lower arm, and the semiconductor switch.
Miyauchi teaches (Figures 1, 4 and 10) wherein: a numerical number of the transformers is three (62-66); three phases are defined as a U-phase, a V-phase, and a W-phase (U-W); and a connection order of the primary winding of each of the transformers (62a,64a, 66a) on a circuit board (fig. 10) on which the three-phase inverter circuit (12 or 22, fig. 1) is mounted is an order of an input power supply (42), a U-phase upper arm, a V-phase upper arm, a W-phase upper arm, a W-phase lower arm, a V-phase lower arm, a U-phase lower arm (U-W upper branch and U-W lower branch), and the semiconductor switch (at 52). (For Example: Par. 93-101)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Jin to include wherein: a numerical number of the transformers is three; three phases are defined as a U-phase, a V-phase, and a W-phase; and a connection order of the primary winding of each of the transformers on a circuit board on which the three-phase inverter circuit is mounted is an order of an input power supply, a U-phase upper arm, a V-phase upper arm, a W-phase upper arm, a W-phase lower arm, a V-phase lower arm, a U-phase lower arm, and the semiconductor switch, as taught by Miyauchi to reduce radiation noise due to switching of the transistor.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jin in view of Kondo and further in view of Maki JP 5272638.
Regarding Claim 10, Jin teaches (Figure 3) a flyback power supply circuit (fig. 3) for generating a power supply to drive six semiconductor switching elements constituting a three-phase inverter circuit (par. 2), the flyback power supply circuit comprising: a plurality of transformers (T1-T2) each of which has a primary winding, a secondary winding, and an auxiliary winding (Np, Ns and Nfb), wherein one end of each auxiliary winding is commonly connected to ground (gnd); a of rectifier element (Dfb) which has an input terminal connected to an other end of a respective auxiliary winding; a single capacitor (Co) having one end connected to output terminal of the rectifier element and an other end connected to the ground; a semiconductor switch (Q) that turns on and off a current flowing from an input power supply (Vin) to each primary winding (Np); a control unit (31-32) that controls an on operation and an off operation of the semiconductor switch and performs feedback control of turning on and off the semiconductor switch by monitoring a terminal voltage of the single capacitor (Co); and a rectifier circuit (D1-D6) connected to each secondary winding (Ns). (For Example: Par. 2-8, par. 1 is the first paragraph of the description)
Jin does not teach a plurality of rectifier elements each of which has an input terminal connected to an other end of a respective auxiliary winding; a single capacitor having one end connected to output terminals of the plurality of rectifier elements and an other end connected to the ground; wherein: a plurality of primary windings of the plurality of the transformers are connected in series.
Kondo teaches (Figures 1-2) a plurality of primary windings of the plurality of the transformers are connected in series (see fig. 2, T11-T61, primary side).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Jin to include each of the plurality of transformers further includes an other secondary winding, as taught by Kondo to improve efficiency and reduce power consumption.
Jin as modified does not teach a plurality of rectifier elements each of which has an input terminal connected to an other end of a respective auxiliary winding; a single capacitor having one end connected to output terminals of the plurality of rectifier elements and an other end connected to the ground.
Maki teaches (Figure 2) a plurality of rectifier elements (27c and 17c) each of which has an input terminal connected to an other end of a respective auxiliary winding (18c and 28c); a single capacitor (19c) having one end connected to output terminals of the plurality of rectifier elements (17c and 27c).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Jin to include a plurality of rectifier elements each of which has an input terminal connected to an other end of a respective auxiliary winding; a single capacitor having one end connected to output terminals of the plurality of rectifier elements, as taught by Maki to provide protection to the system.
Response to Arguments
Applicant’s arguments with respect to the claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/GUSTAVO A ROSARIO-BENITEZ/ Primary Examiner, Art Unit 2838
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