Prosecution Insights
Last updated: October 01, 2026
Application No. 18/829,555

SEMICONDUCTOR PRODUCT EVALUATION DATA MANAGEMENT SYSTEM, SEMICONDUCTOR PRODUCT EVALUATION DATA MANAGEMENT METHOD, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM STORING A SEMICONDUCTOR PRODUCT EVALUATION DATA MANAGEMENT PROGRAM

Non-Final OA §103§112
Filed
Sep 10, 2024
Priority
Sep 11, 2023 — JP 2023-146781
Examiner
LIN, ALLEN S
Art Unit
2153
Tech Center
2100 — Computer Architecture & Software
Assignee
KIOXIA Corporation
OA Round
3 (Non-Final)
67%
Grant Probability
Favorable
3-4
OA Rounds
1y 3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allowance Rate
167 granted / 250 resolved
+11.8% vs TC avg
Strong +57% interview lift
Without
With
+56.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
17 currently pending
Career history
284
Total Applications
across all art units

Statute-Specific Performance

§101
20.0%
-20.0% vs TC avg
§103
55.1%
+15.1% vs TC avg
§102
6.4%
-33.6% vs TC avg
§112
12.2%
-27.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 250 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3/24/2026 has been entered. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Independent claims recite newly amended concept of inspection processes with measurement data and a pass fail test, however it is unclear how they are related. The claims are written in a way as if they are related or encompassing one another due to the grammatical structure of the claim however the way the claim actually recites the inspection is not related to result or evaluation data. Amendments need to be made either to clarify inventive concept or to grammatically fix the limitation so that it makes sense. Dependent claims are rejected for depending off independent claims. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 5, 7, 9, 10, 14 are/is rejected under 35 U.S.C. 103 as being unpatentable over Chong et al. US2018/0182653 in view of Tian US10885022 in view of Miller et al. US6720194 Regarding claim 1, Chong teaches: A semiconductor product evaluation data management system comprising a computer server configured to manage evaluation data of a semiconductor product and configured to store the evaluation data , the evaluation data being measured data of a property of the semiconductor product the computer server comprising: (Chong see paragraph 0021 0023 0024 0028semiconductor manufacturing and management system with electronic system receiving and analyzing data based on semiconductor manufacturing including equipment setting data indicative of data regarding manufacturing process and recipe data indicative of information set in semiconductor such as temperature and pressure. Equipment setting data and recipe data reads on evaluation data) the evaluation data to be stored in the computer server (Chong see paragraph 0024 0025 0028 0029 0037 0038 system to perform analysis of data and store data in memory and system) updating processor configured to store and update the manufacturing information of the semiconductor product (Chong see paragraph 0005 0024 0025 0028 0029 0037 0038 processor, update data based on semiconductor manufacturing) evaluation data, evaluation data in correspondence with a unit of the manufacturing information of the semiconductor product and (Chong see paragraph 0005 0024 processor, controller to receive data from semiconductor equipment and system to transmit data to external device) Chong does not distinctly disclose: server configured to manage, in each of a plurality of inspection processes including at least one pre-processing inspection and at least one post-processing inspection of a semiconductor product, evaluation data of the semiconductor product including measurement results of electrical characteristics of the semiconductor product using at least one semiconductor measuring apparatus, and a result of determining whether the semiconductor product is pass or fail based on the measurement results and a plurality of storage devices, the plurality of storage devices including at least one hot storage and at least one cold storage, the at least one hot storage having a faster response time than the at least one cold storage a storage data index file configured to store a storage data index attached to and the plurality of storage devices a storage data index in the storage data index; and a storing method updating processor configured to control movement of the data to be stored into a specific storage device based on a data storage rule, and to be stored either the at least one hot storage or the at least one cold storage, among the plurality of storage devices, the data being stored into either the at least one hot storage or the at least one cold storage in correspondence with the storage data index. However, Tian teaches: a plurality of storage devices, the plurality of storage devices including at least one hot storage and at least one cold storage, the at least one hot storage having a faster response time than the at least one cold storage (Tian see col. 15 lines 6-32, col. 37 lines 59-64 col. 38 lines 13-17 col. 39 lines 44-52 plurality of tiers of storage devices including cold and hot tier storage tiers) a storage data index file configured to store a storage data index attached to and the plurality of storage devices (Tian see col 13 lines 3-14, 36-43 col. 28 lines 24-38 col. 37 lines 59-64 col. 38 lines 13-17 col. 39 lines 44-52 index log file to be created to write new data and update index information, plurality of tiers of storage devices) a storage data index in the storage data index; and (Tian see col 13 lines 3-14, 36-43 col. 28 lines 24-38 index log file to be created to write new data and update index information) a storing method updating processor configured to control movement of the data to be stored into a specific storage device based on a data storage rule, and to be stored either the at least one hot storage or the at least one cold storage, among the plurality of storage devices, the data being stored into either the at least one hot storage or the at least one cold storage in correspondence with the storage data index. (Tian see col. 1 lines 47-53 col 13 lines 3-14, 36-43 col. 15 lines 6-32 col. 28 lines 24-38 col. 37 lines 59-64 col. 38 lines 13-17 col. 39 lines 44-52 processor, index log file to be created to write new data and update index information, migrating data to one of the plurality of tiers of storage devices including hot and cold storage tiers where storage into hot and cold tiers is based on time data is received or generated or data access frequency) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include indexing data as taught by Tian for the predictable result of more efficiently organizing and managing data Chong as modified does not distinctly disclose: server configured to manage, in each of a plurality of inspection processes including at least one pre-processing inspection and at least one post-processing inspection of a semiconductor product, evaluation data of the semiconductor product including measurement results of electrical characteristics of the semiconductor product using at least one semiconductor measuring apparatus, and a result of determining whether the semiconductor product is pass or fail based on the measurement results and However, Miller teaches: server configured to manage, in each of a plurality of inspection processes including at least one pre-processing inspection and at least one post-processing inspection of a semiconductor product, evaluation data of the semiconductor product including measurement results of electrical characteristics of the semiconductor product using at least one semiconductor measuring apparatus, and a result of determining whether the semiconductor product is pass or fail based on the measurement results and (Miller see col. 3 lines 55-63, col. 4 lines 3-18, 20-33, 50-55, 62-67 col. 5 lines 1-5 col. 9 lines 6-34 data management reporting system with semiconductor manufacturing information from a server, product lifecycle going through design, characterization, pre-production, production with tests and workflow at each stage. A given test condition includes measuring power supply voltage measured over a range of volts with a final test indicating pass fail) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to workflow testing for semiconductor products as taught by Miller for the predictable result of more efficiently organizing and managing data Regarding claim 5, Chong as modified teaches: the storing method updating processor moves the evaluation data stored in the hot storage to the cold storage in accordance with the storage data index. (Tian see col. 1 lines 47-53 col 13 lines 3-14, 36-43 col. 28 lines 24-38 col. 37 lines 59-64 col. 38 lines 13-17 col. 39 lines 44-52 index log file to be created to write new data and update index information, migrating data to one of the plurality of tiers of storage devices where data is migrated from first to second tier storage) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include indexing data as taught by Tian for the predictable result of more efficiently organizing and managing data Regarding claim 7, Chong as modified teaches: the units of the manufacturing information is at least one unit selected from the group consisting of a unit of lot, a unit of product, a unit of shipping destination, a unit of wafer, and a unit of process. (Chong see paragraph 0023 temperature value, pressure value, time for manufacturing process) Regarding claim 9, Chong as modified teaches: the cold storage is a storage having a larger capacity than that of the hot storage (Tian see col 17 lines 56-67 col 18 lines 1-4 hot storage faster and less storage capacity that cold storage) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include indexing data as taught by Tian for the predictable result of more efficiently organizing and managing data Regarding claim 10, see rejection of claim 1 Regarding claim 14, see rejection of claim 1 Claim(s) 2, 11 are/is rejected under 35 U.S.C. 103 as being unpatentable over Chong et al. US2018/0182653 in view of Tian US10885022 in view of Miller et al. US6720194 in view of Idei et al. US2015/0177984 in view of Okamoto et al. US2012/0023233 in view of Baribault et al. US2009/0088142 Regarding claim 2, Chong as modified further teaches: the manufacturing information and evaluation analysis information of the semiconductor product (Chong see paragraph 0024 0025 0028 0029 0037 0038 system to perform analysis of semiconductor manufacturing data and store data in memory and system) are stored in the storage data index, wherein (Tian see col 13 lines 3-14, 36-43 col. 28 lines 24-38 index log file to be created to write new data and update index information) the storing method updating processor controls the movement of the evaluation data to the specific storage device in the unit of the manufacturing information in accordance with the evaluation analysis information (Tian see col 17 lines 5-20 col. 28 lines 24-38 col. 37 lines 59-64 col. 38 lines 13-17 col. 39 lines 44-52 migration based on usage rate and upper limit or based on analysis determining level of data) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include indexing data as taught by Tian for the predictable result of more efficiently organizing and managing data Chong does not teach: a search frequency of the evaluation data, a data size of the evaluation data, and availability of the storage devices However, Idei teaches: a search frequency of the evaluation data (Idei see paragraph 0132 migration based on search frequency of data) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include search frequency as taught by Idei for the predictable result of more efficiently organizing and managing data Chong does not teach: a data size of the evaluation data, and availability of the storage devices However, Okatamoto teaches: a data size of the evaluation data It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include data size as taught by Okamoto for the predictable result of more efficiently organizing and managing data Chong does not teach: and availability of the storage devices However, Baribault teaches: and availability of the storage devices It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include storage device availability as taught by Baribault for the predictable result of more efficiently organizing and managing data Regarding claim 11, see rejection of claim 2 Claim(s) 3, 12 are/is rejected under 35 U.S.C. 103 as being unpatentable over Chong et al. US2018/0182653 in view of Tian US10885022 in view of Miller et al. US6720194 in view of Idei et al. US2015/0177984 in view of Okamoto et al. US2012/0023233 in view of Baribault et al. US2009/0088142 in view of Chu et al. US2011/0257932 Regarding claim 3, Chong as modified further teaches: the storing method updating processor controls the movement of the evaluation data to be stored to the specific storage device in the unit of the manufacturing information in accordance with the evaluation analysis information (Tian see col 17 lines 5-20 col. 28 lines 24-38 col. 37 lines 59-64 col. 38 lines 13-17 col. 39 lines 44-52 migration based on usage rate and upper limit or based on analysis determining level of data) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include indexing data as taught by Tian for the predictable result of more efficiently organizing and managing data Chong does not teach: the manufacturing information, evaluation analysis information of the semiconductor product, and correlation analysis information of evaluation data over the plurality of inspection processes are stored in the storage data index, wherein a search frequency of the evaluation data, a data size of the evaluation data, the correlation analysis information of the evaluation data over the plurality of inspection processes and availability of the storage devices However, Idei teaches: a search frequency of the evaluation data (Idei see paragraph 0132 migration based on search frequency of data) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include search frequency as taught by Idei for the predictable result of more efficiently organizing and managing data Chong does not teach: the manufacturing information, evaluation analysis information of the semiconductor product, and correlation analysis information of evaluation data over the plurality of inspection processes are stored in the storage data index, wherein a data size of the evaluation data, the correlation analysis information of the evaluation data over the plurality of inspection processes and availability of the storage devices However, Okatamoto teaches: a data size of the evaluation data It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include data size as taught by Okamoto for the predictable result of more efficiently organizing and managing data Chong does not teach: the manufacturing information, evaluation analysis information of the semiconductor product, and correlation analysis information of evaluation data over the plurality of inspection processes are stored in the storage data index, wherein the correlation analysis information of the evaluation data over the plurality of inspection processes and availability of the storage devices However, Baribault teaches: and availability of the storage devices It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include storage device availability as taught by Baribault for the predictable result of more efficiently organizing and managing data Chong does not teach: the manufacturing information, evaluation analysis information of the semiconductor product, and correlation analysis information of evaluation data over the plurality of inspection processes are stored in the storage data index, wherein the correlation analysis information of the evaluation data over the plurality of inspection processes Chu teaches: the manufacturing information, evaluation analysis information of the semiconductor product, and correlation analysis information of evaluation data over the plurality of inspection processes are stored in the storage data index, wherein (Chu see paragraph 0011 detecting variation in semiconductor processes collecting process data and analyzing data including calculating correlation data to build indices) the correlation analysis information of the evaluation data over the plurality of inspection processes (Chu see paragraph 0011 detecting variation in semiconductor processes collecting process data and analyzing data including calculating correlation data to build indices) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include correlation data as taught by Chu for the predictable result of more efficiently organizing and managing data Regarding claim 12, see rejection of claim 3 Claim(s) 4, 8, 13 are/is rejected under 35 U.S.C. 103 as being unpatentable over Chong et al. US2018/0182653 in view of Tian US10885022 in view of Miller et al. US6720194 in view of Idei et al. US2015/0177984 in view of Okamoto et al. US2012/0023233 in view of Baribault et al. US2009/0088142 in view of Chu et al. US2011/0257932 in view of Padmanabhan et al. US11870857 Regarding claim 4, Chong as modified further teaches: the evaluation analysis information (Tian see col 17 lines 5-20 col. 28 lines 24-38 col. 37 lines 59-64 col. 38 lines 13-17 col. 39 lines 44-52 migration based on usage rate and upper limit or based on analysis determining level of data) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include indexing data as taught by Tian for the predictable result of more efficiently organizing and managing data Chong does not teach: a data movement ranking processor configured to execute machine learning using input of the search frequency of the evaluation data, the data size of the evaluation data, the correlation analysis information of the evaluation data over the plurality of inspection processes, and the availability of the storage devices, to calculate priority for moving the evaluation data to be stored into the specific storage device. However, Idei teaches: the search frequency of the evaluation data (Idei see paragraph 0132 migration based on search frequency of data) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include search frequency as taught by Idei for the predictable result of more efficiently organizing and managing data Chong does not teach: a data movement ranking prcoessor configured to execute machine learning using input the data size of the evaluation data, the correlation analysis information of the evaluation data over the plurality of inspection processes, and the availability of the storage devices, to calculate priority for moving the evaluation data to be stored into the specific storage device. However, Okatamoto teaches: the data size of the evaluation data It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include data size as taught by Okamoto for the predictable result of more efficiently organizing and managing data Chong does not teach: a data movement ranking processor configured to execute machine learning using input the correlation analysis information of the evaluation data over the plurality of inspection processes, and the availability of the storage devices, to calculate priority for moving the evaluation data to be stored into the specific storage device. However, Baribault teaches: and availability of the storage devices It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include storage device availability as taught by Baribault for the predictable result of more efficiently organizing and managing data Chong does not teach: a data movement ranking processor configured to execute machine learning using input the correlation analysis information of the evaluation data over the plurality of inspection processes, to calculate priority for moving the evaluation data to be stored into the specific storage device. Chu teaches: the correlation analysis information of the evaluation data over the plurality of inspection processes (Chu see paragraph 0011 detecting variation in semiconductor processes collecting process data and analyzing data including calculating correlation data to build indices) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include correlation data as taught by Chu for the predictable result of more efficiently organizing and managing data Chong does not teach: a data movement ranking processor configured to execute machine learning using input of to calculate priority for moving the evaluation data to be stored into the specific storage device. However, Padmanabhan teaches: a data movement ranking processor configured to execute machine learning using input of to calculate priority for moving the evaluation data to be stored into the specific storage device. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include machine learning as taught by Padmanabhan for the predictable result of more efficiently organizing and managing data Regarding claim 8, Chong as modified further teaches: the priority is calculated on the basis of at least one of the evaluation analysis information, the search frequency of the evaluation data, and the data sizes of the evaluation data. (Tian see col. 30 lines 9-24 col. 37 lines 49-58 data object identifier with certain priority based on how many times object has been accessed within window period which reads on evaluation data, migration priority based on newness of blockchain data which also reads on evaluation analysis) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include indexing data as taught by Tian for the predictable result of more efficiently organizing and managing data Regarding claim 13, see rejection of claim 4 Claim(s) 6 are/is rejected under 35 U.S.C. 103 as being unpatentable over Chong et al. US2018/0182653 in view of Tian US10885022 in view of Miller et al. US6720194 in view of Defoy et al. US2022/0117015 Regarding claim 6, Chong does not teach: the storage data index further comprises a storing flag for storing the evaluation data in the hot storage in the unit of the manufacturing information, wherein the storage data index updating processor updates the storing flag with reference to a predetermined data storing rule, and the storing method updating processor excludes the evaluation data to which the storing flag is attached from data to be moved to the cold storage Defoy teaches: the storage data index further comprises a storing flag for storing the evaluation data in the hot storage in the unit of the manufacturing information, wherein the storage data index updating processor updates the storing flag with reference to a predetermined data storing rule, and the storing method updating processor excludes the evaluation data to which the storing flag is attached from data to be moved to the cold storage (Defoy see paragraph 0177 0193 0215 hot migration flag for purpose of hot VM migration which is not present for cold VM migration) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified a semiconductor product as taught by Chong to include flagging hot data as taught by Defoy for the predictable result of more efficiently organizing and managing data Response to arguments Applicant’s argument: Prior art of record does not teach newly amended subject matter Examiner’s response: Applicant’s argument is moot as newly amended subject matter is responded to in the above rejection Applicant’s argument: Tian does not teach storage in correspondence with the unit of manufacturing index or data index Examiner’s response: Applicant’s argument is considered but is not persuasive. Examiner notes that it is unclear what exactly the argument or if there even is an argument being made. The Tian reference is not relied upon to teach unit of manufacturing information as Chong teaches that by reciting a controller to receive data from semiconductor equipment and system to transmit data to external device. Tian recites an index log file which reads on the storage data index. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALLEN S LIN whose telephone number is (571)270-0612. The examiner can normally be reached on M-F 9-5. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kavita Stanley can be reached on (571)272-8352. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALLEN S LIN/Primary Examiner, Art Unit 2153
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Prosecution Timeline

Show 3 earlier events
Nov 12, 2025
Applicant Interview (Telephonic)
Dec 01, 2025
Response Filed
Jan 14, 2026
Final Rejection mailed — §103, §112
Mar 17, 2026
Applicant Interview (Telephonic)
Mar 18, 2026
Examiner Interview Summary
Mar 24, 2026
Request for Continued Examination
Mar 26, 2026
Response after Non-Final Action
Aug 26, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
67%
Grant Probability
99%
With Interview (+56.8%)
3y 4m (~1y 3m remaining)
Median Time to Grant
High
PTA Risk
Based on 250 resolved cases by this examiner. Grant probability derived from career allowance rate.

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