Notice of Pre-AIA or AIA Status
The present application, filed on or after 16 March 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed on 1 September 2026 in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3 August 2026 has been entered.
Status of the Claims
Claims 1-20 are pending; claims 1, 2, 5, 7, 8, 11, 12, 14, 17, 18 and 19 are amended.
Claim Objection
Claim 14 is objected to because of the following informality: the final step reads “driving by the VCCS and the charge pump, based on the second analog signal, the LED”, omitting the comma after “driving” that the parallel steps carry (“driving, by the VCCS and a charge pump of the LED driver circuit”).
Appropriate correction is required.
Withdrawal of the Rejection under 35 U.S.C. § 112(b)
The rejection of claims 2, 8 and 19 under 35 U.S.C. § 112(b) set forth in the Final Rejection of 1 June 2026 is withdrawn in view of the amendment, which deletes “predetermined” and recites “an amount of time determined prior to activation of the LED.” The amended language is supported by the original disclosure (Instant Specification Paragraphs 20, 25 and 36: the amount of time may be programmed within the timer during manufacture of the LED driver circuit). No new matter is introduced.
Claim Rejections - 35 USC § 102 / 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Ground A: Claims 1-11, 14-17, 19 and 20 are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by Ezaki et al. (US 2008/0174545 A1);
or, in the alternative, under 35 U.S.C. § 103 as being unpatentable over Ezaki in view of Lin et al. (US 2011/0181199 A1);
or, in the alternative, under 35 U.S.C. § 103 as being unpatentable over Ezaki in view of Liu et al. (US 2011/0109249 A1).
Claim interpretation applied in this ground.
The instant specification describes the claimed brightness value functionally: [e.g., Instant Specification Paragraph 19: the activation signal may include a brightness value for controlling a brightness of the LED 104].
Under the broadest reasonable interpretation, a signal includes a brightness value when the information it conveys determines the brightness at which the LED is driven; the instant specification does not limit the value to any bit width or format (Instant Specification Paragraph 26: the code may include more or less than five bits).
Two states of one control signal that respectively command emission at a set drive-current level and emission at the minimum (zero) level are two different brightness values under this reading.
The § 103 alternatives below do not depend on this reading: Lin and Liu each expressly step the light output from a first level to a second, different level in response to successive user operations.
Claim 1 (Ground A)
Regarding claim 1, Ezaki discloses: A light-emitting diode (LED) driver circuit for driving an LED and electrically connectable to an activation interface [e.g., Paragraph 18: serving as a light source; and a light emission control device that supplies drive current to the LED; Fig. 1: LED] [e.g., Fig. 1: 12, 10; Paragraph 30: The external terminal 12 is a single-line interface terminal via which the enable signal; Paragraph 30: is fed in from outside the device; Paragraph 28: The inverter 10 inverts the logic level of the enable signal; Paragraph 28: to feed it to the set terminal S of the on/off controller 3], said LED driver circuit comprising:
a controller electrically connectable to the activation interface, said controller configured to: receive a first activation signal from the activation interface, the first activation signal including a first brightness value [e.g., Fig. 1: 3; Paragraph 21: The on/off controller 3 is a D flip-flop that receives: at its data terminal D, a signal whose logic level is low; at its set terminal S, an inverted enable signal] [e.g., Figs. 1, 2: b (inverted enable signal), c; Paragraph 21: fed to its set terminal S is low, the on/off controller 3 keeps its output signal; Paragraph 21: set high, irrespective of the output signal; Paragraph 45: of the on/off controller 3 turns high, and the output signal];
receive a second activation signal from the activation interface, the second activation signal including a second brightness value different from the first brightness value [e.g., Figs. 1, 2: b, between tm and tn; Paragraph 37: is kept low (disabled) for a period of 512 µs, the output signal; Paragraph 37: of the on/off controller 3 is reset to low, causing the UVLO section 4 to stop operating];
generate a first control signal, the first control signal including the first brightness value [e.g., Figs. 1, 2: c = high; Paragraph 23: the output logic level of the AND operator 5 is high only when the output signals; Paragraph 23: are both high, and is low otherwise; Paragraph 26: when the output logic level of the AND operator 5 is high, the switch 8 is on]; and
generate a second control signal, the second control signal including the second brightness value [e.g., Figs. 1, 2: c = low; Paragraph 21: (i.e., resets it to low), irrespective of the output signal; Paragraph 26: when the output logic level of the AND operator 5 is low, the switch 8 is off];
a binary counter electrically connected to the controller, said binary counter configured to: receive the first control signal from the controller [e.g., Fig. 1: 1; Paragraph 19: The counter 1 receives, at its reset terminal, an output signal; Paragraph 19: of the on/off controller 3 so that, when the logic level of the output signal];
generate a first code based on the first control signal [e.g., Figs. 1, 2: e; Paragraph 19: to count the number of pulses in it, and outputs the count as digital data; Paragraph 35:
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is four-bit digital data (0 to 15), when the enable signal; Paragraph 35: is pulsated eight times and then remains high, the LED drive current level is set at]
receive the second control signal from the controller [e.g., Fig. 1: 1; Paragraph 19: The counter 1 receives, at its reset terminal, an output signal; Paragraph 19: of the on/off controller 3 so that, when the logic level of the output signal]; and
generate a second code based on the second control signal [e.g., Fig. 2: e = 0; Paragraph 19: becomes low, the counter 1 initializes the number of pulses (resets to zero); Paragraph 37: the number of pulses counted by the counter 1 and the detection state of the low-level period detector 2 are initialized (i.e., their outputs are reset to zero and to low, respectively)];
a digital-to-analog converter (DAC) electrically connected to the binary counter, said DAC configured to: receive the first code from the binary counter [e.g., Fig. 1: 6; Paragraph 24: fed from the counter 1 into analog data, and outputs the analog data];
generate a first analog signal based on the first code [e.g., Paragraph 34: as digital data and converts it into analog data, according to which the variable current source 7 controls the level of the drive current];
receive the second code from the binary counter [e.g., Fig. 1: 6; Paragraph 24: fed from the counter 1 into analog data, and outputs the analog data]; and
generate a second analog signal based on the second code [e.g., Paragraph 24: fed from the counter 1 into analog data; Paragraph 35: returns to zero, causing the LED drive current level to be set at its minimum (zero)]; and
a voltage controlled current source (VCCS) electrically connected to the DAC, said VCCS configured to: [e.g., Fig. 1: 7; Paragraph 25: The variable current source 7 generates a drive current whose level is based on the analog data fed from the DAC 6, and supplies the drive current to the LED];
receive the first analog signal from the DAC [e.g., Paragraph 34: as digital data and converts it into analog data, according to which the variable current source 7 controls the level of the drive current];
control a brightness of the LED based on the first analog signal [e.g., Paragraph 33: the level of the drive current is controlled according to the number of pulses in the enable signal; Paragraph 35: the LED drive current level is set at];
receive the second analog signal from the DAC [e.g., Paragraph 24: fed from the counter 1 into analog data; Paragraph 35: returns to zero, causing the LED drive current level to be set at its minimum (zero)]; and
adjust the brightness of the LED based on the second analog signal [e.g., Paragraph 35: causing the LED drive current level to be set at its minimum (zero); Paragraph 37: has been kept low for a period of 512 µs, it is recognized to have become disabled] (e.g., see Paragraphs 17-39, 40-53, 60, 64-67).
In the mapping above (the mapping of record since the action of 30 December 2025), the inverter 10 fed from the external terminal 12 is the activation interface, its inverted enable signal b is the activation signal, the on/off controller 3 is the controller, and its output c is the control signal.
The first activation signal is the state of b that sets c high (emission enabled at the counted level), and the second activation signal is the state of b sustained for 512 µs that resets c low (emission disabled -- level zero); the two control-signal states therefore carry two different brightness values in the interpretation stated above.
The counter 1, which receives c at its reset terminal, generates a first code (its count, e.g., level 8) while c is high and a second code (zero) when c goes low; the DAC 6 converts each into analog data; and the variable current source 7 controls the LED brightness according to the first analog data and adjusts it, to the minimum (zero) level, according to the second analog data.
Alternatively, claim 1 is unpatentable over Ezaki in view of Lin (35 U.S.C. § 103).
To the extent the on/off controller output c is not regarded as including a brightness value, Ezaki also discloses that the drive-current level itself is commanded by a pulse-coded control signal: [e.g., Paragraph 34: fed to the light emission control device is pulsated, the counter 1 increments its count; Paragraph 35: If the LED drive current level is currently set at its maximum; Paragraph 35: is pulsated once more, the count] [e.g., Paragraph 33: the level of the drive current is controlled according to the number of pulses in the enable signal; Paragraph 35: the LED drive current level is set at].
Successive pulse groups of the enable signal a are successive control signals whose pulse counts are different brightness values (eight pulses set level 8; further pulses set higher levels; the count returns to zero from level 15, and a 512 µs low period resets the count for a fresh setting -- [e.g., Fig. 2: e = 0; Paragraph 19: becomes low, the counter 1 initializes the number of pulses (resets to zero); Paragraph 37: the number of pulses counted by the counter 1 and the detection state of the low-level period detector 2 are initialized (i.e., their outputs are reset to zero and to low, respectively)]),
the counter 1 generates a code from each, the DAC 6 converts each code into analog data, and the variable current source 7 controls and then adjusts the LED drive current accordingly [e.g., Paragraph 34: turns high, and the
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DAC 6 receives the count; Paragraph 34: as digital data and converts it into analog data, according to which the variable current source 7 controls the level of the drive current].
In this reading the external terminal 12 is the interface at which the activation signal arrives, and the enable signal a fed to the counter is the control signal.
Ezaki does not expressly disclose a controller of the LED driver circuit that receives the activation signals from the activation interface and generates the control signals:
in Ezaki the enable signal a is generated outside the device and fed in through the external terminal 12 [e.g., Paragraph 5: as commands such as those requesting writes to a register are transmitted to the light emission control device, its turning on/off and light emission amount (drive current level) are controlled; Paragraph 7: according to various control signals fed from outside the device].
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Lin teaches an LED dimming controller 308 that receives the user’s operations of an ordinary on/off switch as its activation signals and, inside the controller, converts them into the counted control signal: [e.g., Fig. 5: 506 (inside 308); Paragraph 46: The dimming controller 308 includes a trigger monitoring unit 506, a dimmer 502 and a pulse signal generator 504; Paragraph 46: The trigger monitoring unit 506 can receive a switch monitoring signal indicating an operation of the external power switch 304 through the terminal CLK and can generate a driving signal for driving a counter 526 when an operation of the external power switch 304 is detected at the terminal CLK] [e.g., Fig. 4: 304, R3, R6; Paragraph 36: a power switch 304 coupled between the power source and the light source driving circuit; Paragraph 52: When the power switch 304 is turned off, the voltage at the terminal CLK drops to zero. Therefore, a switch monitoring signal indicating the operation of the power switch 304 can be detected at the terminal CLK] [e.g., Paragraph 52: the trigger monitoring unit 506 generates a driving signal when a turn-off operation is detected at the terminal CLK].
Lin’s counter 526 and D/A converter 528 then produce, from each successive operation, a different code and a different analog voltage that sets the LED current, so that the light output is controlled at a first level and adjusted to a second level [e.g., Fig. 5: 526; Paragraph 54: the dimmer 502 includes a counter 526 coupled to the trigger monitoring unit 506 for counting operations of the power switch 304, a digital-to-analog converter (D/A converter) 528 coupled to the counter 526; Paragraph 54: The counter value of the counter 526 can be increased, e.g., by 1, in response to the driving signal] [e.g., Fig. 5: 528; Paragraph 54: The D/A converter 528 reads the counter value from the counter 526 and generates a dimming signal (e.g., control signal 538 or reference signal REF) based on the counter value] [e.g., Paragraph 57: if the counter value is 0, the D/A converter 528 adjusts the reference signal REF to have a voltage V4. If the counter value is increased to 1 when a turn-off operation of the power switch 304 is detected at the terminal CLK by the trigger monitoring unit 506, the D/A converter 528 adjusts the reference signal REF to have a voltage V5 that is less than V4] [e.g., Paragraph 62: The D/A converter 528 can adjust the voltage of the reference signal REF from a first level to a second level in response to the change of the counter value. Therefore, the light output of the LED string 312 can be adjusted in accordance with the adjusted reference signal REF when the power switch 304 is turned on; Paragraph 58: the light output of the LED string 312 can be adjusted from a first level to a second level, then to a third level, then to a fourth level, and then back to the first level].
Lin further teaches that the control switch that regulates the LED current may be integrated in the same controller [e.g., Fig. 4: 308 (terminals HV_GATE, SEL, CLK, RT, VDD, CTRL, MON, GND); Paragraph 37: terminals of the dimming controller 308 can include HV_GATE, SEL, CLI<, RT, VDD, CTRL, MON and GND; Paragraph 35: In another embodiment, the control switch Q16 can be integrated in the dimming controller 308].
Ezaki and Lin are analogous art: both are directed to controlling the drive current supplied to an LED so as to turn the LED on and off and set its light emission level according to a control signal (Ezaki Paragraphs 3, 10; Lin Paragraphs 3-4, 74), the field of the instant application (Instant Specification Paragraph 2).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide Ezaki’s LED driver IC with a trigger monitoring unit as taught by Lin, receiving a user’s switch operations at a terminal of the IC and generating the counted control pulses to Ezaki’s counter 1, so that the user sets and adjusts the LED brightness by operating a common on/off switch rather than by a dedicated host apparatus.
Lin states the reason: [e.g., Lin, Paragraph 4: users may need to use a dedicated apparatus, such as a specially designed switch with adjusting buttons or a switch that can receive a remote control signal, to adjust the reference signal REF] and [e.g., Lin, Paragraph 74: extra apparatus for dimming, such as an external dimmer or a specially designed switch with adjusting buttons, can be avoided and the cost can be reduced].
The modification serves Ezaki’s own stated goal of controlling the drive current level through a single-line interface with fewer external terminals [e.g., Ezaki, Paragraph 18: built as a semiconductor integrated circuit device (a so-called LED driver IC); Paragraph 39: This helps reduce the number of external terminals, contributing to a reduced size and cost of the light emission control device], and it applies a known technique (counting user switch operations to step a dimming level) to a known device (a counter/DAC/current-source LED driver IC) ready for improvement, with predictable results. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); Graham v. John Deere Co., 383 U.S. 1 (1966).
Alternatively, claim 1 is unpatentable over Ezaki in view of Liu (35 U.S.C. § 103).
Ezaki is applied as in the preceding alternative.
Liu likewise teaches an LED lighting driver in which the user’s toggles of a regular wall switch are the activation signals, a falling-edge detector of the driver’s switching controller generates the counting pulses (the control signals) from those toggles, a two-bit counter generates a different code for each successive toggle, a DAC converts the counting value into a dimming voltage, and the driver controls the LED at a first level and adjusts it to a second, lower level: [e.g., Liu, Fig. 8: 86 (inside 85), 74; Paragraph 45: Toggle detector 74 monitors the presence (or absence) of bias AC voltage VB on winding 93. If wall switch 98 is turned off for a moment, the switching of MOSFET 83 stops; Paragraph 47: Toggle detector 74 can keep toggle voltage VTGL higher than the predetermined threshold of falling edge detector 86 until a first time duration after wall switch 98 is turned off] [e.g., Liu, Fig. 8: 96 (2-bit Counter); Paragraph 46: Counter 96 is an ultra-low power CMOS logic, typically uses less than 1 uA of current; Paragraph 53: Each consecutive toggle of wall switch 98 causes counter 96 to count up by one] [e.g., Liu, Fig. 8: 87 (inside 85); Paragraph 48: Switching controller 85 includes a digital-to-analog converter (DAC) 87. DAC 87 converts the counting value of counter 96 into a dimming voltage VDIM. Dimming voltage VDIM decreases as the counting value increases] [e.g., Liu, Paragraph 53: After the first toggle, the counting value enters 01-state. Accordingly, the switching duty cycle of power MOSFET 83 is reduced to 50%. The second toggle makes the counting value to enter 10-state, corresponding to a switching duty cycle of 25%] [e.g., Liu, Fig. 8: 80, 83, 84; Paragraph 48: switching controller 85 drives power MOSFET 83 so that the switching duty cycle of power MOSFET 83 is directly proportional to the dimming voltage VDIM. As a result, when counter 96 increases its counting value, LED lighting driver 80 provides less power to LED light source 99 in response; Paragraph 43: LED lighting driver 80 is a buck converter].
Liu expressly teaches building the entire dimming function into the LED lighting driver [e.g., Liu, Paragraph 25: The LED lamp uses a regular wall switch to control the dimming. The entire dimming function can be built into the LED lighting driver of the LED lamp].
Ezaki and Liu are analogous art for the reason given above (Liu Paragraphs 2, 18, 25).
It would have been obvious to provide Ezaki’s LED driver IC with Liu’s toggle-detecting front end generating the counting pulses for Ezaki’s counter 1, so that the LED brightness is set and adjusted by the number of operations of an ordinary switch, for the reasons Liu states: [e.g., Liu, Paragraph 25: The LED lamp does not need re-wiring or any retrofit work to the ordinary wall switch. The LED lamp does not need a triac dimmer or any extra dimmer hardware; Paragraph 24: the bottleneck for other dimming schemes is the extra hardware and cost in transmitting the VDIM information to the LED lighting drivers]. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); Graham v. John Deere Co., 383 U.S. 1 (1966).
Claim 2 (Ground A)
Regarding claim 2, Ezaki further discloses: The LED driver circuit of claim 1, comprising a timer electrically connected to the binary counter, the DAC, and the VCCS, said timer configured to deactivate the binary counter, the DAC, and the VCCS after an amount of time determined prior to activation of the LED [e.g., Fig. 1: 2, 3; Paragraph 20: has been kept low (disabled) for a predetermined period (in this embodiment, 512 µs); otherwise, the low-level period detector 2 keeps the logic level of its output signal; Paragraph 27: The clock signal generated by the oscillator 9 is fed to the low-level period detector 2, which uses the clock signal to detect whether or not the enable signal] [e.g., Paragraph 37: of the on/off controller 3 is reset to low, causing the UVLO section 4 to stop operating; moreover, the number of pulses counted by the counter 1 and the detection state of the low-level period detector 2 are initialized; Paragraph 19: becomes low, the counter 1 initializes the number of pulses (resets to zero)] [e.g., Paragraph 20: a predetermined period (in this embodiment, 512 µs);
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Paragraph 27: The oscillator 9 generates a clock signal of a predetermined frequency (in this embodiment, 1 MHz)].
The low-level period detector 2 with the on/off controller 3 is the claimed timer: it is connected to the counter 1 (reset terminal), and through the counter to the DAC 6 and the variable current source 7; after the predetermined period of 512 µs -- a period fixed in the design of the device, i.e., determined prior to any activation of the LED -- it resets c, whereupon the counter is initialized to zero, the DAC output goes to the zero level and the drive current goes to its minimum (zero).
Alternatively (Ezaki in view of Lin; Ezaki in view of Liu):
Lin teaches a start-up and under-voltage-lockout circuit that, after the switch is operated, turns off the current-regulation path and then the counter and D/A converter after time periods set by the design (the discharge of CIO through the second and third predetermined voltages) [e.g., Lin, Fig. 5: 508; Fig. 4: CIO; Paragraph 47: When the power switch 304 is turned off, the start up and under voltage lockout circuit 508 is operable for turning off other components of the dimming controller 308 except the trigger monitoring unit 506 and the dimmer 502 when the voltage at the terminal VDD is less than a second predetermined voltage, in order to save energy. The start up and under voltage lockout circuit 508 is further operable for turning off the trigger monitoring unit 506 and the dimmer 502 when the voltage at the terminal VDD is less than a third predetermined voltage; Paragraph 47: the trigger monitoring unit 506 and the dimmer 502 can still operate for a time period after the power switch 304 is turned off].
Liu teaches the same staged deactivation with express durations [e.g., Liu, Fig. 8: 71, 72, 90; Paragraph 47: Bias voltage supply circuit 90 can provide bias DC voltage VDDI to switching controller 85 until a second time duration after wall switch 98 is turned off. The sustain voltage VDD2 provided by sustain voltage supply circuit 71 can maintain the counting value stored in counter 96 until a third time duration after wall switch 98 is turned off; Paragraph 47: the first, second, and third time durations may be 1 millisecond, 100 milliseconds, and 2 seconds, respectively].
Either teaching, applied to Ezaki as set forth for claim 1, deactivates the counter, the DAC and the current source after an amount of time determined prior to activation of the LED; the motivation is that of claim 1, with Lin’s and Liu’s further reason that the deactivation saves energy (Lin Paragraph 47; Liu Paragraphs 46-47). KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); Graham v. John Deere Co., 383 U.S. 1 (1966).
Claim 3 (Ground A)
Regarding claim 3, Ezaki further discloses: The LED driver circuit of claim 1, comprising a power supply electrically connected to the VCCS, the binary counter, and the DAC, a charge pump electrically connected to the power supply, said charge pump configured to supply a source voltage to the LED [e.g., Fig. 2: power supply voltage; Paragraph 22: high when the power supply voltage to the light emission control device has reached a predetermined voltage level; Paragraph 60:
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longer life of batteries used in mobile appliances can be achieved] [e.g., Paragraph 52: when a charge pump is provided in the light emission control device to generate the drive voltage of the LED, the clock signal of the oscillator 9 can be utilized as a clock signal for driving the charge pump].
Ezaki’s power supply (the supply voltage monitored by the UVLO section 4; batteries in mobile appliances) powers the on-chip counter 1, DAC 6 and variable current source 7, and Ezaki provides, within the light emission control device, a charge pump generating the drive voltage of the LED from that supply.
Alternatively (Ezaki in view of Lin; Ezaki in view of Liu):
Lin [e.g., Lin, Fig. 4: 306, C9; Paragraph 36: an AC/DC converter 306 for converting an AC input voltage VIN to a DC output voltage VOUT] and Liu [e.g., Liu, Fig. 8: 102, 103; Paragraph 41: Bridge rectifier 102 receives a source AC voltage from the AC line 101 through a wall switch 98 and provides a rectified DC voltage VDC] each supply their counter, DAC and current-regulating stage from a power supply; the charge pump generating the LED drive voltage is Ezaki’s (Paragraph 52). The rationale of claim 1 applies. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); Graham v. John Deere Co., 383 U.S. 1 (1966).
Claim 4 (Ground A)
Regarding claim 4, Ezaki further discloses: The LED driver circuit of claim 1, said VCCS configured to receive a sink current from the LED, wherein the VCCS is a non-linear current source [e.g., Fig. 1: 7, 8, LED (current path); Paragraph 26: the switch 8 is serially connected in the current path connecting the variable current source 7 to the LED] [e.g., Fig. 2: drive current (stepwise levels); Paragraph 35: is four-bit digital data (0 to 15); Paragraph 66: Instead of varying the current level, the period for which current is supplied may be varied to achieve PMW driving].
The variable current source 7 sits in the return path of the LED current (the current flows from the LED through the switch 8 into the current source), and it sets the drive current in discrete steps selected by the four-bit count -- a stepwise, non-linear relationship between control input and output current. Ezaki also teaches driving the LED by PWM in place of level control (Paragraph 66), a switched (non-linear) mode of current delivery.
Alternatively (Ezaki in view of Lin; Ezaki in view of Liu):
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Lin’s control switch Q16 sinks the LED current to ground and regulates it by switching a buck inductor stage -- a non-linear (switch-mode) current source [e.g., Lin, Fig. 4: Q27, Q16, R5; Paragraph 41: The control switch Q16 is coupled in series with the LED string 312 and the switch Q27, and is coupled to ground through the current sensing resistor R5; Paragraph 41: the dimming controller 308 can adjust the LED current flowing through the LED string 312 to ground by controlling the control switch Q16] [e.g., Lin, Paragraph 35: the power converter 310 can be a buck converter including an inductor L1, a diode D4 and a control switch Q16; Paragraph 61: The LED current gradually increases because the inductor resists a sudden change of the LED current];
Liu’s driver is likewise a buck converter whose MOSFET 83 sinks the LED current through the sense resistor to ground and is switched at a duty cycle set by the dimming voltage [e.g., Liu, Fig. 8: 83, 84, GND; Paragraph 42: Sense resistor 84 is coupled between power MOSFET 83 and the ground GND] [e.g., Liu, Fig. 8: 80, 83, 84; Paragraph 48: switching controller 85 drives power MOSFET 83 so that the switching duty cycle of power MOSFET 83 is directly proportional to the dimming voltage VDIM. As a result, when counter 96 increases its counting value, LED lighting driver 80 provides less power to LED light source 99 in response; Paragraph 43: LED lighting driver 80 is a buck converter].
It would have been obvious to implement Ezaki’s variable current source as such a switch-mode sink for the efficiency reasons Lin and Liu give (Lin Paragraph 47; Liu Paragraph 25), consistent with Ezaki’s PWM alternative. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); Graham v. John Deere Co., 383 U.S. 1 (1966).
Claim 5 (Ground A)
Regarding claim 5, Ezaki further discloses: The LED driver circuit of claim 1, said binary counter generating the first code to include the first brightness value, said binary counter generating the second code to include the second brightness value, said DAC generating the first analog signal to have a first voltage value representative of the first brightness value, [e.g., Paragraph 34: turns high, and the DAC 6 receives the count; Paragraph 34: as digital data and converts it into analog data, according to which the variable current source 7 controls the level of the drive current] [e.g., Fig. 2: e = 0; Paragraph 19: becomes low, the counter 1 initializes the number of pulses (resets to zero); Paragraph 37: the number of pulses counted by the counter 1 and the detection state of the low-level period detector 2 are initialized (i.e., their outputs are reset to zero and to low, respectively)];
said DAC generating the second analog signal to have a second voltage value representative of the second brightness value [e.g., Paragraph 34: as digital data and converts it into analog data, according to which the variable current source 7 controls the level of the drive current] [e.g., Paragraph 24: fed from the counter 1 into analog data; Paragraph 35: returns to zero, causing the LED drive current level to be set at its minimum (zero)].
The count e is the brightness value in coded form (the four-bit count is the drive-current level); the analog data into which the DAC 6 converts it is the analog signal whose level represents that value [e.g., Instant Specification Paragraph 26: A voltage level of the analog signal may correspond to the brightness value].
Alternatively (Ezaki in view of Lin; Ezaki in view of Liu):
Lin’s D/A converter 528 generates, for each counter value, a reference voltage representative of the level (V4 for count 0; V5 for count 1) [e.g., Lin, Paragraph 57: if the counter value is 0, the D/A converter 528 adjusts the reference signal REF to have a voltage V4. If the counter value is increased to 1 when a turn-off operation of the power switch 304 is detected at the terminal CLK by the trigger monitoring unit 506, the D/A converter 528 adjusts the reference signal REF to have a voltage V5 that is less than V4].
Liu’s DAC 87 converts each counting value into a dimming voltage VDIM [e.g., Liu, Fig. 8: 87 (inside 85); Paragraph 48: Switching controller 85 includes a digital-to-analog converter (DAC) 87. DAC 87 converts the counting value of counter 96 into a dimming voltage VDIM. Dimming voltage VDIM decreases as the counting value increases].
The rationale of claim 1 applies. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); Graham v. John Deere Co., 383 U.S. 1 (1966).
Claim 6 (Ground A)
Regarding claim 6, Ezaki further discloses: The LED driver circuit of claim 1, wherein the LED driver circuit is a single integrated circuit (IC) chip [e.g., Paragraph 18: built as a semiconductor integrated circuit device (a so-called LED driver IC);
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Paragraph 39: This helps reduce the number of external terminals, contributing to a reduced size and cost of the light emission control device].
Ezaki’s light emission control device -- containing the counter 1, DAC 6, variable current source 7, on/off controller 3 and the remaining elements -- is built as a single semiconductor integrated circuit device (an LED driver IC).
In the § 103 alternatives, Lin’s trigger monitoring unit (or Liu’s falling-edge detector) is provided within that IC; Lin and Liu each teach integrating the dimming control elements in one controller [e.g., Lin, Fig. 4: 308 (terminals HV_GATE, SEL, CLK, RT, VDD, CTRL, MON, GND); Paragraph 37: terminals of the dimming controller 308 can include HV_GATE, SEL, CLK, RT, VDD, CTRL, MON and GND; Paragraph 35: In another embodiment, the control switch Q16 can be integrated in the dimming controller 308] [e.g., Liu, Paragraph 25: The LED lamp uses a regular wall switch to control the dimming. The entire dimming function can be built into the LED lighting driver of the LED lamp].
Claim 7 (Ground A)
Regarding claim 7, Ezaki discloses: A system comprising: a light emitting diode (LED) [e.g., Paragraph 18: serving as a light source; and a light emission control device that supplies drive current to the LED; Fig. 1: LED];
an activation interface configured to generate a first activation signal and a second activation signal [e.g., Fig. 1: 12, 10; Paragraph 30: The external terminal 12 is a single-line interface terminal via which the enable signal; Paragraph 30: is fed in from outside the device; Paragraph 28: The inverter 10 inverts the logic level of the enable signal; Paragraph 28: to feed it to the set terminal S of the on/off controller 3] [e.g., Figs. 1, 2: b (inverted enable signal), c; Paragraph 21: fed to its set terminal S is low, the on/off controller 3 keeps its output signal; Paragraph 21: set high, irrespective of the output signal; Paragraph 45: of the on/off controller 3 turns high, and the output signal] [e.g., Figs. 1, 2: b, between tm and tn; Paragraph 37: is kept low (disabled) for a period of 512 µs, the output signal; Paragraph 37: of the on/off controller 3 is reset to low, causing the UVLO section 4 to stop operating]; and
an integrated circuit (IC) comprising: a controller electrically connected to the activation interface, said controller configured to: receive the first activation signal from the activation interface [e.g., Paragraph 18: the light emission control device is built as a semiconductor integrated circuit device (a so-called LED driver IC); Fig. 1] [e.g., Fig. 1: 3; Paragraph 21: The on/off controller 3 is a D flip-flop that receives: at its data terminal D, a signal whose logic level is low; at its set terminal S, an inverted enable signal];
generate a first control signal based on the first activation signal, said first control signal including a first brightness value [e.g., Figs. 1, 2: c = high; Paragraph 23: the output logic level of the AND operator 5 is high only when the output signals; Paragraph 23: are both high, and is low otherwise; Paragraph 26: when the output logic level of the AND operator 5 is high, the switch 8 is on];
receive the second activation signal from the activation interface [e.g., Figs. 1, 2: b, between tm and tn; Paragraph 37: is kept low (disabled) for a period of 512 µs, the output signal; Paragraph 37: of the on/off controller 3 is reset to low, causing the UVLO section 4 to stop operating]; and
generate a second control signal based on the second activation signal, said second control signal including a second brightness value different from the first brightness value [e.g., Figs. 1, 2: c = low; Paragraph 21: (i.e., resets it to low), irrespective of the output signal; Paragraph 26: when the output logic level of the AND operator 5 is low, the switch 8 is off];
a binary counter electrically connected to the controller, said binary counter configured to: [e.g., Fig. 1: 1; Paragraph 19: The counter 1 receives, at its reset terminal, an output signal; Paragraph 19: of the on/off controller 3 so that, when the logic level of the output signal];
receive the first control signal from the controller [e.g., Fig. 1: 1; Paragraph 19: The counter 1 receives, at its reset terminal, an output signal; Paragraph 19: of the on/off controller 3 so that, when the logic level of the output signal];
generate a first code based on the first control signal [e.g., Figs. 1, 2: e; Paragraph 19: to count the number of pulses in it, and outputs the count as digital data; Paragraph 35: is four-bit digital data (0 to 15), when the enable signal; Paragraph 35: is pulsated eight times and then remains high, the LED drive current level is set at];
receive the second control signal from the controller [e.g., Fig. 1: 1; Paragraph 19: The counter 1 receives, at its reset terminal, an output signal; Paragraph 19: of the on/off controller 3 so that, when the logic level of the output signal]; and
generate a second code based on the second control signal [e.g., Fig. 2: e = 0; Paragraph 19: becomes low, the counter 1 initializes the number of pulses (resets to zero); Paragraph 37: the number of pulses counted by the counter 1 and the detection state of the low-level period detector 2 are initialized (i.e., their outputs are reset to zero and to low, respectively)];
a digital-to-analog converter (DAC) electrically connected to the binary counter, said DAC configured to: receive the first code from the binary counter [e.g., Fig. 1: 6; Paragraph 24: fed from the counter 1 into analog data, and outputs the analog data];
generate a first analog signal based on the first code [e.g., Paragraph 34: as digital data and converts it into analog data, according to which the variable current source 7 controls the level of the drive current];
receive the second code from the binary counter [e.g., Fig. 1: 6; Paragraph 24: fed from the counter 1 into analog data, and outputs the analog data]; and
generate a second analog signal based on the second code [e.g., Paragraph 24: fed from the counter 1 into analog data; Paragraph 35: returns to zero, causing the LED drive current level to be set at its minimum (zero)]; and
a voltage controlled current source (VCCS) electrically connected to the DAC, said VCCS configured to: receive the first analog signal from the DAC [e.g., Fig. 1: 7; Paragraph 25: The variable current source 7 generates a drive current whose level is based on the analog data fed from the DAC 6, and supplies the drive current to the LED];
control a brightness of the LED based on the first analog signal [e.g., Paragraph 33:
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the level of the drive current is controlled according to the number of pulses in the enable signal; Paragraph 35: the LED drive current level is set at];
receive the second analog signal from the DAC [e.g., Paragraph 24: fed from the counter 1 into analog data; Paragraph 35: returns to zero, causing the LED drive current level to be set at its minimum (zero)]; and
adjust the brightness of the LED based on the second analog signal [e.g., Paragraph 35: causing the LED drive current level to be set at its minimum (zero); Paragraph 37: has been kept low for a period of 512 µs, it is recognized to have become disabled] (e.g., see Paragraphs 17-39, 40-53, 60, 64-67).
Claim 7 recites the system of claim 1 with the LED and the activation interface as elements and with the controller, counter, DAC and VCCS contained in an integrated circuit; the mapping and interpretation set forth for claim 1 apply, and Ezaki’s controller 3, counter 1, DAC 6 and variable current source 7 are all elements of the single LED driver IC of Paragraph 18.
Alternatively (Ezaki in view of Lin; Ezaki in view of Liu):
In the § 103 alternatives set forth for claim 1, the activation interface is the user’s on/off switch ([e.g., Lin, Paragraph 74: users can adjust the light output of the light source through an operation (e.g., a turn-off operation) of a common on/off power switch; Paragraph 102: a user can control the power switch 304 to control the dimming of the LED light source 1412];
[e.g., Liu, Paragraph 57: The dimming level is instructed by the number of wall switch toggles after the LED lamp is initially turned on]), which generates a first and a second activation signal upon its first and second operations;
the controller is Lin’s trigger monitoring unit (or Liu’s falling-edge detector) provided within Ezaki’s LED driver IC, where it generates the first and second control signals, based on the first and second activation signals, to Ezaki’s counter 1.
Lin teaches that the elements of the dimming controller, including the current-regulating switch, are integrated in one pin-defined controller [e.g., Lin, Fig. 4: 308 (terminals HV_GATE, SEL, CLK, RT, VDD, CTRL, MON, GND); Paragraph 37: terminals of the dimming controller 308 can include HV_GATE, SEL, CLK, RT, VDD, CTRL, MON and GND; Paragraph 35: In another embodiment, the control switch Q16 can be integrated in the dimming controller 308], and
Liu teaches building the entire dimming function into the LED lighting driver [e.g., Liu, Paragraph 25: The LED lamp uses a regular wall switch to control the dimming. The entire dimming function can be built into the LED lighting driver of the LED lamp];
providing the trigger unit within Ezaki’s IC therefore follows the references’ own teaching and Ezaki’s single-chip design [e.g., Ezaki, Paragraph 18: built as a semiconductor integrated circuit device (a so-called LED driver IC); Paragraph 39: This helps reduce the number of external terminals, contributing to a reduced size and cost of the light emission control device].
The remaining elements are as set forth for claim 1, with the same motivation. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); Graham v. John Deere Co., 383 U.S. 1 (1966).
Claim 8 (Ground A)
Regarding claim 8, this claim is rejected by the reasoning applied in rejecting claim 2.
Claim 8 recites, for the system of claim 7, the timer of claim 2; the disclosure applied to claim 2 applies, the timer (Ezaki’s detector 2 with controller 3; alternatively Lin’s circuit 508 or Liu’s sustain/bias timing) being within the IC.
Claim 9 (Ground A)
Regarding claim 9, this claim is rejected by the reasoning applied in rejecting claim 3.
Claim 9 recites, for the system of claim 7, the power supply and charge pump of claim 3 (the charge pump configured to drive the LED); the disclosure applied to claim 3 applies.
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Claim 10 (Ground A)
Regarding claim 10, this claim is rejected by the reasoning applied in rejecting claim 4.
Claim 10 recites, for the system of claim 7, the sink-current, non-linear current source of claim 4; the disclosure applied to claim 4 applies.
Claim 11 (Ground A)
Regarding claim 11, this claim is rejected by the reasoning applied in rejecting claim 5.
Claim 11 recites, for the system of claim 7, the code and voltage-value limitations of claim 5; the disclosure applied to claim 5 applies.
Claim 14 (Ground A)
Regarding claim 14, Ezaki discloses a method for a light emitting diode (LED) driver circuit, comprising: [e.g., Paragraph 18: the light emission control device is built as a semiconductor integrated circuit device (a so-called LED driver IC); Fig. 1];
receiving, by an activation interface, a first activation input [e.g., Fig. 1: 12, 10; Paragraph 30: The external terminal 12 is a single-line interface terminal via which the enable signal; Paragraph 30: is fed in from outside the device; Paragraph 28: The inverter 10 inverts the logic level of the enable signal; Paragraph 28: to feed it to the set terminal S of the on/off controller 3];
receiving, by the activation interface, a second activation input [e.g., Fig. 1: 12, 10; Paragraph 30: The external terminal 12 is a single-line interface terminal via which the enable signal; Paragraph 30: is fed in from outside the device; Paragraph 28: The inverter 10 inverts the logic level of the enable signal; Paragraph 28: to feed it to the set terminal S of the on/off controller 3];
generating, by the activation interface, a first activation signal based on the first activation input [e.g., Figs. 1, 2: b (inverted enable signal), c; Paragraph 21: fed to its set terminal S is low, the on/off controller 3 keeps its output signal; Paragraph 21: set high, irrespective of the output signal; Paragraph 45: of the on/off controller 3 turns high, and the output signal];
generating, by the activation interface, a second activation signal based on the second activation input [e.g., Figs. 1, 2: b, between tm and tn; Paragraph 37: is kept low (disabled) for a period of 512 µs, the output signal; Paragraph 37: of the on/off controller 3 is reset to low, causing the UVLO section 4 to stop operating];
generating, by a controller of the LED driver circuit, based on the first activation signal, a first control signal, wherein said first control signal includes a first brightness value [e.g., Fig. 1: 3; Paragraph 21: The on/off controller 3 is a D flip-flop that receives: at its data terminal D, a signal whose logic level is low; at its set terminal S, an inverted enable signal] [e.g., Figs. 1, 2: c = high; Paragraph 23: the output logic level of the AND operator 5 is high only when the output signals; Paragraph 23: are both high, and is low otherwise; Paragraph 26: when the output logic level of the AND operator 5 is high, the switch 8 is on];
generating, by the controller, based on the second activation signal, a second control signal, wherein said second control signal includes a second brightness value different from the first brightness value [e.g., Figs. 1, 2: c = low; Paragraph 21: (i.e., resets it to low), irrespective of the output signal; Paragraph 26: when the output logic level of the AND operator 5 is low, the switch 8 is off];
generating, by a binary counter of the LED driver circuit, based on the first control signal, a first code [e.g., Fig. 1: 1; Paragraph 19: The counter 1 receives, at its reset terminal, an output signal; Paragraph 19: of the on/off controller 3 so that, when the logic level of the output signal] [e.g., Figs. 1, 2: e; Paragraph 19: to count the number of pulses in it, and outputs the count as digital data; Paragraph 35: is four-bit digital data (0 to 15), when the enable signal; Paragraph 35: is pulsated eight times and then remains high, the LED drive current level is set at];
generating, by the binary counter, based on the second control signal, a second code [e.g., Fig. 2: e = 0; Paragraph 19: becomes low, the counter 1 initializes the number of pulses (resets to zero); Paragraph 37: the number of pulses counted by the counter 1 and the detection state of the low-level period detector 2 are initialized (i.e., their outputs are reset to zero and to low, respectively)];
receiving, by a digital-to-analog converter (DAC) of the LED driver circuit, the first code [e.g., Fig. 1: 6; Paragraph 24: fed from the counter 1 into analog data, and outputs the analog data];
receiving, by the DAC, the second code [e.g., Fig. 1: 6; Paragraph 24: fed from the counter 1 into analog data, and outputs the analog data];
generating, by the DAC, based on the first code, a first analog signal [e.g.,
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Paragraph 34: as digital data and converts it into analog data, according to which the variable current source 7 controls the level of the drive current];
generating, by the DAC, based on the second code, a second analog signal [e.g., Paragraph 24: fed from the counter 1 into analog data; Paragraph 35: returns to zero, causing the LED drive current level to be set at its minimum (zero)];
receiving, by a voltage controlled current source (VCCS) of the LED driver circuit, the first analog signal [e.g., Fig. 1: 7; Paragraph 25: The variable current source 7 generates a drive current whose level is based on the analog data fed from the DAC 6, and supplies the drive current to the LED];
receiving, by the VCCS, the second analog signal [e.g., Paragraph 25: The variable current source 7 generates a drive current whose level is based on the analog data fed from the DAC 6; Paragraph 35: in a case where the count "e" is four-bit digital data (0 to 15), when the enable signal "a" is pulsated eight times and then remains high, the LED drive current level is set at "level 8". If the LED drive current level is currently set at its maximum (at "level 15") and then the enable signal "a" is pulsated once more, the count "e" returns to zero, causing the LED drive current level to be set at its minimum (zero)];
driving, by the VCCS and a charge pump of the LED driver circuit, based on the first analog signal, an LED [e.g., Paragraph 33: the level of the drive current is controlled according to the number of pulses in the enable signal; Paragraph 35: the LED drive current level is set at] [e.g.,
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Paragraph 52: when a charge pump is provided in the light emission control device to generate the drive voltage of the LED, the clock signal of the oscillator 9 can be utilized as a clock signal for driving the charge pump]; and
driving by the VCCS and the charge pump, based on the second analog signal, the LED [e.g., Paragraph 35: causing the LED drive current level to be set at its minimum (zero); Paragraph 37: has been kept low for a period of 512 µs, it is recognized to have become disabled] (e.g., see Paragraphs 17-39, 40-53, 60, 64-67).
The method claim recites, in operating terms, the circuit of claim 1 together with the charge pump of claim 3; the mapping and interpretation set forth for claims 1 and 3 apply.
The activation inputs are the host-side events that produce the enabled and disabled states of the enable signal (Ezaki Paragraphs 5, 7, 30), and the LED is driven by the variable current source 7 together with the in-device charge pump that generates the LED drive voltage (Paragraph 52).
Alternatively (Ezaki in view of Lin; Ezaki in view of Liu):
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In the § 103 alternatives, the activation inputs are the user’s first and second operations of the on/off switch (Lin Paragraph 74; Liu Paragraph 57),
from which the switch (activation interface) generates the first and second activation signals [e.g., Lin, Fig. 4: 304, R3, R6; Paragraph 36: a power switch 304 coupled between the power source and the light source driving circuit; Paragraph 52: When the power switch 304 is turned off, the voltage at the terminal CLK drops to zero. Therefore, a switch monitoring signal indicating the operation of the power switch 304 can be detected at the terminal CLK] [e.g., Liu, Fig. 8: 98; Paragraph 41: Bridge rectifier 102 receives a source AC voltage from the AC line 101 through a wall switch 98 and provides a rectified DC voltage VDC], and
the controller (Lin’s trigger monitoring unit; Liu’s falling-edge detector) generates the first and second control signals; the counter, DAC and current-source steps and the charge pump are Ezaki’s, as applied to claims 1 and 3.
The motivation stated for claim 1 applies. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); Graham v. John Deere Co., 383 U.S. 1 (1966).
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Claim 15 (Ground A)
Regarding claim 15, this claim is rejected by the reasoning applied in rejecting claim 3.
Claim 15 recites the charge pump supplying a source voltage to the LED (Ezaki, Paragraph 52 -- the charge pump generating the drive voltage of the LED).
Claim 16 (Ground A)
Regarding claim 16, this claim is rejected by the reasoning applied in rejecting claim 4.
Claim 16 recites, for the method, the sink-current, non-linear current source of claim 4; the disclosure applied to claim 4 applies.
Claim 17 (Ground A)
Regarding claim 17, this claim is rejected by the reasoning applied in rejecting claim 5.
Claim 17 recites, for the method, the code and voltage-value limitations of claim 5 together with the control-then-adjust steps of claim 1; the disclosures applied to claims 1 and 5 apply.
Claim 19 (Ground A)
Regarding claim 19, this claim is rejected by the reasoning applied in rejecting claim 2.
Claim 19 recites, for the method, the timer of claim 2; the disclosure applied to claim 2 applies, including the Lin and Liu alternatives.
Claim 20 (Ground A)
Regarding claim 20, this claim is rejected by the reasoning applied in rejecting claim 6.
Claim 20 recites, for the method, the single-chip limitation of claim 6; the disclosure applied to claim 6 applies.
Claim Rejections - 35 USC § 103
Ground A (continued): Claims 12, 13 and 18 are rejected under 35 U.S.C. § 103 as being unpatentable over Ezaki in view of Lin as applied to claims 11 and 17 above;
or, in the alternative, over Ezaki in view of Liu as applied to claims 11 and 17 above.
Claim 12 (Ground A)
Regarding claim 12, Ezaki in view of Lin (or Liu) teaches: The system of claim 11, wherein the activation interface is a user interface, [e.g., Lin, Paragraph 74: an on/off switch mounted on the wall] [e.g., Liu, Fig. 8: 98; Paragraph 41: Bridge rectifier 102 receives a source AC voltage from the AC line 101 through a wall switch 98 and provides a rectified DC voltage VDC];
said activation interface configured to: receive a first user input including a selection of the first brightness value [e.g., Lin, Paragraph 74: users can adjust the light output of the light source through an operation (e.g., a turn-off operation) of a common on/off power switch; Paragraph 102: a user can control the power switch 304 to control the dimming of the LED light source 1412] [e.g., Liu, Paragraph 57: The dimming level is instructed by the number of wall switch toggles after the LED lamp is initially turned on];
generate the first activation signal including the first brightness value [e.g., Lin, Fig. 4: 304, R3, R6; Paragraph 36: a power switch 304 coupled between the power source and the light source driving circuit; Paragraph 52: When the power switch 304 is turned off, the voltage at the terminal CLK drops to zero. Therefore, a switch monitoring signal indicating the operation of the power switch 304 can be detected at the terminal CLK; Paragraph 52: the trigger monitoring unit 506 generates a driving signal when a turn-off operation is detected at the terminal CLK] ] [e.g.,
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Liu, Fig. 8: 98, 74(VTGL); Paragraph 45: If wall switch 98 is turned off for a moment, the switching of MOSFET 83 stops. Bias winding 93 no longer supplies power (i.e., bias AC voltage VB) to capacitor 75. The toggle voltage VTGL across capacitor 75 is discharged via resistor 77 to zero in less than 100 ms; Paragraph 53: After the first toggle, the counting value enters 01-state. Accordingly, the switching duty cycle of power MOSFET 83 is reduced to 50%];
receive a second user input including a selection of the second brightness value [e.g., Lin, Paragraph 85: the initial voltage of REF and the initial duty cycle of PWM1 can be determined by an initial counter value (e.g., zero) provided by the counter 1126; Paragraph 86: In order to adjust the light output of the LED string 312, the user can apply a first set of operations to the power switch 304] [e.g., Liu, Paragraph 53: After the first toggle, the counting value enters 01-state. Accordingly, the switching duty cycle of power MOSFET 83 is reduced to 50%. The second toggle makes the counting value to enter 10-state, corresponding to a switching duty cycle of 25%]; and
generate the second activation signal including the second brightness value [e.g., Lin, Paragraph 62: The D/A converter 528 can adjust the voltage of the reference signal REF from a first level to a second level in response to the change of the counter value. Therefore, the light output of the LED string 312 can be adjusted in accordance with the adjusted reference signal REF when the power switch 304 is turned on; Paragraph 58: the light output of the LED string 312 can be adjusted from a first level to a second level, then to a third level, then to a fourth level, and then back to the first level] [e.g., Liu, Paragraph 57: The dimming level is instructed by the number of wall switch toggles after the LED lamp is initially turned on].
Ezaki does not expressly disclose that the activation interface is a user interface receiving user inputs that select the brightness values.
Lin teaches that the interface is a common on/off switch operated by the user, each operation selecting the next dimming level (the first operation selects the first level, the second the second level), and that the switch monitoring signal produced by each operation is the activation signal carrying that selection [e.g., Lin, Paragraph 74: users can adjust the light output of the light source through an operation (e.g., a turn-off operation) of a common on/off power switch; Paragraph 102: a user can control the power switch 304 to control the dimming of the LED light source 1412] [e.g., Lin, Paragraph 62: The D/A converter 528 can adjust the voltage of the reference signal REF from a first level to a second level in response to the change of the counter value. Therefore, the light output of the LED string 312 can be adjusted in accordance with the adjusted reference signal REF when the power switch 304 is turned on; Paragraph 58: the light output of the LED string 312 can be adjusted from a first level to a second level, then to a third level, then to a fourth level, and then back to the first level].
Liu teaches the same with a regular wall switch whose number of toggles instructs the dimming level [e.g., Liu, Paragraph 57: The dimming level is instructed by the number of wall switch toggles after the LED lamp is initially turned on] [e.g., Liu, Paragraph 53: After the first toggle, the counting value enters 01-state. Accordingly, the switching duty cycle of power MOSFET 83 is reduced to 50%. The second toggle makes the counting value to enter 10-state, corresponding to a switching duty cycle of 25%].
Lin and Liu are analogous art for the reason given for claim 1, and the motivation given for claim 1 (dimming by an ordinary switch, without a dedicated adjusting-button apparatus or remote control) applies. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); Graham v. John Deere Co., 383 U.S. 1 (1966).
Claim 13 (Ground A)
Regarding claim 13, Lin (or Liu) further teaches: The system of claim 12, wherein the activation interface includes at least one of a push button, a touch sensor, and a switch [e.g., Lin, Paragraph 74: an on/off switch mounted on the wall] [e.g., Liu, Fig. 8: 98; Paragraph 41: Bridge rectifier 102 receives a source AC voltage from the AC line 101 through a wall switch 98 and provides a rectified DC voltage VDC].
The on/off switch mounted on the wall (Lin) and the wall switch 98 (Liu) are switches; the claim requires at least one of a push button, a touch sensor and a switch.
Claim 18 (Ground A)
Regarding claim 18, this claim is rejected by the reasoning applied in rejecting claim 12.
Claim 18 recites, for the method, the user-interface selection limitations of claim 12; the teachings of Lin and Liu applied to claim 12 apply, with the same motivation.
Ground B: Claims 1-20 are rejected under 35 U.S.C. § 103 as being unpatentable over Lin in view of Ezaki.
This ground is complementary to Ground A: it applies Lin, which expressly steps the LED light output between different levels in response to successive user operations by way of an on-chip counter and D/A converter, as the primary reference, and relies on Ezaki for the single-chip LED driver IC, the pulse-coded brightness value, the in-device charge pump and the timing detector.
Claim 1 (Ground B)
Regarding claim 1, Lin discloses: A light-emitting diode (LED) driver circuit for driving an LED and electrically connectable to an activation interface, said LED driver circuit comprising: [e.g., Fig. 4: 400, 312, 304; Paragraph 35: The light source driving circuit 400 includes a power converter 310 (shown in FIG. 3) coupled to a power source and coupled to an LED string 312 for receiving power from the power source and for providing a regulated power to the LED string 312] [e.g., Fig. 4: 304, R3, R6; Paragraph 36: a power switch 304 coupled between the power source and the light source driving circuit; Paragraph 52: When the power switch 304 is turned off, the voltage at the terminal CLK drops to zero. Therefore, a switch monitoring signal indicating the operation of the power switch 304 can be detected at the terminal CLK];
a controller electrically connectable to the activation interface, said controller configured to: receive a first activation signal from the activation interface, the first activation signal including a first brightness value [e.g., Fig. 5: 506 (inside 308); Paragraph 46: The dimming controller 308 includes a trigger monitoring unit 506, a dimmer 502 and a pulse signal generator 504; Paragraph 46: The trigger monitoring unit 506 can receive a switch monitoring signal indicating an operation of the external power switch 304 through the terminal CLK and can generate a driving signal for driving a counter 526 when an operation of the external power switch 304 is detected at the terminal CLK] [e.g., Paragraph 74: users can adjust the light output of the light source through an operation (e.g., a turn-off operation) of a common on/off power switch; Paragraph 102: a user can control the power switch 304 to control the dimming of the LED light source 1412];
receive a second activation signal from the activation interface, the second activation signal including a second brightness value different from the first brightness value [e.g., Paragraph 52: the trigger monitoring unit 506 generates a driving signal when a turn-off operation is detected at the terminal CLK] [e.g., Paragraph 62: The D/A converter 528 can adjust the voltage of the reference signal REF from a first level to a second level in response to the change of the counter value. Therefore, the light output of the LED string 312 can be adjusted in accordance with the adjusted reference signal REF when the power switch 304 is turned on; Paragraph 58: the light output of the LED string 312 can be adjusted from a first level to a second level, then to a third level, then to a fourth level, and then back to the first level];
generate a first control signal, the first control signal including the first brightness value [e.g., Paragraph 52: the trigger monitoring unit 506 generates a driving signal when a turn-off operation is detected at the terminal CLK];
and generate a second control signal, the second control signal including the second brightness value [e.g., Paragraph 52: the trigger monitoring unit 506 generates a driving signal when a turn-off operation is detected at the terminal CLK] [e.g., Paragraph 70: The counter 526 can be a 2-bit counter which has a maximum counter value of 3; Paragraph 58: if the counter 526 is a 2-bit counter, the counter value will increase from 0 to 1, 2, 3 and then return to zero after four turn-off operations have been detected];
a binary counter electrically connected to the controller, said binary counter configured to: receive the first control signal from the controller [e.g., Fig. 5: 526; Paragraph 54: the dimmer 502 includes a counter 526 coupled to the trigger monitoring unit 506 for counting operations of the power switch 304, a digital-to-analog converter (D/A converter) 528 coupled to the counter 526; Paragraph 54: The counter value of the counter 526 can be increased, e.g., by 1, in response to the driving signal];
generate a first code based on the first control signal [e.g., Fig. 5: 526; Paragraph 54: the dimmer 502 includes a counter 526 coupled to the trigger monitoring unit 506 for counting operations of the power switch 304, a digital-to-analog converter (D/A converter) 528 coupled to the counter 526; Paragraph 54: The counter value of the counter 526 can be increased, e.g., by 1, in response to the driving signal];
receive the second control signal from the controller [e.g., Fig. 5: 526; Paragraph 54: the dimmer 502 includes a counter 526 coupled to the trigger monitoring unit 506 for counting operations of the power switch 304, a digital-to-analog converter (D/A converter) 528 coupled to the counter 526; Paragraph 54: The counter value of the counter 526 can be increased, e.g., by 1, in response to the driving signal]; and
generate a second code based on the second control signal [e.g., Paragraph 70: The counter 526 can be a 2-bit counter which has a maximum counter value of 3; Paragraph 58: if the counter 526 is a 2-bit counter, the counter value will increase from 0 to 1, 2, 3 and then return to zero after four turn-off operations have been detected];
a digital-to-analog converter (DAC) electrically connected to the binary counter, said DAC configured to: receive the first code from the binary counter [e.g., Fig. 5: 528; Paragraph 54: The D/A converter 528 reads the counter value from the counter 526 and generates a dimming signal (e.g., control signal 538 or reference signal REF) based on the counter value];
generate a first analog signal based on the first code [e.g., Paragraph 57: if the counter value is 0, the D/A converter 528 adjusts the reference signal REF to have a voltage V4. If the counter value is increased to 1 when a turn-off operation of the power switch 304 is detected at the terminal CLK by the trigger monitoring unit 506, the D/A converter 528 adjusts the reference signal REF to have a voltage V5 that is less than V4];
receive the second code from the binary counter [e.g., Fig. 5: 528; Paragraph 54: The D/A converter 528 reads the counter value from the counter 526 and generates a dimming signal (e.g., control signal 538 or reference signal REF) based on the counter value]; and
generate a second analog signal based on the second code [e.g., Paragraph 57:
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if the counter value is 0, the D/A converter 528 adjusts the reference signal REF to have a voltage V4. If the counter value is increased to 1 when a turn-off operation of the power switch 304 is detected at the terminal CLK by the trigger monitoring unit 506, the D/A converter 528 adjusts the reference signal REF to have a voltage V5 that is less than V4]; and
a voltage controlled current source (VCCS) electrically connected to the DAC, said VCCS configured to: [e.g., Fig. 5: 534, 522, 524; Fig. 4: Q16, R5; Paragraph 56: The voltage of REF can determine a peak value of the LED current, which can in turn determine an average value of the LED current. As such, the light output of the LED string 312 can be adjusted by adjusting the reference signal REF; Paragraph 61: the reference signal REF determines a peak value of the LED current, which can in turn determine the light output of the LED string 312];
receive the first analog signal from the DAC [e.g., Fig. 5: 534, 522, 524; Fig. 4: Q16, R5; Paragraph 56: The voltage of REF can determine a peak value of the LED current, which can in turn determine an average value of the LED current. As such, the light output of the LED string 312 can be adjusted by adjusting the reference signal REF; Paragraph 61: the reference signal REF determines a peak value of the LED current, which can in turn determine the light output of the LED string 312];
control a brightness of the LED based on the first analog signal [e.g., Fig. 5: 534, 522, 524; Fig. 4: Q16, R5; Paragraph 56: The voltage of REF can determine a peak value of the LED current, which can in turn determine an average value of the LED current. As such, the light output of the LED string 312 can be adjusted by adjusting the reference signal REF; Paragraph 61: the reference signal REF determines a peak value of the LED current, which can in turn determine the light output of the LED string 312];
receive the second analog signal from the DAC [e.g., Paragraph 62: The D/A converter 528 can adjust the voltage of the reference signal REF from a first level to a second level in response to the change of the counter value. Therefore, the light output of the LED string 312 can be adjusted in accordance with the adjusted reference signal REF when the power switch 304 is turned on; Paragraph 58: the light output of the LED string 312 can be adjusted from a first level to a second level, then to a third level, then to a fourth level, and then back to the first level]; and
adjust the brightness of the LED based on the second analog signal [e.g., Paragraph 62: The D/A converter 528 can adjust the voltage of the reference signal REF from a first level to a second level in response to the change of the counter value. Therefore, the light output of the LED string 312 can be adjusted in accordance with the adjusted reference signal REF when the power switch 304 is turned on; Paragraph 58: the light output of the LED string 312 can be adjusted from a first level to a second level, then to a third level, then to a fourth level, and then back to the first level] (e.g., see Paragraphs 34-74, 85-88, 99-102).
The activation interface is Lin’s power switch 304 with its sense network (R3, R6, C12), the activation signals are the switch monitoring signals produced at the terminal CLK by the user’s first and second operations, the controller is the trigger monitoring unit 506, the control signals are its driving signals, the binary counter is the counter 526 (a 2-bit counter), the codes are its successive counter values, the DAC is the D/A converter 528, the analog signals are the reference voltages V4 and V5, and the voltage controlled current source is the current-regulation loop (comparator 534, flip-flop 522, AND gate 524, control switch Q16) that regulates the LED current to the level set by the reference voltage.
Each successive operation carries a different brightness value in the sense set forth in Ground A: the first operation selects the first level and the second operation selects the second, different level, and the light output is controlled at the first level and then adjusted to the second.
Lin does not expressly disclose
(i) that the control signal itself encodes the brightness level as a value rather than as a step command,
(ii) that the controller, counter, DAC and current source are built as a single integrated circuit chip, or
(iii) a charge pump supplying the LED drive voltage from a battery supply.
Ezaki teaches
(i) a control signal whose pulse count is the brightness level, counted by the driver’s counter and converted by its DAC to set the drive current [e.g., Ezaki, Paragraph 34: turns high, and the DAC 6 receives the count; Paragraph 34: as digital data and converts it into analog data, according to which the variable current source 7 controls the level of the drive current] [e.g., Ezaki, Figs. 1, 2: e; Paragraph 19: to count the number of pulses in it, and outputs the count as digital data; Paragraph 35: is four-bit digital data (0 to 15), when the enable signal; Paragraph 35: is pulsated eight times and then remains high, the LED drive current level is set at];
(ii) building the counter, DAC, current source and control logic as a single LED driver IC [e.g., Ezaki, Paragraph 18: built as a semiconductor integrated circuit device (a so-called LED driver IC); Paragraph 39: This helps reduce the number of external terminals, contributing to a reduced size and cost of the light emission control device]; and
(iii) a charge pump within the device generating the LED drive voltage, with battery operation [e.g., Ezaki, Paragraph 52: when a charge pump is provided in the light emission control device to generate the drive voltage of the LED, the clock signal of the oscillator 9 can be utilized as a clock signal for driving the charge pump] [e.g., Ezaki, Fig. 2: power supply voltage; Paragraph 22: high when the power supply voltage to the light emission control device has reached a predetermined voltage level; Paragraph 60: longer life of batteries used in mobile appliances can be achieved].
Lin and Ezaki are analogous art for the reason given in Ground A.
It would have been obvious to implement Lin’s dimming controller and current-regulating stage as a single LED driver IC of the kind Ezaki describes, with Ezaki’s pulse-coded level setting and in-device charge pump, because Ezaki states that such integration reduces the number of external terminals and the size and cost of the device [e.g., Ezaki, Paragraph 18: built as a semiconductor integrated circuit device (a so-called LED driver IC); Paragraph 39: This helps reduce the number of external terminals, contributing to a reduced size and cost of the light emission control device],
Lin itself teaches integrating the current-regulating switch and energy storage into its controller [e.g., Lin, Fig. 4: 308 (terminals HV_GATE, SEL, CLK, RT, VDD, CTRL, MON, GND); Paragraph 37: terminals of the dimming controller 308 can include HV_GATE, SEL, CLK, RT, VDD, CTRL, MON and GND; Paragraph 35: In another embodiment, the control switch Q16 can be integrated in the dimming controller 308], and
Ezaki’s charge pump supplies the LED drive voltage from a low-voltage (battery) supply while reusing the device’s oscillator clock (Paragraphs 52, 60). KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); Graham v. John Deere Co., 383 U.S. 1 (1966).
Claim 2 (Ground B)
Regarding claim 2, Lin’s start-up and under-voltage-lockout circuit 508 deactivates the current-regulation path and then the counter and D/A converter after time periods fixed by the design [e.g., Lin, Fig. 5: 508; Fig. 4: CIO; Paragraph 47: When the power switch 304 is turned off, the start-up and under voltage lockout circuit 508 is operable for turning off other components of the dimming controller 308 except the trigger monitoring unit 506 and the dimmer 502 when the voltage at the terminal VDD is less than a second predetermined voltage, in order to save energy. The start up and under voltage lockout circuit 508 is further operable for turning off the trigger monitoring unit 506 and the dimmer 502 when the voltage at the terminal VDD is less than a third predetermined voltage; Paragraph 47: the trigger monitoring unit 506 and the dimmer 502 can still operate for a time period after the power switch 304 is turned off];
Ezaki’s low-level period detector 2 resets the counter, DAC output and drive current after its predetermined 512 µs period [e.g., Ezaki, Fig. 1: 2, 3; Paragraph 20: has been kept low (disabled) for a predetermined period (in this embodiment, 512 µs); otherwise, the low-level period detector 2 keeps the logic level of its output signal; Paragraph 27: The clock signal generated by the oscillator 9 is fed to the low-level period detector 2, which uses the clock signal to detect whether or not the enable signal] [e.g., Ezaki, Paragraph 37: of the on/off controller 3 is reset to low, causing the UVLO section 4 to stop operating; moreover, the number of pulses counted by the counter 1 and the detection state of the low-level period detector 2 are initialized; Paragraph 19: becomes low, the counter 1 initializes the number of pulses (resets to zero)].
Either satisfies the claimed timer, for the energy-saving reason Lin gives (Paragraph 47).
Claim 3 (Ground B)
Regarding claim 3, Lin’s AC/DC converter 306 supplies the dimming controller and regulating stage [e.g., Lin, Fig. 4: 306, C9; Paragraph 36: an AC/DC converter 306 for converting an AC input voltage VIN to a DC output voltage VOUT];
Ezaki’s in-device charge pump supplies the LED drive (source) voltage [e.g., Ezaki, Paragraph 52: when a charge pump is provided in the light emission control device to generate the drive voltage of the LED, the clock signal of the oscillator 9 can be utilized as a clock signal for driving the charge pump], as applied to claim 1 of this ground.
Claim 4 (Ground B)
Regarding claim 4, Lin’s control switch Q16 sinks the LED current to ground through R5 and regulates it by switching the buck inductor stage -- a non-linear (switch-mode) current source [e.g., Lin, Fig. 4: Q27, Q16, R5; Paragraph 41: The control switch Q16 is coupled in series with the LED string 312 and the switch Q27, and is coupled to ground through the current sensing resistor R5; Paragraph 41: the dimming controller 308 can adjust the LED current flowing through the LED string 312 to ground by controlling the control switch Q16] [e.g., Lin, Paragraph 35: the power converter 310 can be a buck converter including an inductor L1, a diode D4 and a control switch Q16; Paragraph 61: The LED current gradually increases because the inductor resists a sudden change of the LED current];
Ezaki’s current source 7 likewise sits in the LED return path [e.g., Ezaki, Fig. 1: 7, 8, LED (current path); Paragraph 26: the switch 8 is serially connected in the current path connecting the variable current source 7 to the LED].
Claim 5 (Ground B)
Regarding claim 5, Lin’s counter value is the level in coded form (2-bit count) and the D/A converter generates a reference voltage representative of it (V4 for count 0; V5 for count 1) [e.g., Paragraph 70: The counter 526 can be a 2-bit counter which has a maximum counter value of 3; Paragraph 58: if the counter 526 is a 2-bit counter, the counter value will increase from 0 to 1, 2, 3 and then return to zero after four turn-off operations have been detected] [e.g., Paragraph 57: if the counter value is 0, the D/A converter 528 adjusts the reference signal REF to have a voltage V4. If the counter value is increased to 1 when a turn-off operation of the power switch 304 is detected at the terminal CLK by the trigger monitoring unit 506, the D/A converter 528 adjusts the reference signal REF to have a voltage V5 that is less than V4].
Claim 6 (Ground B)
Regarding claim 6,
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Ezaki teaches the single LED driver IC [e.g., Paragraph 18: built as a semiconductor integrated circuit device (a so-called LED driver IC); Paragraph 39: This helps reduce the number of external terminals, contributing to a reduced size and cost of the light emission control device], applied as set forth for claim 1 of this ground.
Claim 7 (Ground B)
Regarding claim 7, this claim recites the system with the LED (Lin’s LED string 312), the activation interface (Lin’s switch 304) and an integrated circuit containing the controller, counter, DAC and VCCS;
Lin’s pin-defined dimming controller 308 contains the trigger monitoring unit, counter and D/A converter and, in the integrated embodiment, the control switch [e.g., Lin, Fig. 4: 308 (terminals HV_GATE, SEL, CLK, RT, VDD, CTRL, MON, GND); Paragraph 37: terminals of the dimming controller 308 can include HV_GATE, SEL, CLK, RT, VDD, CTRL, MON and GND; Paragraph 35: In another embodiment, the control switch Q16 can be integrated in the dimming controller 308], and
Ezaki teaches building the whole driver as one IC [e.g., Ezaki, Paragraph 18: built as a semiconductor integrated circuit device (a so-called LED driver IC); Paragraph 39: This helps reduce the number of external terminals, contributing to a reduced size and cost of the light emission control device], as applied to claim 1 of this ground.
Claim 8 (Ground B)
Regarding claim 8, this claim is rejected by the reasoning applied in rejecting claim 2 of this ground.
Claim 9 (Ground B)
Regarding claim 9, this claim is rejected by the reasoning applied in rejecting claim 3 of this ground.
Claim 10 (Ground B)
Regarding claim 10, this claim is rejected by the reasoning applied in rejecting claim 4 of this ground.
Claim 11 (Ground B)
Regarding claim 11, this claim is rejected by the reasoning applied in rejecting claim 5 of this ground.
Claim 12 (Ground B)
Regarding claim 12, Lin’s interface is a user-operated on/off switch, each operation selecting the next level [e.g., Paragraph 74: users can adjust the light output of the light source through an operation (e.g., a turn-off operation) of a common on/off power switch; Paragraph 102: a user can control the power switch 304 to control the dimming of the LED light source 1412] [e.g., Paragraph 62: The D/A converter 528 can adjust the voltage of the reference signal REF from a first level to a second level in response to the change of the counter value. Therefore, the light output of the LED string 312 can be adjusted in accordance with the adjusted reference signal REF when the power switch 304 is turned on; Paragraph 58: the light output of the LED string 312 can be adjusted from a first level to a second level, then to a third level, then to a fourth level, and then back to the first level] [e.g., Paragraph 85: the initial voltage of REF and the initial duty cycle of PWMI can be determined by an initial counter value (e.g., zero) provided by the counter 1126; Paragraph 86: In order to adjust the light output of the LED string 312, the user can apply a first set of operations to the power switch 304].
Claim 13 (Ground B)
Regarding claim 13, Lin’s on/off switch mounted on the wall is a switch [e.g., Paragraph 74: an on/off switch mounted on the wall].
Claim 14 (Ground B)
Regarding claim 14, this claim recites the method of operating the circuit of claim 1 with the charge pump of claim 3; Lin’s operations (first and second switch operations producing the activation signals; trigger unit; counter; D/A; regulated LED current adjusted from a first to a second level) and Ezaki’s charge pump apply as set forth for claims 1 and 3 of this ground.
Claim 15 (Ground B)
Regarding claim 15, this claim is rejected by the reasoning applied in rejecting claim 3 of this ground.
Claim 16 (Ground B)
Regarding claim 16, this claim is rejected by the reasoning applied in rejecting claim 4 of this ground.
Claim 17 (Ground B)
Regarding claim 17, this claim is rejected by the reasoning applied in rejecting claim 5 of this ground.
Claim 18 (Ground B)
Regarding claim 18, this claim is rejected by the reasoning applied in rejecting claim 12 of this ground.
Claim 19 (Ground B)
Regarding claim 19, this claim is rejected by the reasoning applied in rejecting claim 2 of this ground.
Claim 20 (Ground B)
Regarding claim 20, this claim is rejected by the reasoning applied in rejecting claim 6 of this ground.
Response to Arguments
Applicant’s arguments filed 3 August 2026 (entered with the RCE of 1 September 2026) have been fully considered.
To the extent they are directed to the amended limitations -- that a binary enabled/disabled signal cannot provide a first brightness value and a second, different brightness value or adjust the brightness from one level to another -- they are addressed by the new grounds of rejection over Lin and Liu, each of which expressly adjusts the LED light output from a first level to a second, different level in response to successive user operations counted by an on-chip counter and converted by a DAC.
As to the § 102 branch of Ground A, the Office respectfully disagrees that the mapping identifies only one brightness value: the instant specification defines the brightness value by its function (Instant Specification Paragraph 19), and Ezaki’s control signal c commands, in its two states, emission at the counted drive-current level and emission at the minimum (zero) level, the counter and DAC producing a different code and a different analog level for each; adjusting the LED from the counted level to the zero level is adjusting its brightness.
The arguments directed to the dependent claims rely on the arguments for the independent claims and are answered above; no argument is presented as to any dependent-claim limitation separately.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Kuroki et al. (US 2011/0309769 A1) discloses an LED power unit in which a counter counts the number of operations of a switch button transmitted as wireless pulses and a decoder or D/A converter sets the LED drive current level from the counted value (Paragraphs 46-48, 88, 101), with a timer measuring the interval between operations (Paragraphs 65-67).
Hsiao et al. (US 2012/0098447 A1) discloses adjusting the brightness of a light source according to the number and manner of state changes of an ordinary toggle
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switch, without a dedicated dimmer switch (Paragraphs 14, 27, 41).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jeff Piziali whose telephone number is (571)272-7678. The examiner can normally be reached Monday - Friday (7:30AM - 4PM).
The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Jeff Piziali/
Primary Examiner, Art Unit 2628
2 September 2026
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