Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4, 5, 7-9, 12, 13, 15-17, & 20 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. PG Pub US 2023/0064693 A1 [hereinafter Wang] in view of Kanno PG Pub US 2017/0262228 A1 [hereinafter Kanno].
Regarding claims 1, 9, & 17, Wang discloses:
receiving, from an application, a memory allocation request, the memory allocation request comprising: a number of blocks, and a first address (receiving, by the processor, a virtual address entry allocation request; based on a sequential allocation index of the VAT including a virtual address in a valid virtual address range [0090]);
determining that memory at the first address is allocated (When a VA entry 340 is allocated for use as described herein, the allocation flag 350 is set to′1′ or otherwise set to indicate that the VA entry 340 is allocated [0046]);
identifying a second address, differing from the first address by less than a first threshold (a sequential allocation index 344 of a new VAT 330 includes the smallest virtual address 348 of four VA entries 340 of [1, 2, 3, 4], which is 1. The VAT 330 has a valid virtual address range of 1 to 4. When a VA entry 340 is allocated, the VAT 330 selects the virtual address in the sequential allocation index 344 (e.g., the ‘1’ value) and allocates the associated VA entry 340 for use. That sequential allocation index 344 is changed to next available virtual address which is 2 [0042]); and
allocating the number of blocks of memory at the second address (When the next request for allocation of a VA entry 340 is received or obtained, the VAT 330 allocates the VA entry 340 associated with virtual address 348 ‘2’ and sequential allocation index is changed to 3 [0042]).
It is noted that Wang failed to explicitly disclose:
a number of blocks, the number of blocks being a size of a requested allocation, in blocks.
However, Kanno discloses:
a number of blocks, the number of blocks being a size of a requested allocation, in blocks (When the controller 4 receives, from the host 2, a namespace allocate command including NSID#1, the controller 4 secures, for the namespace of NSID#1, a plurality of blocks whose the number is designated by the namespace allocate command [0593]).
The systems of Wang and Kann0 are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of “memory control.”
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the systems of Wang and Kanno since this would enable the system of Wang to specify how many blocks are being allocated in the address range. This system would improve the host’s ability to control the memory [0005].
Regarding claims 4 ,12, & 20, the limitations of these claims have been noted in the rejection of claims 1, 9, & 17. Wang also discloses:
wherein the determining that memory at the first address is allocated comprises searching a data structure for an entry indexed by the first address (While the sequential allocation index 344 includes at least one virtual address 348, it is used to determine the next VA entry 340 to be allocated when a request for a VA entry allocation is received or obtained [0040]).
Regarding claims 5 & 13, the limitations of these claims have been noted in the rejection of claims 1 & 9. Wang also discloses:
wherein the determining that memory at the first address is allocated comprises searching a data structure for an entry indexed by the first address, the data structure being configured to be searched in logarithmic time (the metadata tree index 228 is configured and managed as a B-tree, such that searches, sequential access, insertions, and deletions can be performed in logarithmic time (e.g., O (log n)) [0030]).
Regarding claims 7 & 15, the limitations of these claims have been noted in the rejection of claims 1 & 9. Wang also discloses:
wherein: the determining that memory at the first address is allocated comprises searching a first data structure for an entry indexed by the first address (When a VA entry 340 is allocated for use as described herein, the allocation flag 350 is set to′1′ or otherwise set to indicate that the VA entry 340 is allocated [0046]] and While the sequential allocation index 344 includes at least one virtual address 348, it is used to determine the next VA entry 340 to be allocated when a request for a VA entry allocation is received or obtained [0040]); and
the identifying of the second address comprises searching a second data structure for an entry indexed by the number of blocks (After the sequential allocation index 344 reaches beyond its largest possible value, the free entry list 346 is used. In some examples, the free entry list 346 is configured and managed as VA entries 340 that have been allocated become free. The free entry list 346 is configured to operate as a singly linked list, stack, or other similar structure [0043]).
Regarding claims 8 & 16, the limitations of these claims have been noted in the rejection of claims 1 & 9. Wang also discloses:
wherein: the determining that memory at the first address is allocated comprises searching a first data structure for an entry indexed by the first address (While the sequential allocation index 344 includes at least one virtual address 348, it is used to determine the next VA entry 340 to be allocated when a request for a VA entry allocation is received or obtained [0040]);
the identifying of the second address comprises searching a second data structure for an entry indexed by the number of blocks (this is the head of the list; when a VA entry 340 is allocated from the free entry list 346, the head entry in the list is used. If the current head entry in the list 346 has a reference to a next entry, that next entry is then set as the new head entry of the list 346 [0044]); and
the second data structure stores, at an indexed node, one or more addresses of free regions of memory (After the sequential allocation index 344 reaches beyond its largest possible value, the free entry list 346 is used. In some examples, the free entry list 346 is configured and managed as VA entries 340 that have been allocated become free. The free entry list 346 is configured to operate as a singly linked list, stack, or other similar structure [0043]).
Allowable Subject Matter
Claims 2, 3, 6, 10, 11, 14, 18, & 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The limitation of calculating the first threshold based on an address and on an input-output size limit of the storage device in claims 2, 3, 6, 10, 11, 14, 18, & 19 changes the interpretation of “a threshold” the independent claims.
The prior art of record fails to disclose these limitations.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/SEAN D ROSSITER/ Primary Examiner, Art Unit 2133
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