DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ochiai (US9707913B1).
Regarding to Claim 1, Ochiai teaches a control unit for a control system of a vehicle, comprising:
a first interface (Fig. 1, Part 110);
a second interface (Fig. 1, the combination of the Part 112 and Part 116); and
a data processing circuit configured to:
control the first interface and the second interface (Col. 3, Line 41-Col. 4, Line 60),
transmit a verification signal, wherein the verification signal is indicative of a verification parameter (Fig. 4, Col. 3, Line 41-Col. 4, Line 60, Col. 8, Line 25-Col. 9, Line 61, especially Steps 406 and 416, based on the teachings of the Paragraphs and drawings, the examiner considered the processing circuit would receive a parameter from Part 112, and send a signal to Part 110, which would reflect the limitations under the broadest reasonable interpretation), and
receive the verification parameter, wherein the verification signal is transmitted via the first interface and the verification parameter is received via the second interface (Fig. 4, Col. 3, Line 41-Col. 4, Line 60, Col. 8, Line 25-Col. 9, Line 61, especially Steps 406 and 416, based on the teachings of the Paragraphs and drawings, the examiner considered the processing circuit would receive a parameter from Part 112, and send a signal to Part 110, which would reflect the limitations under the broadest reasonable interpretation).
Regarding to Claim 2, Ochiai teaches the control unit, wherein the data processing circuit is configured to deactivate a part of the control system if the verification parameter is not received via the second interface within a predefined time after transmission (Fig. 4, based on the teachings, it would be known if in Step 406 not receive any signal, the process would not advance to Step 416, which would reflect the limitations under the broadest reasonable interpretation).
Regarding to Claim 3, Ochiai teaches the control unit, wherein the first interface and the second interface are comprised by an interface module,
wherein the control unit comprises a further interface module comprising a further interface (Fig. 1, the combination of Part 114 and Part 118 can be considered as a further interface, Col. 3, Line 41-Col. 4, Line 60),
wherein the data processing circuit is configured to:
transmit a further verification signal indicative of a further verification parameter via the further interface (Fig. 4, Col. 3, Line 41-Col. 4, Line 60, Col. 8, Line 25-Col. 9, Line 61, especially Steps 406 and 416, based on the teachings of the Paragraphs and drawings, the examiner considered the processing circuit would receive a parameter from Part 114, and send a signal to Part 110, which would reflect the limitations under the broadest reasonable interpretation), and
receive the further verification parameter via the interface module (Fig. 4, Col. 3, Line 41-Col. 4, Line 60, Col. 8, Line 25-Col. 9, Line 61, especially Steps 406 and 416, based on the teachings of the Paragraphs and drawings, the examiner considered the processing circuit would receive a parameter from Part 114, and send a signal to Part 110, which would reflect the limitations under the broadest reasonable interpretation).
Regarding to Claim 4, Ochiai teaches the control unit, wherein the further verification parameter is received via the second interface or a third interface (Fig. 1, the combination of Part 114 and Part 118 can be considered as a third interface, Col. 3, Line 41-Col. 4, Line 60, Fig. 4 would teach the operation).
Regarding to Claim 5, Ochiai teaches the control unit, wherein only a part of the control system that correlates to the verification parameter or the further verification parameter is deactivated if the verification parameter or the further verification parameter is not received via the interface module within a predefined time after transmission (Fig. 4, based on the teachings, it would be known if in Step 406 not receive any signal, the process would not advance to Step 416, which would reflect the limitations under the broadest reasonable interpretation).
Regarding to Claim 6, Ochiai teaches the control unit, wherein the data processing circuit is configured to enable data transfer of sensor data via the interface module only after reception of the verification parameter (Fig. 4, based on the teachings, it would be known if in Step 406 not receive any signal, the process would not advance to Step 416, which would reflect the limitations under the broadest reasonable interpretation).
Regarding to Claim 7, Ochiai teaches a steering actuator for a vehicle, comprising the control unit as claimed in claim 1 (Fig. 1, Part 102, Col. 3, Line 41-Col. 4, Line 60).
Regarding to Claim 8, Ochiai teaches a vehicle, comprising the control unit as claimed in claim 1 (Abstract, Col. 3, Line 41-Col. 4, Line 60).
Regarding to Claim 9, Ochiai teaches a method for securely transmitting and receiving data via a control unit for a control system of a vehicle, comprising:
transmitting a verification signal via a first interface, the verification signal being indicative of a verification parameter (Fig. 1, Part 110 can be considered as a first interface, and the combination of Part 112 and Part 116 can be considered as a second interface. Fig. 4, Col. 3, Line 41-Col. 4, Line 60, Col. 8, Line 25-Col. 9, Line 61, especially Steps 406 and 416, based on the teachings of the Paragraphs and drawings, the examiner considered the processing circuit would receive a parameter from Part 112, and send a signal to Part 110, which would reflect the limitations under the broadest reasonable interpretation); and
receiving the verification parameter via a second interface (Fig. 4, Col. 3, Line 41-Col. 4, Line 60, Col. 8, Line 25-Col. 9, Line 61, especially Steps 406 and 416, based on the teachings of the Paragraphs and drawings, the examiner considered the processing circuit would receive a parameter from Part 112, and send a signal to Part 110, which would reflect the limitations under the broadest reasonable interpretation).
Regarding to Claim 10, Ochiai teaches a non-transitory computer-readable medium having processor-executable instructions stored thereon, wherein the processor-executable instructions, when executed by one or more processors, facilitate performance of the method of claim 9 (Col. 3, Line 41-Col. 4, Line 60).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lee (US2020/0192587 A1) teaches a vehicle control system.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YI-KAI WANG whose telephone number is (313)446-6613. The examiner can normally be reached Flexible.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lindsay Low can be reached at 5712721196. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/YI-KAI WANG/ Primary Examiner, Art Unit 3747