Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Response to Arguments
Applicant's amendments filed 7/7/2026 have been fully considered but they are not persuasive. Applicant amended claim 16 and 30 to recite “one electronic bypass fuse having a single common output from which the bypass current path branches to each of the at least two component outputs”. Lang does not teach the electronic fuse EF1 as having a single common output. However, an electronic fuse is a switching element and the semiconductor switch T inside of EF1 is the switching element. Therefore, Lang teaches a common single output at the drain of semiconductor switch T.
Applicant's arguments filed 7/7/2026 have been fully considered but they are not persuasive. Applicant respectfully argues “The concept of sizing the entire bypass current path’s current-carrying capacity to be at least equal to the maximum rate current of the largest connected load (i.e., ensuring the bypass path can handle any load regardless of which channel trips) is not disclosed by Lang because Lang’s selective diode architecture inherently limits which load draws current through the standby channel depending on which channel trips.” Lang teaches ([Col. 5, Ln. 21-28]) the standby channel EK1 as operating as a redundant channel for the path through F1, F2, F3, Fn. The semiconductor switch T, electronic bypass fuse, must be sized to the largest channel to function properly for safety and achieve redundancy. The diodes D1, D2, D3 are oriented in order to protect the circuit from reverse currents, such as an inductive load.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 16-17, 20, 23, 25, 27, and 29-30 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lang, US10951022 (hereinafter referred to as Lang).
In regards to claim 16, Lang teaches a power distributor (current distributor; [Title]) comprising: a supply input (voltage source 5; [Fig. 1]) electrically connected (implicit; [Fig. 1]) to a plurality of component outputs (loads L1-Ln; [Fig. 1]) via respective component power branches (lines W1-Wn; [Fig. 1]), wherein each of the component power branches comprises at least one component fuse element (fuses F1-Fn; [Fig. 1]); and at least one bypass current path (line EK1; [Fig. 1]) that is routed from a supply input to at least two of the component outputs (routed to loads L1-Ln; [Fig. 1]), and which comprises at least one electronic bypass fuse (semiconductor switch T; [Fig. 2]) (Examiner’s Note: The semiconductor is the switching element that is the core of the electronic fuse EF1. Therefore, the electronic bypass fuse can be taught as just the semiconductor switch T.) having a single common output (T-Drain; [Fig. 2]) from which the bypass current path branches (3 current path branches are shown in Fig. 2) to each of the at least two component outputs (implicit; [Fig. 2]).
In regards to claim 17, Lang teaches wherein the at least one electronic bypass fuse comprises exactly one electronic fuse (only semiconductor switch T; [Fig. 1]).
In regards to claim 20, Lang teaches wherein the at least one component fuse element of at least one component power branch comprises at least one electronic fuse and/or at least one fusible link (fuses F1-Fn; [Fig. 1]).
In regards to claim 23, Lang teaches wherein exactly one bypass current path is provided (line EK1; [Fig. 1]).
In regards to claim 25, Lang teaches wherein the supply input connected to the component power branches corresponds to the supply input of the at least one bypass current path (implicit that both paths use the voltage source 5; [Fig. 1]).
In regards to claim 27, Lang teaches a power distribution system comprising: the power distributor according to claim 16; and a trip logic circuit (control unit 10; [Fig. 1]) configured to at least actuate (switches; [Col. 4, Ln. 63-67]) the at least one electronic bypass fuse.
In regards to claim 29, Lang teaches a vehicle (vehicle; [Title]) comprising: the power distributor according to claim 16.
In regards to claim 30, Lang teaches a method for operating a power distribution system (current distributor; [Title]), wherein the power distribution system comprises: a power distributor (current distributor; [Title]) comprising: a supply input (voltage source 5; [Fig. 1]) electrically connected (implicit; [Fig. 1]) to a plurality of component outputs (loads L1-Ln; [Fig. 1]) via respective component power branches (lines W1-Wn; [Fig. 1]), wherein each of the component power branches comprises at least one component fuse element (fuses F1-Fn; [Fig. 2]); and at least one bypass current path (line EK1; [Fig. 1]) that is routed from a supply input to at least two of the component outputs (routed to loads L1-Ln; [Fig. 1]), and which comprises at least one electronic bypass fuse (semiconductor switch T; [Fig. 1]) having a single common output (T-Drain; [Fig. 2]) from which the bypass current path branches (Three branches are shown in Fig. 2.) to each of the at least two component outputs (implicit; [Fig. 2]), a trip logic circuit (control unit 10; [Fig. 1]) configured to at least actuate (switches; [Col. 4, Ln. 63-67]) the at least one electronic bypass fuse, wherein the method comprises: detecting a fault (fault is present; [Col. 6, Ln. 35-38]), a malfunction, and/or a tripping of at least one component fuse element; and actuating (replaces the function; [Col. 6, Ln. 52-55]), on a basis of the detecting, at least one electronic bypass fuse to switch to a conducting state (carries the current; [Col. 6, Ln. 52-55]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lang, US10951022 (hereinafter referred to as Lang).
In regards to claim 22, Lang discloses the invention except wherein a current-carrying capacity of the at least one bypass current path is of at least equal magnitude to a maximum rated current of a largest load which is connected to the component power branches. It would have been obvious to one having ordinary skill in the art at the time of the invention was made to size the bypass electronic fuse to handle at least the maximum rated current of the largest load, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Claim(s) 18-19 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lang, US10951022 (hereinafter referred to as Lang) and in view of Draese et al., US12179679 (hereinafter referred to as Draese).
In regards to claim 18, Lang does not teach wherein the at least one electronic bypass fuse comprises at least two electronic fuses.
Draese teaches wherein the at least one electronic bypass fuse comprises at least two electronic fuses (two switches within the switching means 54; [Fig. 1]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lang in order to incorporate wherein the at least one electronic bypass fuse comprises at least two electronic fuses as taught by Draese. The motivation for doing so would be an engineering design choice to apply a known method of two electronic fuses for robust protection.
In regards to claim 19, Lang does not teach wherein at least two electronic bypass fuses are electrically arranged in series in the at least one bypass current path.
Draese teaches wherein at least two electronic bypass fuses are electrically arranged in series (implicit of the two switches within the switching means 54; [Fig. 1]) in the at least one bypass current path.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lang in order to incorporate wherein at least two electronic bypass fuses are electrically arranged in series in the at least one bypass current path as taught by Draese. The motivation for doing so would be an engineering design choice to apply a known method of two electronic fuses for robust protection.
In regards to claim 21, Lang does not teach wherein the at least one component fuse element of at least one component power branch comprises a plurality of series-connected component fuse elements.
Draese teaches wherein the at least one component fuse element of at least one component power branch comprises a plurality of series-connected component fuse elements (2 switches, electronic fuses, in series in switching means 34 and 44; [Fig. 1]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lang in order to incorporate wherein the at least one component fuse element of at least one component power branch comprises a plurality of series-connected component fuse elements as taught by Draese. The motivation for doing so would be an engineering design choice to apply a known method of two electronic fuses for robust protection.
Claim(s) 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lang, US10951022 (hereinafter referred to as Lang) and in view of Bang et al., US20200156570 (hereinafter referred to as Bang).
In regards to claim 24, Lang does not teach wherein a plurality of bypass current paths are provided.
Bang teaches wherein a plurality of bypass current paths are provided (two paths SL_1 and SL_2; [Fig. 2]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lang in order to incorporate wherein a plurality of bypass current paths are provided as taught by Bang. The motivation for doing so would be engineering design choice for redundancy on the bypass path.
Claim(s) 26 & 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lang, US10951022 (hereinafter referred to as Lang) and in view of Kwon et al., US20200062199 (hereinafter referred to as Kwon).
In regards to claim 26, Lang does not teach wherein the supply input connected to the component power branches is a supply input that differs from the supply input of the at least one bypass current path.
Kwon teaches wherein the supply input connected to the component power branches (main power supply unit 200; [Fig. 1]) is a supply input that differs from the supply input of the at least one bypass current path (auxiliary power supply unit 300; [Fig. 1]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lang in order to incorporate wherein the supply input connected to the component power branches is a supply input that differs from the supply input of the at least one bypass current path as taught by Kwon. The motivation for doing so would be an engineering design choice for redundancy in the power supplies as well as the power paths.
In regards to claim 28, Lang teaches wherein: the trip logic circuit is connected to the at least one electronic bypass fuse via a data connection (x1 gate driver signal connected to semiconductor switch T; [Fig. 1]), and is configured to receive (monitors; [Col. 5, Ln. 23-28]) corresponding measured values (current iT; [Col. 5, Ln. 23-28]) from the at least one electronic bypass fuse, and actuate the at least one electronic bypass fuse (switches a semiconductor switch T; [Col. 4, Ln. 63-67]) on a basis of measured values received (forms a redundant current path; [Col. 4, Ln. 63-67]).
Lang does not teach wherein: the at least one electronic fuse of the component power branches is configured to measure a voltage, a voltage differential, a current, and/or a temperature.
Kwon teaches wherein: the at least one electronic fuse (main electronic fuse 400; [0039]) of the component power branches is configured to measure a voltage, a voltage differential, a current (current-sensing unit 410; [0039]), and/or a temperature (temperature-sensing unit 420; [0039]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lang in order to incorporate wherein: the at least one electronic fuse of the component power branches is configured to measure a voltage, a voltage differential, a current, and/or a temperature. The motivation for substituting the fuse taught by Lang with the electronic fuse taught by Kwon would be to reduce the cost of replacing fuses with a fuse that is resettable.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMANTHA L FAUBERT whose telephone number is (703)756-1311. The examiner can normally be reached Monday - Friday 8AM - 5PM.
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SAMANTHA LYNETTE FAUBERT
Examiner
Art Unit 2836
/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
Prosecution Insights