DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Preliminary amendment
The amendment to the specification 07/31/2024 has been acknowledged by the examiner.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: accumulation unit configured to; a transfer unit configured to -- in claims [1 and 18] .
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
Review of the specification shows:
Accumulation unit to be the structure FD1 or FD2 (floating diffusion node) as depicted in fig. 3 and described in the text of paragraph [0058].
Transfer unit to be the structure TGL as depicted in fig. 5 and described in the text of paragraph [0106].
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) [1-7, 9-13, 15 and 20] is/are rejected under 35 U.S.C. 102 (a1) as being anticipated by Johnson (US 2021/0289154).
.
Reclaim[1] Johnson discloses an imaging device (see fig. 7) comprising: a plurality of pixels each including a first photoelectric converter configured to generate an electric charge by photoelectric conversion (102-1, 102-2 fig. 7, [102-2, being the first]), an accumulation unit configured to accumulate an electric charge into which light has been photoelectrically converted (see FD fig. 7, equated to the claimed accumulation unit by the virtue of storing charges output from the photoelectric conversion unit), a capacitive element configured to accumulate an overflowed electric charge (see 106-1 fig. 7), a first transistor provided between the capacitive element and the accumulation unit (see 110 fig. 7), and a second transistor configured to output a signal based on the electric charge accumulated in the accumulation unit (see 118 fig. 7); and a signal line coupled to the second transistors of the plurality of pixels. (see 122, coupled via 120).
Reclaim[2] Johnson further discloses , wherein the second transistor is an amplifier transistor coupled to a power supply line and configured to output the signal based on the electric charge accumulated in the accumulation unit to the signal line (see 116, 118 and 122 fig. 7, and ¶0042, Source follower transistor 118 has a gate terminal coupled to floating diffusion region 124. Source follower transistor 118 also has a first source-drain terminal coupled to voltage supply 116).
Reclaim[3] Johnson further discloses, wherein the pixels each include a second photoelectric converter configured to generate an electric charge by photoelectric conversion (see 102-1 fig. 7), and the capacitive element is configured to accumulate an electric charge overflowed from the second photoelectric converter (see ¶0053, Charge follows overflow path 104 from photodiode 102-1 to overflow node 106-1).
Reclaim[4] Johnson further discloses, wherein a sensibility of the second photoelectric converter to light is lower than a sensibility of the first photoelectric converter to light (see ¶0052, Photodiode 102-1 may have a lower sensitivity to incident light than photodiode 102-2).
Reclaim[5] Johnson further discloses, wherein the pixels each include a third transistor provided between the second photoelectric converter and the capacitive element, and the capacitive element is configured to accumulate the electric charge overflowed from the second photoelectric converter through the third transistor (see 108 fig. 7 and ¶0052, he imaging pixel of FIG. 7 includes first and second photodiodes 102-1 and 102-2. Overflow transistor 108 may be interposed between photodiode 102-1 and storage capacitor 112).
Reclaim[6] Johnson further discloses, wherein the pixels each include a fourth transistor configured to reset a voltage of the accumulation unit (see 114 and 124 fig. 7).
Reclaim[7] Johnson further discloses, wherein the second transistor has a gate electrically coupled to the accumulation unit (the gate of 118 and 124 fig. 7), and the fourth transistor is electrically coupled to a power supply line through which a first voltage or a second voltage lower than the first voltage is configured to be transmitted, and is configured to supply the first voltage or the second voltage to the accumulation unit (see 114 and 116 fig. 7).
Reclaim[9] Johnson further , wherein a first electrode of the capacitive element is electrically coupled to the second photoelectric converter (see 102-1 and first electrode connected to 102-1 as depicted in fig. 7), and a second electrode of the capacitive element and the fourth transistor are electrically coupled to different power supply lines from each other (see fig. 7 114 is coupled to 116, VAAPIX, and the other electrode of 112 is coupled to 126, VXX. As depicted in fig. 7).
Reclaim[10] Johnson further discloses, wherein the capacitive element is configured to accumulate an electric charge overflowed from the first photoelectric converter (see fig. 7, 102-2, when the DCG is on).
Reclaim[11] Johnson further discloses , wherein the pixels each include a fifth transistor (110 fig. 7) provided between the first photoelectric converter (102-2, fig.7) and the capacitive element (112), and the capacitive element is configured to accumulate the electric charge overflowed from the first photoelectric converter through the fifth transistor (when DCG is on the over flow charge from 102-2 is stored in the node 106-1).
Reclaim[12] Johnson further discloses , wherein the pixels each include a fourth transistor configured to reset a voltage of the accumulation unit (see 114, 124 fig. 7).
Reclaim[13] Johnson further discloses , wherein the second transistor has a gate electrically coupled to the accumulation unit (see the gate of 118 and 1244 as depicted in fig. 7), and the fourth transistor is electrically coupled to a power supply line through which a first voltage or a second voltage lower than the first voltage is configured to be transmitted, and is configured to supply the first voltage or the second voltage to the accumulation unit (see 114 and 116 fig. 7).
Reclaim[15] Johnson further discloses, wherein a first electrode of the capacitive element is electrically coupled to the first photoelectric converter (see 112 and 102-2 fig. 7), and a second electrode of the capacitive element and the fourth transistor are electrically coupled to different power supply lines from each other (see 114, 112, 126 and 116 fig. 7).
Reclaim [20], Johnson discloses a method for driving an imaging device (see figs. 1,2 and 8, by the virtue of outputting image signal from the pixel array for further processing as depicted in fig. 1), the imaging device including a plurality of pixels each including a photoelectric converter configured to generate an electric charge by photoelectric conversion (see 102-1, 102-2 fig. 7), an accumulation unit configured to accumulate an electric charge (see 124 fig. 7), a capacitive element configured to accumulate an overflowed electric charge (see 112 fig.7), and a transistor configured to output a signal based on the electric charge accumulated in the accumulation unit (see 118 fig. 7) and a signal line coupled to the transistors of the plurality of pixels (see 122 fig. 7), the method comprising: transferring at least one of the electric charge into which light has been photoelectrically converted by the photoelectric converter and the electric charge accumulated in the capacitive element to the accumulation unit (see ¶0039, a source follower transistor 118 coupled to the floating diffusion region, a row select transistor 120 coupled to the source follower transistor, a voltage supply terminal 116 that provides power supply voltage V.sub.AAPIX, a reset transistor 114 coupled between the floating diffusion region 124 and power supply terminal 116, a storage capacitor 112, a gain select transistor 110 coupled between the floating diffusion region and the storage capacitor, [when 112 is coupled to 124]); and outputting, by the transistor, a signal based on the electric charge accumulated in the accumulation unit to the signal line (see 124,118 fig. 7 and ¶0049, a source follower transistor 118 coupled to the floating diffusion region).
Claim(s) [1-3 and 20] is/are rejected under 35 U.S.C. 102 (a1) as being anticipate by Muan (US2022/0013551).
Reclaim [1] Muan discloses an imaging device (see figs. 1 and 2) comprising: a plurality of pixels each including a first photoelectric converter configured to generate an electric charge by photoelectric conversion (see 214, 216 fig. 2), an accumulation unit configured to accumulate an electric charge into which light has been photoelectrically converted (see 222, fig. 2 equated to the claimed accusation unit by the virtue storing signal charges from the photoelectric conversion element.), a capacitive element configured to accumulate an overflowed electric charge (232 fig. 2 and ¶0039, the dual floating diffusion transistor 230 is adapted to couple the capacitor 232 to the first floating diffusion 222 in response to a dual floating diffusion signal DFD to provide additional dynamic range capabilities to the pixel cell 210 if desired), a first transistor (230 fig. 2) provided between the capacitive element (232) and the accumulation unit (222 fig. 2), and a second transistor (224) configured to output a signal based on the electric charge accumulated in the accumulation unit (see 222 fig. 2); and a signal line coupled to the second transistors of the plurality of pixels (see 212 fig. 2).
Reclaim [2], Muan further discloses wherein the second transistor (224 fig. 2 ) is an amplifier transistor coupled to a power supply line (VDD fig. 2) and configured to output the signal based on the electric charge accumulated in the accumulation unit to the signal line (see ¶0038, .The gate terminal of an amplifier transistor 224 is also coupled to the first floating diffusion 222 to generate an image data signal in response to the image charge in the first floating diffusion 222).
Reclaim[3] Muan further discloses, wherein the pixels each include a second photoelectric converter configured to generate an electric charge by photoelectric conversion (see 216 fig. 2), and the capacitive element (232 fig. 2) is configured to accumulate an electric charge overflowed from the second photoelectric converter (see ¶0039, the dual floating diffusion transistor 230. In operation, the dual floating diffusion transistor 230 is adapted to couple the capacitor 232 to the first floating diffusion 222 in response to a dual floating diffusion signal DFD to provide additional dynamic range capabilities to the pixel cell 210 if desired).
Reclaim [20], A method for driving an imaging device (see fig. 1, by the virtue of driving out signals from the pixel array as depicted in fig. 1), the imaging device including a plurality of pixels each including a photoelectric converter configured to generate an electric charge by photoelectric conversion (see 214, 216 fig. 1), an accumulation unit configured to accumulate an electric charge (see 222 fig. 2), a capacitive element configured to accumulate an overflowed electric charge (see 232 fig. 2), and a transistor configured to output a signal based on the electric charge accumulated in the accumulation unit (see 224 fig. 2) and a signal line coupled to the transistors of the plurality of pixels (see 212 fig. 2), the method comprising: transferring at least one of the electric charge into which light has been photoelectrically converted by the photoelectric converter and the electric charge accumulated in the capacitive element to the accumulation unit (see ¶¶ 0038-0039, In operation, the dual floating diffusion transistor 230 is adapted to couple the capacitor 232 to the first floating diffusion 222 in response to a dual floating diffusion signal DFD to provide additional dynamic range capabilities to the pixel cell 210 if desired [in the even when the capacitor 2323 is coupled to the floating diffusion 232,]); and outputting, by the transistor, a signal based on the electric charge accumulated in the accumulation unit to the signal line (see ¶0038, In the illustrated example, the amplifier transistor 224 is coupled as a source-follower (SF) coupled transistor. A row select transistor 226 is coupled to the amplifier transistor SF 224 to output the image data signal to an output bitline 212).
Examiner note in the claimed capacitive element of claim [1], the synonym to means , element is preceded by a well- known structure in the art capacitive, thus the limitation don’t invoke 112 (f).
Allowable Subject Matter
Claims [8, 14 and 16-19] objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
Reclaim [8] none of the prior arts on the record either singularly or in combination teaches or suggests wherein a first electrode of the capacitive element is electrically coupled to the second photoelectric converter, and a second electrode of the capacitive element and the fourth transistor are electrically coupled to a shared power supply line.
Reclaim [14] none of the prior arts on the record either singularly or in combination teaches or suggests, wherein a first electrode of the capacitive element is electrically coupled to the first photoelectric converter, and a second electrode of the capacitive element and the fourth transistor are electrically coupled to a shared power supply line.
Reclaim [16] none of the prior arts on the record either singularly or in combination teaches or suggests: comprising: a substrate provided with a plurality of the first photoelectric converters; and a separation section provided between the first photoelectric converters adjacent to each other.
Claim [17] is objected as allowable due to its dependency on claim [16].
Reclaim [18] none of the prior arts on the record either singularly or in combination teaches or suggests: The imaging device according to claim 1, comprising a substrate provided with a plurality of the first photoelectric converters, wherein the pixels each include a transfer unit configured to transfer the electric charge into which light has been photoelectrically converted by the first photoelectric converter to the accumulation unit, and the transfer unit is formed by digging in the substrate.
Claim [19] is objected as allowable due to its dependency on claim [18].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Geurts (US. PAT. No. 10, 791, 292) discloses : To allow overflow of charge from photodiode 102 to storage capacitor 110 and increase dynamic range, control signal TH1 for threshold transistor 105 may be set to an intermediate voltage level during the integration time. When the charge levels in photodiode 102 exceed a given level (set by control signal TH1), charge may overflow into capacitor 110. For example, the overflow charge may follow path 132. This example is merely illustrative, and control signal TX for transfer transistor 104 may instead be set to an intermediate voltage level that allows charge to pass to capacitor 110 when the charge levels exceed a given level in the photodiode. In Col. 6 lines 34-45
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/AHMED A BERHAN/Primary Examiner, Art Unit 2639
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