DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Foreign priority is not claimed for this application.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/31/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The relationship between the average ET modulated voltage (Vcc) and the reference voltage (Vref) is not clear. What is the synergy between these two quantities? Proper examination and search of these claims cannot be done until it is made more clear. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2 is/are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by US 20170257068 by Hur et al.
Regarding claim 1, Hur teaches a hybrid power amplifier circuit (Fig. 1-3A) comprising:
a signal input (Vi) that receives a radio frequency (RF) signal having a time-variant input power (Si);
a signal output (Vo) that outputs the RF signal having a time-variant output power to a load circuit (313) having an inherent load impedance;
a carrier amplifier (101/301) and a peak amplifier (102/305) coupled in parallel between the signal input (Vi) and the signal output (Vo) and configured to collectively amplify the RF signal from the time-variant input power to the time-variant output power based on an envelope tracking (ET) modulated voltage (Vsupply; Par. 55); and
a control circuit (350, 320) configured to bias the peak amplifier (102/305) based on a reference voltage (V1) to present a modulated load impedance to the carrier amplifier (101/301) to thereby cause the carrier amplifier to operate in compression in response to an average of the ET modulated voltage (Vsupply/Vs) being substantially equal to the reference voltage (Fig. 3a V1 and Vs; Par. 32, 37-38; when the ET voltage Vs is equal or higher than V1 that’s when the bias turns on).
Regarding claim 2, Hur teaches the hybrid power amplifier circuit of claim 1, further comprising an impedance inverter circuit (104/311) configured to generate the modulated load impedance as a function of an equivalent load impedance of the peak amplifier (102/305) and the load circuit (313).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3-8, 10, and 13-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20170257068 by Hur et al.
Regarding claims 3 and 14, Hur teaches the hybrid power amplifier circuit of claim 2, wherein the modulated load impedance is expressed as:
ZM = -Ka2/ ZL-EQ, wherein:
ZM represents the modulated load impedance presented to the carrier amplifier;
Ka represents a coefficient of the impedance inverter circuit; and
ZL-EQ represents the equivalent load impedance of the peak amplifier and the load circuit.
Hur doesn’t explicitly state this formula, however, the impedance inverter is a quarter wavelength inverter and it’s the square root of the input and output impedance. That’s how impedance inverters work. It’s well known in the art. Voltage, current, and load are regulated by basic circuit theorems like Ohm and Kirchoff and wave shape and can be derived through simple algebraic manipulation or in case of time variant quantities, through calculus. These do not constitute any inventive concepts. These are just derivations. These circuit performance equations are based on circuit parameters.
Regarding claims 4 and 15, Hur teaches the hybrid power amplifier circuit of claim 3, wherein the equivalent load impedance of the peak amplifier and the load circuit is expressed as:
ZL-EQ = ZLOAD/[1 - IP/ (2 * IM)], wherein:
ZLOAD represents the inherent load impedance of the load circuit;
IP represents a time-variant peak current envelope; and
IM represents a time-variant carrier current envelope.
Hur doesn’t explicitly state this formula however, this is a fundamental equation; equivalent load is load divided by current. Voltage, current, and load are regulated by basic circuit theorems like Ohm and Kirchoff and wave shape and can be derived through simple algebraic manipulation or in case of time variant quantities, through calculus. These do not constitute any inventive concepts. These are just derivations. These circuit performance equations are based on circuit parameters.
Regarding claims 5 and 16, Hur teaches the hybrid power amplifier circuit of claim 2, wherein the ET modulated voltage is generated to track a time-variant carrier voltage envelope across the carrier amplifier, wherein the time-variant carrier voltage envelope is a function of the modulated load impedance presented to the carrier amplifier. Voltage is proportional to load and the current. The voltage, current, and load are regulated by basic circuit theorems like Ohm and Kirchoff and wave shape and can be derived through simple algebraic manipulation or in case of time variant quantities, through calculus. These do not constitute any inventive concepts. These are just derivations.
Regarding claims 6 and 17, Hur teaches the hybrid power amplifier circuit of claim 5, wherein the time- variant carrier voltage envelope is expressed as: VM = IM * ZM, wherein:
VM represents the time-variant carrier voltage envelope;
IM represents a time-variant carrier current envelope; and
ZM represents the modulated load impedance presented to the carrier amplifier.
Hur doesn’t explicitly state this formula, however, it’s well known in the art. The voltage, current, and load are regulated by basic circuit theorems like Ohm and Kirchoff and wave shape and can be derived through simple algebraic manipulation or in case of time variant quantities, through calculus. These do not constitute any inventive concepts. These are just derivations. These circuit performance equations are based on circuit parameters.
Regarding claims 7 and 18, Hur teaches the hybrid power amplifier circuit of claim 5, wherein the average of the ET modulated voltage is expressed as:
avg(Vcc) =(about equal to) avg(VM) * TFC, wherein:
avg(Vcc) represents the average of the ET modulated voltage;
avg(VM) represents an average of the time-variant carrier voltage envelope; and
TFC represents a carrier load-line transfer function.
Hur doesn’t explicitly state this equation, however, it’s understandable that supply voltage and carrier voltage will be directly proportional to the transfer function. It’s common knowledge in the art. The voltage, current, and load are regulated by basic circuit theorems like Ohm and Kirchoff and wave shape and can be derived through simple algebraic manipulation or in case of time variant quantities, through calculus. These do not constitute any inventive concepts. These are just derivations. These circuit performance equations are based on circuit parameters.
Regarding claims 8 and 19, Hur teaches the hybrid power amplifier circuit of claim 7, wherein the average of the time-variant carrier voltage envelope is expressed as:
avg(VM) = 4 * ZLOAD * (avg(IM] - avg(Ip)/ 2), wherein:
ZLOAD represents the inherent load impedance of the load circuit;
avg(IP represents an average of a time-variant peak current envelope; and
avg(IM) represents an average of a time-variant carrier current envelope.
Hur doesn’t explicitly state this formula however, it’s well known in the art that voltage is proportional to impedance and current and average of the voltage would be dependent on the wave shape of the voltage. The multiplying factor is dependent on the wave shape. The voltage, current, and load are regulated by basic circuit theorems like Ohm and Kirchoff and wave shape and can be derived through simple algebraic manipulation or in case of time variant quantities, through calculus. These do not constitute any inventive concepts. These are just derivations. These circuit performance equations are based on circuit parameters.
Regarding claim 10, Hur teaches a power management circuit comprising:
an envelope tracking (ET) integrated circuit (ETIC) (340):
a hybrid power amplifier circuit (Fig. 1-3A) comprising:
a signal input (Vi) that receives a radio frequency (RF) signal having a time-variant input power (Si);
a signal output (Vo) that outputs the RF signal having a time-variant output power to a load circuit (313) having an inherent load impedance;
a carrier amplifier (101/301) and a peak amplifier (102/305) coupled in parallel between the signal input (Vi) and the signal output (Vo) and configured to collectively amplify the RF signal from the time-variant input power to the time-variant output power based on an envelope tracking (ET) modulated voltage (Vsupply; Par. 55); and
a control circuit (350, 320) configured to bias the peak amplifier (102/305) based on a reference voltage (V1) to present a modulated load impedance to the carrier amplifier (101/301) to thereby cause the carrier amplifier to operate in compression in response to an average of the ET modulated voltage (Vsupply/Vs) being substantially equal to the reference voltage (Fig. 3a V1 and Vs; Par. 32, 37-38; when the ET voltage Vs is equal or higher than V1 that’s when the bias turns on).
Hur doesn’t explicitly state the circuit configuration of the power supply. However, envelope tracking integrated circuits are well known in the art. Fig. 1 of US 20140139199 by Khlat et al. teaches an envelope tracking circuit with a switcher circuit (12) configured to generate a low-frequency current (Isw_out) as a function of a battery voltage (VBAT); and a voltage circuit (14) configured to generate an ET modulated voltage (Vcc2) based on an ET target voltage (Vramp; Par. 19) and the low- frequency current (40).
Regarding claim 11, Hur teaches the teaches the power management circuit of claim 10, and while the specifics of the power management circuit are not specified, power management circuits are very well known in the art. Fig. 1A and 2A of US 20140062590 by Khlat et al. teaches a power management circuit wherein the voltage circuit (14/18) comprises:
a voltage amplifier (parallel amplifier 14) configured to generate an initial ET modulated voltage (Vpawa_amp) based on an ET target voltage [[(Vramp)]] and a supply voltage [[(Vbat)]]; and
an offset capacitor (18A) configured to raise the initial ET modulated voltage (Vpawa_amp) by an offset voltage (Voffset) to generate the ET modulated voltage (Vcc).
Regarding claim 12, Hur teaches the power management circuit of claim 10, and while the specifics of the power management circuit are not specified, power management circuits are very well known in the art. Fig. 1A and 2A of US 20140097895 by Khlat et al. teaches a power management circuit wherein the switcher circuit (12) comprises:
a multi-level charge pump, MCP, (12) configured to generate a low-frequency voltage (Vsw) at multiple levels based on the battery voltage (VBAT); and
a power inductor (16) configured to induce the low-frequency current (Isw_out) based on the low-frequency voltage (Vsw).
Regarding claim 13, Hur teaches the power management circuit of claim 10, wherein the hybrid power amplifier circuit further comprises an impedance inverter circuit (104/311) configured to generate the modulated load impedance as a function of an equivalent load impedance of the peak amplifier (102/305) and the load circuit (313).
Conclusion
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/NAREH SHAMIRYAN/Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843
