Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claim 20-22, 28-30 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 16-30 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 16 and 23 recite “a micromechanical component” in the preamble, however the sensor chip is in the dependent claims 17 and 24, thus in independent claims 16 and 23 it is not clear if the term “a micromechanical component” is intended use, especially since the “micromechanical component” is part of the micro-electro-mechanical MEMS device sensor chip, which is placed in a cavity formed in the mold of the package of the independent claims 16 and 23, thus essentially any package having a mold would satisfy the intended use, thus it seems deceptive to claim that the function chip and the sensor chip and the other parts of the pacakge are actually a part of the “micromechanical component” and raises the question of whether the “a micromechanical component” in the preamble carries any weight or is just intented use ? The Examiner makes the analogy that one cannot claim that the solar system is part of the earth, rather the earth is part of the solar system.
Claim 16 and 23 recite the limitation “wherein the cover substantially completely covers the main surface” which is not clear because adjective substantially acts to negate the term completely and it is assumed that “substantially completely” means that although it is meant to be completely, there can be exceptions, see the 112 is mentioned in the rejection.
Claim 16 and 23 recite the limitation “cover chip” and for the record, the Examiner wishes to note that the term “cover chip” is not standard usage of the word chip which normally means a semiconductor die comprising active circuitry, however see the Application specification “a cover chip 15a, which is formed from a chip material that has a diffusion-inhibiting effect on halogen ions located in the mold compound 4, is attached, as a diffusion barrier to the later mold package 4, to the main surface 2a of the circuit chip 2. Examples of such a chip material are silicon, glass, ceramic, plastic, etc” and the Examiner notes that “glass, ceramic, plastic, etc” are NOT usually considered chip material and this should be considered when reviewing this Application, and the word etc means almost anything can be “chip material”, thus it is assumed that by chip the Applicant means something flat.
Note: The Examiner cites evidence here as it is used in multiple claims, known to a person of ordinary skill in the art.
Sekiguchi et al. (JP 2008249335 A) hereafter referred to as Sekiguchi teaches that “the diffusion of halogen is suppressed by the thick substrate 26 (125 μm polyimide in this example)”.
Matsuno (US 6004887 A) teaches “an SiN insulation film as the fluorine diffusion suppression film 231 is deposited”.
Baba (US 5172212 A) teaches “when elements are housed inside a package made of a plastic resin, the aluminum (Al) of the pad reacts with halogen ions of chlorine (Cl) and the like, alkali ions such as natrium (Na), and acidic ions such as sulfur oxides (SO.sub.4.sup.-) and the like, to cause faults such as pad corrosion as has been proven in moisture resistance testing for plastic packages”.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 16-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 20170363492 A1) hereafter referred to as Chen in view of Lee et al. (US 20120115277 A1) hereafter referred to as Lee . Sekiguchi et al. (JP 2008249335 A), Matsuno (US 6004887 A), Baba (US 5172212 A) are provided as evidence.
In regard to claim 16 Chen teaches a micromechanical component [see Fig. 16 “they provided a sensor chip (e.g. a pressure chip, or a MEMs device) and a processing chip (e.g. a CMOS device with aluminum pads, standard passivation layer, etc.” “pressure sensor 20” “any pressure sensor can be used”], comprising:
a substrate [see 33” “substrate 33”];
a function chip [“processing device 10′”] which is attached to the substrate and has a main surface [see Fig. 16] facing away from the substrate, wherein one or more bond pads are provided [“pads 11 and the corresponding OPM 17” “aluminum pads 11, 12 of said processing device” “At least one of the pads 11 are interconnected with package pins 31 of the lead frame 33 via second bonding wires 35. These bonding wires are typically also made of gold, despite the fact that they are not directly exposed, as described further”] on the main surface and are bonded to the substrate via a respective bond wire;
a cover [see Fig. 16 see 40 see “additional passivation layer, e.g. made of SiN or poly-imide or PBO improves the corrosion resistance even more” “additional passivation layer 40 is put on top of the overpad metallization 17, 18, for example consisting of poly-imide or PBO (polybenzoxazole). A contact opening 41 is provided for allowing connection of the bond wire 34. An important effect of this additional passivation layer 40 is that it prevents exposure of an end of the seed layer 15, and that it closes the pinholes”], which is formed from a chip material [see it is polyimide or SiN, see the 112 rejection above, see Applicants description of chip material is NOT standard or even complete, see specification “Examples of such a chip material are silicon, glass, ceramic, plastic, etc”] that has a diffusion- inhibiting effect [see evidence Sekiguchi teaches that “the diffusion of halogen is suppressed by the thick substrate 26 (125 μm polyimide in this example)”, see evidence Matsuno teaches “an SiN insulation film as the fluorine diffusion suppression film 231 is deposited”] on halogen ions located in [see this is a known problem in the art, see evidence Baba teaches “when elements are housed inside a package made of a plastic resin, the aluminum (Al) of the pad reacts with halogen ions of chlorine (Cl) and the like, alkali ions such as natrium (Na), and acidic ions such as sulfur oxides (SO.sub.4.sup.-) and the like, to cause faults such as pad corrosion as has been proven in moisture resistance testing for plastic packages”] a mold compound, is attached, as a diffusion barrier to a mold package, to the main surface [see Fig. 16 see 40] or above the main surface of the circuit chip, wherein the cover substantially completely covers [see Fig. 16 see 40 is provided over the entire surface except for holes for the wires i.e. “substantially completely covers” under broadest reasonable interpretation] the main surface; and
the mold package [“an overmould 32 of a corrosion resistant plastic compound”], in which the function chip is packaged [see Fig. 16] together with the cover
but doesn’t state that the cover is a “chip” .
See Chen teaches 40 can be SiN see “additional passivation layer, e.g. made of SiN or poly-imide or PBO improves the corrosion resistance even more”, see reliance on “a relatively thick layer of a noble metal, e.g. 5 μm of gold is applied as an overpad metalization (OPM) 17, 18” are noble metal i.e. more difficult to corrode, see “the distal portions 18c of the OPM, referred to as redistribution pads 16, are connected to the pads 21 of the sensor chip 20 by means of first bonding wires 34”.
See Lee Fig. 3H see “In the first wire bonding step 5, a plurality of first bonding wires 241 are formed by wire bonding to electrically connect the first bonding pads 223 with the bonding fingers 213”, see Fig. 3D “dielectric layer 261 electrically isolates the second chip 250 from the first bonding wires 241. Moreover, the FOW adhesive 262 encapsulates a plurality of loop-height sections of the first bonding wires 241 above the first active surface 221 and is attached to the first active surface 221, i.e., the wire loop portions of the first bonding wires 241 are encapsulated which is more vulnerable for wire sweeping during molding processes” “the dielectric layer 261 can ensure good electrical isolation between the second chip 250 and the first bonding wires 241 to avoid leakage and it can further lower the loop heights of the first bonding wires” “Before packaging processes, the dielectric layer 261 and the FOW adhesive 262 can be formed in a composite tape in advance, that is to say, the dielectric layer 261 and the FOW adhesive 262 are carried by a release film and then the dielectric layer 261 is adhered to the second back surface 252 of the second chip 250 in wafer form” , see also in Lee that “a plurality of second bonding wires 242 are formed by wire bonding to electrically connect the second bonding pads 253 with the bonding fingers 213” i.e. see that 242 and 241 can connect to the same 213 i.e. you can connect upper chip to lower chip in this way, see also that in Lee the “first bonding pads 223 of the first chip 220” are simpler than the bonding pads of Chen.
Thus it would be obvious to modify Chen to include that a dielectric “chip” such as SiN along with an adhesive such as polyimide is pressed onto the “bonding wires 35” of “processing device 10′” so that the polyimide and SiN completely cover the top of processing device 10′ and cured and also that “first bonding wires 34” connect to a same lead pin of the lead frame 33 as do some second bonding wires 35 to interconnect sensor device 20 and processing device 10′ in the same interconnection way that Lee does, the Examiner notes that a person of ordinary skill in the art is aware that polyimide has a choice of thermoplastic or thermosetting.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Chen to include that the cover is a “chip” and that wherein the cover chip substantially completely covers the main surface.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to fully protect the surface of processing device 10′ from corrosion by a complete covering comprising a dielectric “chip” such as SiN along with an adhesive such as polyimide and even have choice to save money by less complex bonding pads for processing device 10′, since the pads are better protected from corrosion.
In regard to claim 17 Chen and Lee as combined teaches wherein the function chip [“processing device 10 can be any integrated semiconductor device, e.g. pure analog, or mixed analog and digital, and may comprise a programmable processor with a non-volatile memory, etc”] is a circuit chip, wherein the mold package has a cavity [see Chen “This can easily be achieved by a suitable shaping of the plastic mould compound, e.g. by forming a cavity 36 in the plastic such that the sensor device 20 is located in said cavity 36 (better visible in FIG. 13)”] above the function chip, a sensor chip being attached in the cavity, wherein the sensor chip [“a sensor chip (e.g. a pressure chip, or a MEMs device)” “FIG. 1 and FIG. 2 show a pressure sensor assembly 100 known from US2009/0218643(A1), in side view and top view respectively. This pressure sensor assembly has two pressure sensors 101a, 101b connected to a discrete processing board 133 by means of so called “terminals” 111 (see FIG.3)” “FIG. 4 and FIG. 5 are a schematic representation (in side view and top view) of an exemplary discrete absolute pressure sensor 20 as can be used in embodiments of the present invention. In fact, only very few details of the absolute pressure sensor 20 are shown: a substrate 22 having a thinned portion forming a membrane 23 (also known as diaphragm) and contact pads 21 connected with a pressure sensitive circuit (not shown) located on the membrane 23”] includes a pressure sensor and/or a microphone and/or an acceleration sensor and/or a rotation rate sensor and/or an optical sensor.
In regard to claim 18 Chen and Lee as combined teaches wherein the cover chip is attached to the main surface [see combination fully protect the surface of processing device 10′ from corrosion by a complete covering comprising a dielectric “chip” such as SiN along with an adhesive such as polyimide] via an adhesion layer.
In regard to claim 19 Chen and Lee as combined teaches wherein the adhesion layer is produced from [see a person of ordinary skill in the art is aware that polyimide has a choice of thermoplastic or thermosetting] a thermoplastic material.
Claim(s) 23-27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 20170363492 A1) hereafter referred to as Chen in view of Lee et al. (US 20120115277 A1) hereafter referred to as Lee . Sekiguchi et al. (JP 2008249335 A), Matsuno (US 6004887 A), Baba (US 5172212 A) are provided as evidence.
In regard to claim 23 Chen teaches a method for producing a micromechanical component [see Fig. 16 “they provided a sensor chip (e.g. a pressure chip, or a MEMs device) and a processing chip (e.g. a CMOS device with aluminum pads, standard passivation layer, etc.” “pressure sensor 20” “any pressure sensor can be used”], comprising the steps of:
providing a substrate [see 33” “substrate 33”];
attaching a function chip [“The processing device 10′ with OPM is mounted on top of a lead frame 33”] with a main surface facing away from the substrate, to the substrate, wherein one or more bond pads [“pads 11 and the corresponding OPM 17” “aluminum pads 11, 12 of said processing device” “a relatively thick layer of a noble metal, e.g. 5 μm of gold is applied as an overpad metalization (OPM) 17, 18”] are provided on the main surface;
bonding the bond pads [ “At least one of the pads 11 are interconnected with package pins 31 of the lead frame 33 via second bonding wires 35. These bonding wires are typically also made of gold, despite the fact that they are not directly exposed, as described further”] to the substrate via a respective bond wire;
attaching a cover [see Fig. 16 see 40 see “additional passivation layer, e.g. made of SiN or poly-imide or PBO improves the corrosion resistance even more” “additional passivation layer 40 is put on top of the overpad metallization 17, 18, for example consisting of poly-imide or PBO (polybenzoxazole). A contact opening 41 is provided for allowing connection of the bond wire 34. An important effect of this additional passivation layer 40 is that it prevents exposure of an end of the seed layer 15, and that it closes the pinholes”], which is formed from a chip material [see it is polyimide or SiN, see the 112 rejection above, see Applicants description of chip material is NOT standard or even complete, see specification “Examples of such a chip material are silicon, glass, ceramic, plastic, etc”] that has a diffusion-inhibiting effect [see evidence Sekiguchi teaches that “the diffusion of halogen is suppressed by the thick substrate 26 (125 μm polyimide in this example)”, see evidence Matsuno teaches “an SiN insulation film as the fluorine diffusion suppression film 231 is deposited”] on halogen ions located in [see this is a known problem in the art, see evidence Baba teaches “when elements are housed inside a package made of a plastic resin, the aluminum (Al) of the pad reacts with halogen ions of chlorine (Cl) and the like, alkali ions such as natrium (Na), and acidic ions such as sulfur oxides (SO.sub.4.sup.-) and the like, to cause faults such as pad corrosion as has been proven in moisture resistance testing for plastic packages”] the mold compound, as a diffusion barrier to a mold package, to the main surface [see Fig. 16 see 40] or above the main surface of the circuit chip, wherein the cover substantially completely covers [see Fig. 16 see 40 is provided over the entire surface except for holes for the wires i.e. “substantially completely covers” under broadest reasonable interpretation] the main surface; and
providing a mold package [“an overmould 32 of a corrosion resistant plastic compound”], in which the function chip is packaged [see Fig. 16] together with the cover,
but doesn’t state that the cover is a “chip” .
See Chen teaches 40 can be SiN see “additional passivation layer, e.g. made of SiN or poly-imide or PBO improves the corrosion resistance even more”, see reliance on “a relatively thick layer of a noble metal, e.g. 5 μm of gold is applied as an overpad metalization (OPM) 17, 18” are noble metal i.e. more difficult to corrode, see “the distal portions 18c of the OPM, referred to as redistribution pads 16, are connected to the pads 21 of the sensor chip 20 by means of first bonding wires 34”.
See Lee Fig. 3H see “In the first wire bonding step 5, a plurality of first bonding wires 241 are formed by wire bonding to electrically connect the first bonding pads 223 with the bonding fingers 213”, see Fig. 3D “dielectric layer 261 electrically isolates the second chip 250 from the first bonding wires 241. Moreover, the FOW adhesive 262 encapsulates a plurality of loop-height sections of the first bonding wires 241 above the first active surface 221 and is attached to the first active surface 221, i.e., the wire loop portions of the first bonding wires 241 are encapsulated which is more vulnerable for wire sweeping during molding processes” “the dielectric layer 261 can ensure good electrical isolation between the second chip 250 and the first bonding wires 241 to avoid leakage and it can further lower the loop heights of the first bonding wires” “Before packaging processes, the dielectric layer 261 and the FOW adhesive 262 can be formed in a composite tape in advance, that is to say, the dielectric layer 261 and the FOW adhesive 262 are carried by a release film and then the dielectric layer 261 is adhered to the second back surface 252 of the second chip 250 in wafer form” , see also in Lee that “a plurality of second bonding wires 242 are formed by wire bonding to electrically connect the second bonding pads 253 with the bonding fingers 213” i.e. see that 242 and 241 can connect to the same 213 i.e. you can connect upper chip to lower chip in this way, see also that in Lee the “first bonding pads 223 of the first chip 220” are simpler than the bonding pads of Chen.
Thus it would be obvious to modify Chen to include that a dielectric “chip” such as SiN along with an adhesive such as polyimide is pressed onto the “bonding wires 35” of “processing device 10′” so that the polyimide and SiN completely cover the top of processing device 10′ and cured and also that “first bonding wires 34” connect to a same lead pin of the lead frame 33 as do some second bonding wires 35 to interconnect sensor device 20 and processing device 10′ in the same interconnection way that Lee does, the Examiner notes that a person of ordinary skill in the art is aware that polyimide has a choice of thermoplastic or thermosetting.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Chen to include that the cover is a “chip” and that wherein the cover chip substantially completely covers the main surface.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to fully protect the surface of processing device 10′ from corrosion by a complete covering comprising a dielectric “chip” such as SiN along with an adhesive such as polyimide and even have choice to save money by less complex bonding pads for processing device 10′, since the pads are better protected from corrosion.
In regard to claim 24 Chen and Lee as combined teaches wherein a cavity is formed [see Chen “This can easily be achieved by a suitable shaping of the plastic mould compound, e.g. by forming a cavity 36 in the plastic such that the sensor device 20 is located in said cavity 36 (better visible in FIG. 13)”] in the mold package above the function chip, in which cavity a sensor chip is attached, the sensor chip [“a sensor chip (e.g. a pressure chip, or a MEMs device)” “FIG. 1 and FIG. 2 show a pressure sensor assembly 100 known from US2009/0218643(A1), in side view and top view respectively. This pressure sensor assembly has two pressure sensors 101a, 101b connected to a discrete processing board 133 by means of so called “terminals” 111 (see FIG.3)” “FIG. 4 and FIG. 5 are a schematic representation (in side view and top view) of an exemplary discrete absolute pressure sensor 20 as can be used in embodiments of the present invention. In fact, only very few details of the absolute pressure sensor 20 are shown: a substrate 22 having a thinned portion forming a membrane 23 (also known as diaphragm) and contact pads 21 connected with a pressure sensitive circuit (not shown) located on the membrane 23”] including a pressure sensor and/or a microphone and/or an acceleration sensor and/or a rotation rate sensor and/or an optical sensor.
In regard to claim 25 Chen and Lee as combined teaches wherein the cover chip is attached to the main surface [see combination fully protect the surface of processing device 10′ from corrosion by a complete covering comprising a dielectric “chip” such as SiN along with an adhesive such as polyimide] via an adhesion layer.
In regard to claim 26 Chen and Lee as combined teaches wherein the adhesion layer is produced from a thermoplastic material [see a person of ordinary skill in the art is aware that polyimide has a choice of thermoplastic or thermosetting] and the cover chip is attached, together with [see combination, the “chip” and the adhesive formed in a composite tape in advance] the thermally softened adhesion layer located thereon, to the main surface.
In regard to claim 27 Chen and Lee as combined teaches wherein the adhesion layer is dispensed in liquid form [see Chen “main difference is that in the sensor assembly 30″ of FIG. 16 an additional passivation layer 40 is put on top of the overpad metallization 17, 18, for example consisting of poly-imide or PBO (polybenzoxazole)” see before curing polyimide is liquid, see combination a dielectric “chip” such as SiN along with an adhesive such as polyimide is pressed onto the “bonding wires 35” of “processing device 10′” so that the polyimide and SiN completely cover the top of processing device 10′ and cured] onto the main surface, the cover chip is arranged thereon, and the adhesion layer is subsequently cured.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SITARAMARAO S YECHURI whose telephone number is (571)272-8764. The examiner can normally be reached M-F 8:00-4:30 PM.
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/SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893
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