Office Action Predictor
Last updated: April 16, 2026
Application No. 18/836,267

FAULT PROTECTION IN SWITCH DRIVER UNITS

Final Rejection §102§103
Filed
Aug 06, 2024
Examiner
YEAMAN, JAMES G
Art Unit
2842
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Power Integrations, INC.
OA Round
2 (Final)
83%
Grant Probability
Favorable
3-4
OA Rounds
2y 9m
To Grant
89%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
90 granted / 109 resolved
+14.6% vs TC avg
Moderate +7% lift
Without
With
+6.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
17 currently pending
Career history
126
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
67.7%
+27.7% vs TC avg
§102
20.6%
-19.4% vs TC avg
§112
11.3%
-28.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 109 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3 and 6-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Murakami et al. (US 20190326897 and Murakami hereinafter.). Regarding claim 1, Murakami discloses a device comprising: a plurality of switches [fig. 1 and 2, 11-16]; a plurality of driver units [1-6], wherein each driver unit is coupled to drive a respective switch of the plurality of switches [as shown]; a system controller [para. 36] coupled to each of the driver units by a bus, wherein the system controller is configured to coordinate driving [generation of Upn, VPn, Wpn] of the respective switches by the driver units; and at least one communication channel [VFo] coupled to each of the driver units, wherein the driver units are configured to communicate with each other over the communication channel without mediation by the system controller [fig. 2]. Regarding claim 2, Murakami discloses further wherein each of the driver units is configured to characterize a fault in the driving of its respective switch and output a characterization of the fault over the communication channel [para. 11 and 30-35]. Regarding claim 3, Murakami discloses further wherein each of the driver units is configured to respond to corresponding characterizations of faults in the driving of others of the plurality of switches, wherein the corresponding characterizations are received over the communication channel. Regarding claim 6, Murakami discloses further wherein the system controller is configured to communicate a status of the device to each of the driver units over the bus [bus from controller transmits the status of the device by way of signals EN or LOW_POWER to the driver units]. Regarding claim 7, Murakami discloses further wherein each the driver units is configured to interpret fault commands received over the communication channel based on the communicated status of the device [bus from controller transmits the status of the device by way of signals EN or LOW_POWER to the driver units]. Regarding claim 8, Murakami discloses further wherein the system controller is further coupled to the communication channel [para. 36]. Regarding claim 9, Murakami discloses wherein the communication channel is implemented in at least one wire of a second bus [para. 36]. Regarding claim 10, Murakami discloses further wherein the device comprises an inverter [fig. 1]. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Murakami in view of Hiya et al. (US 11050361 and Hiya hereinafter.). Regarding claim 4, Murakami discloses all the features regarding claim 4 as indicated above. Murakami does not explicitly disclose wherein the system controller is configured to communicate a signal that identifies a position of each of the driver units to each of the other driver units over the bus. However, Hiya discloses wherein the system controller is configured to communicate a signal that identifies a position of each of the driver units to each of the other driver units over the bus [col 3 lines 50-59]. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date to modify the invention as described by Murakami to include the system controller is configured to communicate a signal that identifies a position of each of the driver units to each of the other driver units over the bus as taught by hiya to improve a driver circuit by enhancing troubleshooting outcomes during a device failure. Regarding claim 5, Murakami in view of Hiya discloses further wherein each the driver units is configured to interpret fault commands received over the communication channel based on the communicated position [Hiya, fig. 6]. Allowable Subject Matter Claims 11-18 are allowed. The following is an examiner’s statement of reasons for allowance: Claim 11 is allowed because the prior art of record does not disclose nor render obvious “…wherein the fault protection control circuitry is further configured to interpret and respond to corresponding categorizations of faults in driving of other transistors by other driver units without mediation by the system controller.” as cited with the rest of the claimed limitation. Claim 14 is allowed because the prior art of record does not disclose nor render obvious “…wherein the error flag interface block is configured to detect an external fault condition to the driver module indicated by an error flag state on the single terminal EF I/O, wherein the external fault condition is detected outside the driver module,…” as cited with the rest of the claimed limitation. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Dependent claims 12-13 and 15-18 are allowed. Response to Arguments Applicant's arguments filed 12/16/2025 have been fully considered but they are not persuasive. Regarding claim 1, applicant argues [pg. 6-8] Murakami does not teach or suggest driver units which are configured to communicate with each other over the communication channel without mediation by the system controller. Examiner respectfully disagrees. Driving devices 1-6 are coupled to one another through VFo as shown in fig. 1. Para 34 discloses “An alarm signal VFo and the error signal Verr are inputted to the protection operation determining circuit 23”. The inner workings of a single driving device, shown in fig. 2. This along with para. 35 disclosure of “A source of the MOSFET 25 outputs the alarm signal VFo to an outside of the protection”. Therefore, driving devices 1-6 act as inputs and outputs and communicate with each other. This is performed via identification pulse generating circuit 24 and protection operation determining circuit 23 and not by detection circuits 21. Detection circuit 21 acts as a controller because detection circuits 21 includes control power supply voltage detecting circuit UV [para. 32]. Therefore, Murakami reads on the claims and the rejection still stands. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES G YEAMAN whose telephone number is (571)272-5580. The examiner can normally be reached Mon - Fri 954 Schedule. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lincoln Donovan can be reached at (571)272-1988. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAMES G YEAMAN/ Examiner, Art Unit 2842 /LINCOLN D DONOVAN/ Supervisory Patent Examiner, Art Unit 2842
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Prosecution Timeline

Aug 06, 2024
Application Filed
Sep 26, 2025
Non-Final Rejection — §102, §103
Dec 16, 2025
Response Filed
Feb 17, 2026
Final Rejection — §102, §103
Apr 14, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
83%
Grant Probability
89%
With Interview (+6.6%)
2y 9m
Median Time to Grant
Moderate
PTA Risk
Based on 109 resolved cases by this examiner. Grant probability derived from career allow rate.

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