DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-30 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by WO 2021/230795 (cited on IDS) [R1].
For claim 1, R1 discloses a memory and a processor coupled to the memory, the processor configured to (paragraphs 142-145): receive, from a base station, a downlink control message indicating a time domain allocation for a sounding reference signal and a frequency domain allocation for the sounding reference signal (paragraphs 95-107, 130-138, Fig 4-6); and transmit the sounding reference signal using a set of resources in response to the downlink control message, the set of resources selected based at least in part on the time domain allocation for the sounding reference signal and the frequency domain allocation for the sounding reference signal (paragraphs 95-107, 130-138, Fig 4-6).
For claim 2, R1 discloses the processor is configured to: transmit, to the base station, a capability message that indicates a capability of the UE to support dynamic scheduling of resources for the sounding reference signal (paragraphs 6-15, 95-107, 130-138, 177, Fig 4-6).
For claim 3, R1 discloses transmit the sounding reference signal using a set of frequency resources of the set of resources based at least in part on the frequency domain allocation, wherein the set of frequency resources is a truncated set of a total set of frequency resources indicated by the frequency domain allocation (paragraphs 95-107, 130-138, Fig 4-6).
For claim 4, R1 discloses transmit the sounding reference signal using a set of frequency resources of the set of resources based at least in part on the frequency domain allocation, wherein the set of frequency resources comprises multiple subsets of consecutive resources in a frequency domain (paragraphs 95-138, Fig 4-6).
For claim 5, R1 discloses wherein the processor is configured to: receive, from the base station, an indication of a reference signal resource configuration for the UE (paragraphs 95-138, Fig 4-6); and transmit the sounding reference signal using a set of frequency resources of the set of resources based at least in part on the frequency domain allocation, wherein the set of frequency resources comprises an integer multiple of resource blocks indicated by the reference signal resource configuration (paragraphs 95-138, Fig 4-6).
For claim 6, R1 discloses wherein the processor is configured to: receive one or more bits indicating a bandwidth for the sounding reference signal, wherein the sounding reference signal is transmitted using the bandwidth (paragraphs 95-138, Fig 4-6).
For claim 7, R1 discloses wherein the processor is configured to: receive one or more bits indicating one or more resource configuration parameters for the sounding reference signal, wherein the sounding reference signal is transmitted in accordance with the one or more resource configuration parameters (paragraphs 95-138, Fig 4-6).
For claim 8, R1 discloses the one or more resource configuration parameters comprises a bandwidth configuration index, a number of resource blocks, a number of sounding reference signals for transmission, a frequency hopping parameter, or any combination thereof (paragraphs 95-138, Fig 4-6).
For claim 9, R1 discloses the processor is configured to: transmit the sounding reference signal using a set of time resources of the set of resources based at least in part on the time domain allocation, wherein the time domain allocation indicates a starting symbol value for the sounding reference signal, a number of symbols for the sounding reference signal, a time offset for the sounding reference signal, a repetition factor, or any combination thereof (paragraphs 95-138, Fig 4-6, 35-38).
For claim 10, R1 discloses the processor is configured to: receive a control message indicating a configuration for the UE for receiving the downlink control message (paragraphs 95-107, 130-138, Fig 4-6).
For claim 11, R1 discloses the configuration indicates a bitwidth for one or more fields of the downlink control message, the one or more fields indicate the set of resources for the sounding reference signal (paragraphs 95-107, 130-138, Fig 4-6).
For claim 12, R1 discloses the processor is configured to: transmit an indication of a supported bandwidth for the sounding reference signal, a time offset for the sounding reference signal, or any combination thereof (paragraphs 95-107, 130-138, Fig 4-6).
For claim 13, R1 discloses the processor is configured to: receive, in the downlink control message, one or more bits indicating an absence of an uplink shared channel transmission via a physical uplink shared channel (paragraphs 95-107, 130-138, Fig 4-6).
For claim 14, R1 discloses the processor is configured to: receive, in the downlink control message, a frequency domain resource assignment field that indicates the frequency domain allocation (paragraphs 95-107, 130-138, Fig 4-6).
For claim 15, R1 discloses the processor is configured to: receive, in the downlink control message, a time domain resource assignment field that indicates the time domain allocation (paragraphs 95-107, 130-138, Fig 4-6).
For claim 16, R1 discloses a memory and a processor coupled to the memory (paragraphs 142-145), the processor configured to (paragraphs 142-161,172): transmit, to a user equipment (UE), a downlink control message indicating a time domain allocation for a sounding reference signal and a frequency domain allocation for the sounding reference signal (paragraphs 95-138, Fig 4-6); and monitor a set of resources for the sounding reference signal, the set of resources based at least in part on the time domain allocation for the sounding reference signal and the frequency domain allocation for the sounding reference signal (paragraphs 95-138, Fig 4-6).
For claim 17, R1 discloses receive, from the UE, a capability message that indicates a capability of the UE to support dynamic scheduling of resources for the sounding reference signal (paragraphs 95-138, Fig 4-6).
For claim 18, R1 discloses the processor is configured to: receive the sounding reference signal over a set of frequency resources of the set of resources based at least in part on the frequency domain allocation, wherein the set of frequency resources is a truncated set of a total set of frequency resources indicated by the frequency domain allocation (paragraphs 95-138, Fig 4-6).
For claim 19, R1 discloses the processor is configured to: receive the sounding reference signal using a set of frequency resources of the set of resources based at least in part on the frequency domain allocation, wherein the set of frequency resources comprises multiple subsets of consecutive resources in a frequency domain (paragraphs 95-138, Fig 4-6).
For claim 20, R1 discloses the processor is configured to: transmit, to the UE, an indication of a reference signal resource configuration for the UE (paragraphs 95-138, Fig 4-6); and receive the sounding reference signal using a set of frequency resources of the set of resources based at least in part on the frequency domain allocation, wherein the set of frequency resources comprises an integer multiple of resource blocks indicated by the reference signal resource configuration (paragraphs 95-138, Fig 4-6).
For claim 21, R1 discloses the processor is configured to: transmit one or more bits indicating a bandwidth for the sounding reference signal, wherein monitoring for the sounding reference signal is based at least in part on the bandwidth (paragraphs 95-138, Fig 4-6).
For claim 22, R1 discloses the processor is configured to: transmit one or more bits indicating one or more resource configuration parameters for the sounding reference signal, wherein monitoring for the sounding reference signal is in accordance with the one or more resource configuration parameters (paragraphs 95-138, Fig 4-6).
For claim 23, R1 discloses the processor is configured to: receive the sounding reference signal using a set of time resources of the set of resources based at least in part on the time domain allocation, wherein the time domain allocation indicates a starting symbol value for the sounding reference signal, a number of symbols for the sounding reference signal, a time offset for the sounding reference signal, a repetition factor, or any combination thereof (paragraphs 95-138, Fig 4-6).
For claim 24, R1 discloses transmit a control message indicating a configuration for the UE for receiving the downlink control message (paragraphs 95-138, Fig 4-6).
For claim 25, R1 discloses the processor is configured to: receive an indication of a supported bandwidth for the sounding reference signal, a time offset for the sounding reference signal, or any combination thereof (paragraphs 95-138, Fig 4-6).
For claim 26, R1 discloses the processor is configured to: transmit, in the downlink control message, one or more bits indicating an absence of an uplink shared channel transmission via a physical uplink shared channel (paragraphs 95-138, Fig 4-6).
For claim 27, R1 discloses the processor is configured to: transmit, in the downlink control message, a frequency domain resource assignment field that indicates the frequency domain allocation (paragraphs 95-138, Fig 4-6).
For claim 28, R1 discloses the processor is configured to: transmit, in the downlink control message, a time domain resource assignment field that indicates the time domain allocation (paragraphs 95-138, Fig 4-6).
For claim 29, R1 discloses receiving, from a base station, a downlink control message indicating a time domain allocation for a sounding reference signal and a frequency domain allocation for the sounding reference signal (paragraphs 95-138, Fig 4-6); and transmitting the sounding reference signal using a set of resources in response to the downlink control message, the set of resources selected based at least in part on the time domain allocation for the sounding reference signal and the frequency domain allocation for the sounding reference signal (paragraphs 95-138, Fig 4-6).
For claim 30, R1 discloses transmitting, to a user equipment (UE), a downlink control message indicating a time domain allocation for a sounding reference signal and a frequency domain allocation for the sounding reference signal (paragraphs 95-138, Fig 4-6); and monitoring a set of resources for the sounding reference signal, the set of resources based at least in part on the time domain allocation for the sounding reference signal and the frequency domain allocation for the sounding reference signal (paragraphs 95-138, Fig 4-6).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Ni (US 2014/0029569) discloses time and frequency domain.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER R CROMPTON whose telephone number is (571)270-3678. The examiner can normally be reached 10AM-4PM ET M-Th.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Asad Nawaz can be reached at (571)272-3988. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHRISTOPHER R CROMPTON/Primary Examiner, Art Unit 2463
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