Office Action Predictor
Last updated: April 16, 2026
Application No. 18/837,678

POWER TOOL AND DISCHARGING SYSTEM

Non-Final OA §102§103
Filed
Aug 12, 2024
Examiner
CHOWDHURI, SWARNA N
Art Unit
2836
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Jiangsu Dongcheng Tools Technology Co., LTD
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
3y 1m
To Grant
98%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
258 granted / 340 resolved
+7.9% vs TC avg
Strong +22% interview lift
Without
With
+21.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
31 currently pending
Career history
371
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
59.6%
+19.6% vs TC avg
§102
24.7%
-15.3% vs TC avg
§112
12.1%
-27.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 340 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 2 is objected to because of the following informalities: line 2 of the claim presents the limitation “the first switch” which should be corrected to “a first switch” and the second to last line of the claim presents “a first switch” which should be corrected to “the first switch”. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1, 6-7, 13 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2011/0037435 (Funabashi). Regarding claim 1, Funabashi teaches a discharging system comprising a battery pack (Fig. 1 shows battery pack 5) and a power tool (Fig. 1 shows power tool 1), wherein, the battery pack comprises a first positive terminal (Fig. 1 shows battery pack 5 having a first positive terminal 54), a first negative terminal (Fig. 1 shows battery pack 5 having a first negative terminal 55), a first controller (Fig. 1 shows battery cell voltage detector 530) and a first state detection terminal (Fig. 1 battery cell voltage detector 530 having overcurrent/overdischarge output terminal 56 i.e. first state detection terminal) connected to the first controller (Fig. 1 shows battery cell voltage detector 530 having overcurrent/overdischarge output terminal 56 i.e. first state detection terminal connected to it) [0029-0030]; and the power tool (Fig. 1 shows power tool 1) comprises a second positive terminal (Fig. 1 shows power tool 1 having a second positive terminal 54) and a second negative terminal (Fig. 1 shows power tool 1 having a second negative terminal 55); the second positive terminal and the second negative terminal are electrically in contact with the first positive terminal and the first negative terminal of the battery pack (Fig. 1 shows second positive terminal and second negative terminal are electrically in contact with the first positive terminal and the first negative terminal), respectively, wherein: the power tool (Fig. 1 shows power tool 1) comprises a second controller (Fig. 1 shows controller 4), a power supply module (Fig. 1 shows switch 31) for supplying power to the second controller (Fig. 1 shows controller 4 receives current I) [0042] and a power-on module (Fig. 1 shows main current switch circuit 41) connected to the power supply module (Fig. 1 shows switch 31 connected to main current switch circuit 41) [0035, 0038], the power-on module (Fig. 1 shows main current switch circuit 41) is connected to the first state detection terminal (Fig. 1 shows overcurrent/overdischarge output terminal 56 is connected to main current switch circuit 41) [0036] when the battery pack (Fig. 1 shows battery pack 5) is assembled to the power tool (Fig. 1 shows battery pack 5 being assembled on the power tool 1), and the first state detection terminal (Fig. 1 shows overcurrent/overdischarge output terminal 56) controls on/off of the power-on module based on a state of the battery pack to control whether the power tool is powered on (FET 410 of main current switch circuit 41 is in ON/OFF states based on signal from overcurrent/overdischarge output terminal 56 based on a state of the battery pack 5 thereby makes or breaks the power supply to the motor 2 i.e. whether power tool is powered on) [0036-0037, 0043]. Regarding claim 6, Funabashi teaches wherein the first state detection terminal (Fig. 1 shows overcurrent/overdischarge output terminal 56 i.e. first state detection terminal) is connected to the first positive terminal (Fig. 1 shows overcurrent/overdischarge output terminal 56 connected to first positive terminal 54), and the first state detection terminal (Fig. 1 shows overcurrent/overdischarge output terminal 56) comprises a protection switch connected to the first controller (Fig. 1 shows switch 58 connected to battery cell voltage detector 530 i.e. first controller). Regarding claim 7, Funabashi teaches wherein the first state detection terminal is connected to an output port of the first controller (Fig. 1 shows overcurrent/overdischarge output terminal 56 is connected to an output port of battery protection IC 53) [0028]. Regarding claim 13, Funabashi teaches a power tool (Fig. 1 shows power tool 1) detachably connected to a battery pack (Fig. 1 shows battery pack 5 detachably connected to power tool 1), the power tool (Fig. 1 shows power tool 1) comprising a second positive terminal electrically connected to a first positive terminal of the battery pack (Fig. 1 shows second positive terminal 54 electrically connected to first positive terminal 54 of the battery pack 5), and a second negative terminal electrically connected to a first negative terminal of the battery pack (Fig. 1 shows second negative terminal electrically connected to a first negative terminal 55 of the battery pack 5); wherein the power tool (Fig. 1 shows power tool 1) comprises: a second controller (Fig. 1 shows controller 4); a power supply module (Fig. 1 shows switch 31) configured to supply power to the second controller (Fig. 1 shows controller 4 receives current I) [0042]; a power-on module (Fig. 1 shows main current switch circuit 41) connected to the power supply module (Fig. 1 shows switch 31), and configured to control on/off of the power-on module according to a state of the battery pack to control whether the power tool is powered on (FET 410 of main current switch circuit 41 is in ON/OFF states based on signal from overcurrent/overdischarge output terminal 56 based on a state of the battery pack 5 thereby makes or breaks the power supply to the motor 2 i.e. whether power tool is powered on) [0036-0037, 0043]. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2-5, 14-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2011/0037435 (Funabashi) in view of JP 2012115958 (Aradate). Regarding claim 2, Funabashi teaches wherein the power-on module (Fig. 1 shows main current switch circuit 41) and the first switch (Fig. 1 shows switch 420 i.e. first switch) are disposed in the power tool (Fig. 1 shows main current switch circuit and switch 420 disposed in the power tool 1), the power-on module (Fig. 1 shows main current switch circuit 41 having contact point A) comprises a second state detection terminal connected to the first state detection terminal (Fig. 1 shows overcurrent/overdischarge output terminal 56 on the power tool 1 side being the second state detection terminal connected to the battery side of the terminal 56 i.e. first state detection terminal), the second state detection terminal is connected to a first switch (Fig. 1 shows overcurrent/overdischarge output terminal 56 on the power tool 1 side i.e. second state detection terminal is connected to switch 420 i.e. first switch). However, Funabashi does not teach the first switch is connected to a second switch, and the second switch is connected to the second positive terminal and the power supply module. However, Aradate teaches the first switch (Fig. 3 shows FET 2q i.e. first switch) is connected to a second switch (Fig. 3 shows FET 2K), and the second switch (Fig. 3 shows FET 2k) is connected to the second positive terminal (Fig. 3 shows positive terminal on the power tool 2 side being connected to FET 2k) and the power supply module (Fig. 3 shows FET 2c) [Page 7 ¶ 3-4]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have the first switch is connected to a second switch, and the second switch is connected to the second positive terminal and the power supply module as taught by Aradate in order to protect the circuitry from damage. Regarding claim 3, Funabashi teaches wherein the power supply module (Fig. 1 shows switch 31) comprises a switch circuit (Fig. 1 shows switch 31). However, Funabashi does not teach a voltage stabilizing circuit, and the switch circuit is connected to the voltage stabilizing circuit. However, Arabate teaches a voltage stabilizing circuit (Fig. 3 shows constant voltage circuit 2o), and the switch circuit is connected to the voltage stabilizing circuit (Fig. 3 shows constant voltage circuit 2o electrically connected to FET 2c). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have a voltage stabilizing circuit, and the switch circuit is connected to the voltage stabilizing circuit as taught by Arabate in order to protect the circuitry from current spikes and subsequent damages to the circuitry due to such overcurrent or over voltage. Regarding claim 4, Funabashi does not teach wherein the switch circuit comprises a third switch and a fourth switch, a base of the third switch is connected to the second switch, a collector of the third switch is connected to an emitter of the fourth switch, a base of the fourth switch and the second positive terminal, and a collector of the fourth switch is connected to the voltage stabilizing circuit. However, Aradate teaches wherein the switch circuit comprises a third switch (Fig. 3 shows FET 2h) and a fourth switch (Fig. 3 shows FET 2f), a base of the third switch (Fig. 3 shows base of FET 2h) is connected to the second switch (Fig. 3 shows FET 2k), a collector of the third switch (Fig. 3 shows collector of FET 2h) is connected to an emitter of the fourth switch (Fig. 3 shows emitter of FET 2f), a base of the fourth switch (Fig. 3 shows base of FET 2f) and the second positive terminal (Fig. 3 shows second positive terminal electrically connected to FET 2f base), and a collector of the fourth switch (Fig. 3 shows collector of FET 2f) is connected to the voltage stabilizing circuit (Fig. 3 shows constant voltage circuit 2o electrically connected to collector of FET 2f). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have the switch circuit comprises a third switch and a fourth switch, a base of the third switch is connected to the second switch, a collector of the third switch is connected to an emitter of the fourth switch, a base of the fourth switch and the second positive terminal, and a collector of the fourth switch is connected to the voltage stabilizing circuit as taught by Aradate in order to ensure that the circuitry is protected from damage due to current spikes. Regarding claim 5, Funabashi does not teach wherein the power tool comprises a trigger, and the trigger is disposed on the second positive terminal and located between the power supply module and the power-on module. However, Arabate teaches wherein the power tool (Fig. 3 shows power tool 2) comprises a trigger (Fig. 3 shows trigger 2a), and the trigger (Fig. 3 shows trigger 2a) is disposed on the second positive terminal (Fig. 3 shows trigger 2a disposed on second positive terminal) and located between the power supply module (Fig. 3 shows switch 2c) and the power-on module (Fig. 3 shows power-on module comprising first and second switches 2k and 2q). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have wherein the power tool comprises a trigger, and the trigger is disposed on the second positive terminal and located between the power supply module and the power-on module as taught by Aradate in order to ensure that the power tool is operated with safety avoiding circuitry damage. Regarding claim 14, Funabashi teaches wherein the power-on module comprises a second state detection terminal (Fig. 1 shows main current switch circuit 41 with overcurrent/overdischarge output terminal 56 on the power tool 1 side being the second state detection terminal), the second state detection terminal is connected to a first switch (Fig. 1 shows overcurrent/overdischarge output terminal 56 on the power tool 1 side i.e. second state detection terminal is connected to switch 420 i.e. first switch). However, Funabashi does not teach the first switch is connected to a second switch, and the second switch is connected to the second positive terminal and the power supply module. However, Aradate teaches the first switch (Fig. 3 shows FET 2q i.e. first switch) is connected to a second switch (Fig. 3 shows FET 2K), and the second switch (Fig. 3 shows FET 2k) is connected to the second positive terminal (Fig. 3 shows positive terminal on the power tool 2 side being connected to FET 2k) and the power supply module (Fig. 3 shows FET 2c) [Page 7 ¶ 3-4]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have the first switch is connected to a second switch, and the second switch is connected to the second positive terminal and the power supply module as taught by Aradate in order to protect the circuitry from damage. Regarding claim 15, Funabashi teaches wherein the power supply module (Fig. 1 shows switch 31) comprises a switch circuit (Fig. 1 shows switch 31). However, Funabashi does not teach a voltage stabilizing circuit, and the switch circuit is connected to the voltage stabilizing circuit. However, Arabate teaches a voltage stabilizing circuit (Fig. 3 shows constant voltage circuit 2o), and the switch circuit is connected to the voltage stabilizing circuit (Fig. 3 shows constant voltage circuit 2o electrically connected to FET 2c). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have a voltage stabilizing circuit, and the switch circuit is connected to the voltage stabilizing circuit as taught by Arabate in order to protect the circuitry from current spikes and subsequent damages to the circuitry due to such overcurrent or over voltage. Regarding claim 16, Funabashi does not teach wherein the switch circuit comprises a third switch and a fourth switch, a base of the third switch is connected to the second switch, a collector of the third switch is connected to an emitter of the fourth switch, a base of the fourth switch and the second positive terminal, and a collector of the fourth switch is connected to the voltage stabilizing circuit. However, Aradate teaches wherein the switch circuit comprises a third switch (Fig. 3 shows FET 2h) and a fourth switch (Fig. 3 shows FET 2f), a base of the third switch (Fig. 3 shows base of FET 2h) is connected to the second switch (Fig. 3 shows FET 2k), a collector of the third switch (Fig. 3 shows collector of FET 2h) is connected to an emitter of the fourth switch (Fig. 3 shows emitter of FET 2f), a base of the fourth switch (Fig. 3 shows base of FET 2f) and the second positive terminal (Fig. 3 shows second positive terminal electrically connected to FET 2f base), and a collector of the fourth switch (Fig. 3 shows collector of FET 2f) is connected to the voltage stabilizing circuit (Fig. 3 shows constant voltage circuit 2o electrically connected to collector of FET 2f). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have the switch circuit comprises a third switch and a fourth switch, a base of the third switch is connected to the second switch, a collector of the third switch is connected to an emitter of the fourth switch, a base of the fourth switch and the second positive terminal, and a collector of the fourth switch is connected to the voltage stabilizing circuit as taught by Aradate in order to ensure that the circuitry is protected from damage due to current spikes. Regarding claim 17, Funabashi does not teach wherein the power tool comprises a trigger, and the trigger is disposed on the second positive terminal and located between the power supply module and the power-on module. However, Arabate teaches wherein the power tool (Fig. 3 shows power tool 2) comprises a trigger (Fig. 3 shows trigger 2a), and the trigger (Fig. 3 shows trigger 2a) is disposed on the second positive terminal (Fig. 3 shows trigger 2a disposed on second positive terminal) and located between the power supply module (Fig. 3 shows switch 2c) and the power-on module (Fig. 3 shows power-on module comprising first and second switches 2k and 2q). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have wherein the power tool comprises a trigger, and the trigger is disposed on the second positive terminal and located between the power supply module and the power-on module as taught by Aradate in order to ensure that the power tool is operated with safety avoiding circuitry damage. Claim(s) 8-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2011/0037435 (Funabashi) in view of JP 2012115958 (Aradate) further in view of US 2020/0127339 (Nakano). Regarding claim 8, Funabashi teaches wherein the first controller (Fig. 1 shows battery protection IC 53) is configured to detect state of the battery pack (battery protection IC 53 detect state of the battery pack 51) [0029-0031], and determine whether the battery pack is normal based on a voltage of each battery cell and a temperature of the battery pack (battery protection IC 53 detects whether the batter pack 51 is normal based on a voltage of each battery cell i.e. detecting overcurrent and a temperature of the battery pack i.e. overdischarge) [0004, 0012, 0028, 0037]. However, Funabashi and Arabate does not teach wherein a source of the protection switch is connected to the first positive terminal, a gate of the protection switch is connected to an input terminal of the first controller through a transistor, and a drain of the protection switch is connected to the first state detection terminal. However, Nakano teaches wherein a source of the protection switch (Fig. 13 shows source of FET M41) is connected to the first positive terminal (Fig. 13 shows source of M41 connected to first positive terminal), a gate of the protection switch (Fig. 13 shows gate of protection switch M41) is connected to an input terminal of the first controller (Fig. 13 shows gate of M41 electrically connected to an input terminal of the protection IC 300 i.e. first controller) through a transistor (Fig. 13 shows transistor M31), and a drain of the protection switch is connected to the first state detection terminal (Fig. 13 shows drain of the protection switch M41 is electrically connected to the first state detection terminal) [0088, 0093]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have a source of the protection switch is connected to the first positive terminal, a gate of the protection switch is connected to an input terminal of the first controller through a transistor, and a drain of the protection switch is connected to the first state detection terminal as taught by Nakano in order to ensure that the circuitry of the battery pack is protected from damages from overcurrent and overdischarge. Regarding claim 9, Funabashi and Arabate does not teach wherein the first controller is configured to control the transistor to be turned on to turn on the protection switch when the battery pack is determined to be normal. However, Nakano teaches wherein the first controller is configured to control the transistor to be turned on to turn on the protection switch when the battery pack is determined to be normal (Fig. 13 shows IC 300 configured to control transistor M31 to be turned on to turn on the M41 when battery pack 146 is determined to be not abnormal) [0087-0088, 0093, 0099, 0113]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have the first controller is configured to control the transistor to be turned on to turn on the protection switch when the battery pack is determined to be normal as taught by Nakano in order to ensure that the circuitry is protected from battery overdischarge or overcurrent. Regarding claim 10, Funabashi and Arabate does not teach wherein the first controller is configured to control the transistor to be turned off to turn off the protection switch when the battery pack is determined to be abnormal. However, Nakano teaches wherein the first controller is configured to control the transistor to be turned off to turn off the protection switch when the battery pack is determined to be abnormal (Fig. 13 shows IC 300 configured to control the transistor M31 to be turned off to turn off the M41 when the battery pack 146 is determined to be abnormal) [0087-0088, 0093, 0099, 0113]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have first controller is configured to control the transistor to be turned off to turn off the protection switch when the battery pack is determined to be abnormal as taught by Nakano in order to protect the circuitry from damage due to overcurrent and overdischarge of the battery pack. Allowable Subject Matter Claims 11-12, 18-20 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SWARNA N CHOWDHURI whose telephone number is (571)431-0696. The examiner can normally be reached Mon-Fri 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rexford Barnie can be reached at 571-272-7496. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. SWARNA N. CHOWDHURI Examiner Art Unit 2836 /S.N.C/Examiner, Art Unit 2836 /DANIEL CAVALLARI/Primary Examiner, Art Unit 2836
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Prosecution Timeline

Aug 12, 2024
Application Filed
Dec 23, 2025
Non-Final Rejection — §102, §103
Apr 01, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
98%
With Interview (+21.8%)
3y 1m
Median Time to Grant
Low
PTA Risk
Based on 340 resolved cases by this examiner. Grant probability derived from career allow rate.

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