Prosecution Insights
Last updated: July 17, 2026
Application No. 18/837,696

THIN FILM CAPACITOR AND ELECTRONIC CIRCUIT BOARD HAVING THE SAME

Non-Final OA §102§103§112
Filed
Aug 12, 2024
Priority
Feb 16, 2022 — provisional 63/310,715 +1 more
Examiner
MCFADDEN, MICHAEL P
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
TDK Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
719 granted / 834 resolved
+18.2% vs TC avg
Strong +20% interview lift
Without
With
+20.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
13 currently pending
Career history
845
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
87.4%
+47.4% vs TC avg
§102
8.9%
-31.1% vs TC avg
§112
0.8%
-39.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 834 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Specification The disclosure is objected to because of the following informalities: The specification does not include labels for the drawings. Appropriate correction is required. Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: Most drawing numbers are not referenced in the specification and it is unclear which elements correspond to what. Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 10 recites the limitation "the TiC film" in line 2. There is insufficient antecedent basis for this limitation in the claim. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4 and 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by SHIOGA et al (US 2008/0068780). Regarding claim 1, SHIOGA discloses a thin film capacitor (Fig. 1-6) comprising: a metal foil (Fig. 4, 12) having a roughened surface (Fig. 5); a dielectric film (Fig. 4, 13) covering the roughened surface of the metal foil and having an opening (Fig. 4, gaps in 13) partially exposing the metal foil therethrough (Fig. 4-5); a first electrode layer (Fig. 4, 21) contacting the metal foil through the opening (Fig. 4); and a second electrode layer (Fig. 4, 14) contacting the dielectric film without contacting the metal foil (Fig. 4), wherein an upper surface position of the second electrode layer is equal to or lower in height than an upper surface position of the first electrode layer (Fig. 4, 14 is lower than 21). Regarding claim 2, SHIOGA further discloses an insulating member (Fig. 4, 16) positioned between the first and second electrode layers (Fig. 4), wherein the upper surface position of the second electrode layer is equal to or lower in height than an upper surface position of the insulating member (Fig. 4). Regarding claim 3, SHIOGA discloses a thin film capacitor (Fig. 1-6) comprising: a metal foil (Fig. 4, 12) having a roughened surface (Fig. 5); a dielectric film (Fig. 4, 13) covering the roughened surface of the metal foil and having an opening (Fig. 4, gaps in 13) partially exposing the metal foil therethrough (Fig. 4-5); a first electrode layer (Fig. 4, 21) contacting the metal foil through the opening (Fig. 4); a second electrode layer (Fig. 4, 14) contacting the dielectric film without contacting the metal foil (Fig. 4); and an insulating member (Fig. 4, 16) positioned between the first and second electrode layers (Fig. 4), wherein an upper surface position of the second electrode layer is equal to or lower in height than an upper surface position of the insulating member (Fig. 4, 14 is below the top of 16). Regarding claim 4, SHIOGA further discloses that wherein the upper surface of the second electrode layer has a recessed shape reducing in height with distance from the upper surface of the insulating member (Fig. 4, the flat top reduces and rise in height and therefore teaches the claim limitations as it is considered a “recessed shape reducing in height” as no further limiting structure is needed). Regarding claim 11, SHIOGA further discloses an electronic circuit board (Fig. 10) comprising: a substrate (Fig. 10, 51) having a wiring pattern (Fig. 10, 54); a semiconductor IC (Fig. 10, 52) and the thin film capacitor as claimed in claim 1 (as shown above) provided in the substrate (Fig. 10), wherein the first and second electrode layers of the thin film capacitor are connected to the semiconductor IC through the wiring pattern (Fig. 4 and 10). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over SHIOGA et al (US 2008/0068780) in view of ABURAKAWA et al (US 2020/0135406). Regarding claim 5, SHIOGA fails to teach the claim limitations. ABURAKAWA teaches that an upper surface position of the first electrode layer (Fig. 9, 16) is lower in height than the upper surface position of the insulating member (Fig. 9, 23). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to combine the teachings of ABURAKAWA to the invention of SHIOGA, in order to provide a thin film capacitor having a reduced thickness and an excellent heat dissipation property (ABURAKAWA [0022]). Regarding claim 6, SHIOGA, as modified by ABURAKAWA, further teaches that the upper surface of the first electrode layer has a recessed shape reducing in height with distance from the upper surface of the insulating member (ABURAKAWA Fig. 9, the flat top reduces and rise in height and therefore teaches the claim limitations as it is considered a “recessed shape reducing in height” as no further limiting structure is needed). Claim(s) 8-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over SHIOGA et al (US 2008/0068780) in view of Fujii et al (US 2019/0080849). Regarding claim 8, SHIOGA fails to teach the claim limitations. Fujii teaches that the second electrode layer (Fig. 11, 103/104) includes a first conductive member (Fig. 11, 103) contacting the dielectric film (Fig. 11, 102) and made of a conductive polymer material ([0004]) and a second conductive member (Fig. 11, 104) connected to the first conductive member and made of a metal material ([0004]). It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to combine the teachings of Fujii to the invention of SHIOGA, in order to construct the devices using known materials in the art to meet user needs based on known material properties and availability of those materials. The use of conventional materials/components to perform their known function is obvious. MPEP 2144.06. Regarding claim 9, SHIOGA, as modified by ABURAKAWA, further teaches that the second electrode layer further includes a close-contact layer (Fig. 9, 18) positioned between the first and second conductive members (Fig. 9). Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over SHIOGA et al (US 2008/0068780) in view of Fujii et al (US 2019/0080849) in further view of AMO (US 2016/0268445). Regarding claim 10, SHIOGA fails to teach the claim limitations. AMO teaches that the close-contact layer is made of a TiC film ([0139]), a TaC film, a composite film of the TiC film and TaC film, or a composite film of a carbon film, a WC film, and a Cr film. It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to combine the teachings of AMO to the invention of SHIOGA, in order to construct the devices using known materials in the art to meet user needs based on known material properties and availability of those materials. The use of conventional materials/components to perform their known function is obvious. MPEP 2144.06. Allowable Subject Matter Claims 7 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claims 7 and 12, the prior art fails to teach or make obvious, alone or in combination, the limitation of “wherein the insulating member has a lower insulating region contacting the dielectric film and having a first width between the first and second electrode layers and an upper insulating region positioned on the lower insulating region and having a second width between the first and second electrode layers smaller than the first width to make the first and second electrode layers have a dual damascene structure” in combination with the other claim limitations. Additional Relevant Prior Art: LIM et al (US 2017/0330688) teaches relevant art in Fig. 1-2. HIRAOKA et al (US 2021/0257164) teaches relevant art in Fig. 1-3. ABURAKAWA et al (US 2021/0265116) teaches relevant art in Fig. 1-11. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL P MCFADDEN whose telephone number is (571)270-5649. The examiner can normally be reached M-Thur 8am-9pm PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL P MCFADDEN/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Aug 12, 2024
Application Filed
Jun 22, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
99%
With Interview (+20.0%)
2y 2m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 834 resolved cases by this examiner. Grant probability derived from career allowance rate.

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