DETAILED ACTION
Claims 1-6 are presented for examination.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings were received on 08/16/2024. These drawings are acceptable.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested.
“An electronic device configured to perform a zero-padding operation and a discrete Fourier transformation spreading operation”
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1 and 6 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 3 of U.S. Patent No. 12,609,855.
Note that the applicant filing of the continuing application is voluntary and not the direct, unmodified result of restriction requirement under 35 U.S.C. 121 (i.e. without a restriction requirement by the examiner) and the claims of the second application are drawn to the “same invention” as the first application or patent. Moreover, although the conflicting claims are not identical, they are not patentably distinct from each other because the claims of the instant application merely broadens the scope of the claims of the Patent by eliminating the elements and their functions of the claims, and the claims of this instant application are therefore and obvious variant thereof.
Instant Application 18/839358
U.S. Patent No. 12,609,855
Claim 1: An electronic device comprising:
Claim 1: An electronic device, comprising:
an input unit configured to obtain a first sequence comprising Q elements, the Q being an integer greater than 0;
an input unit configured to obtain a sequence to be compressed, wherein the sequence to be compressed has Q time-domain symbol elements, and Q is an integer greater than zero;
a control unit configured to perform a zero-padding operation and a discrete Fourier transformation spreading operation on the first sequence to determine an extension sequence, and perform a data deletion operation based on the extension sequence to determine a second sequence, wherein the second sequence comprises M elements, the M being an integer greater than 0, and the M being greater than the Q.
a processing unit configured to perform a zero-padding operation on the sequence to be compressed according to at least a part of a compression factor to determine a zero-embedded sequence, perform a discrete Fourier transform spreading operation according to the zero-embedded sequence to determine a spread sequence, and perform at least one of a data deletion operation and a data superimposition operation based on the spread sequence to determine a compressed sequence, wherein the compressed sequence has M frequency-domain symbols, M is an integer greater than zero, and M is less than or equal to Q.
Claim 6 discloses similar limitations as claim 3 of the patent and is therefore rejected for the same reason as indicated above.
Claim Interpretation
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “input unit; control unit” in claim 1.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, and 6 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Azadet et al., (hereinafter Azadet), U.S. Publication No. 2009/0083352.
As per claim 1, Azadet discloses an electronic device [paragraphs 0006, 0014, 0054, an electronic device (an apparatus)] comprising:
an input unit [fig. 1, paragraphs 0053, 0054, an input unit (circuit elements - one or more of an integrated circuit)] configured to obtain a first sequence comprising Q elements, the Q being an integer greater than 0 [Abstract, paragraphs 0007, 0015, 0017, 0025, 0048, 0050, obtain a first sequence comprising Q elements, the Q being an integer greater than 0 (input sequence of length N; when N is a large prime number)];
a control unit [fig. 1, paragraphs 0053, 0054, a control unit (a general-purpose processor)] configured to perform a zero-padding operation and a discrete Fourier transformation spreading operation on the first sequence to determine an extension sequence [Abstract, paragraphs 0017, 0025, 0050, perform a zero-padding operation and a discrete Fourier transformation spreading operation on the first sequence to determine an extension sequence (DFT for cyclic and zero padded input sequences for extended input sequences; input sequence of length N can be extended to an extended input sequence of length M, by employing a zero padding technique)], and perform a data deletion operation based on the extension sequence to determine a second sequence [Abstract, paragraphs 0017, 0042, 0048, 0051, perform a data deletion operation based on the extension sequence to determine a second sequence (extending said input sequence to an extended input sequence; filter length can be changed; performing reduced complexity discrete Fourier transforms using interpolation)], wherein the second sequence comprises M elements, the M being an integer greater than 0, and the M being greater than the Q [Abstract, paragraphs 0006, 0017, 0042, 0048, 0050, 0051, the second sequence comprises M elements, the M being an integer greater than 0, and the M being greater than the Q (an extended input sequence of length M, where M is greater than N (a power of two greater than N))].
As per claim 2, Azadet discloses the electronic device according to claim 1, further comprising:
a receiving unit configured to receive extension information, wherein the control unit performs at least one of the zero-padding operation and the data deletion operation according to the extension information [fig. 1, 2, Abstract, paragraphs 0007, 0017, 0018, 0025, 0033, 0042, 0048, a receiving unit configured to receive extension information, wherein the control unit performs at least one of the zero-padding operation and the data deletion operation according to the extension information (an extended input sequence of length M, for example, by employing a zero padding technique, a cyclic extension technique, a windowing of a cyclic extended sequence technique or a resampling-based interpolation technique to extend the input sequence; extends the finite-domain discrete-time input signal of length N to a length M, leads to an interpolated DFT result)].
As per claim 6, Azadet discloses a data processing method, comprising:
an input step configured to obtain a first sequence comprising Q elements, the Q being an integer greater than 0 [Abstract, paragraphs 0007, 0015, 0017, 0025, 0048, 0050, an input step configured to obtain a first sequence comprising Q elements, the Q being an integer greater than 0 (input sequence of length N; when N is a large prime number)];
a processing step configured to perform a zero-padding operation and a discrete Fourier transformation spreading operation on the first sequence to determine an extension sequence [Abstract, paragraphs 0017, 0025, 0050, a processing step configured to perform a zero-padding operation and a discrete Fourier transformation spreading operation on the first sequence to determine an extension sequence (DFT for cyclic and zero padded input sequences for extended input sequences; input sequence of length N can be extended to an extended input sequence of length M, by employing a zero padding technique)], and perform a data deletion operation based on the extension sequence to determine a second sequence [Abstract, paragraphs 0017, 0042, 0048, 0051, perform a data deletion operation based on the extension sequence to determine a second sequence (extending said input sequence to an extended input sequence; filter length can be changed; performing reduced complexity discrete Fourier transforms using interpolation)], wherein the second sequence comprises M elements, the M being an integer greater than 0, and the M being greater than the Q [Abstract, paragraphs 0006, 0017, 0042, 0048, 0050, 0051, the second sequence comprises M elements, the M being an integer greater than 0, and the M being greater than the Q (an extended input sequence of length M, where M is greater than N (a power of two greater than N))].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Azadet, in view of Nasarre et al., (hereinafter Nasarre), NPL “Enhanced Uplink Coverage for 5G NR: Frequency-Domain Spectral Shaping With Spectral Extension” (IDS 11/14/2024).
As per claim 3, Azadet discloses the electronic device according to claim 2, Azadet does not explicitly discloses wherein the extension information indicates an extension factor, wherein the extension factor is a ratio of the M to the Q.
However, Nasarre teaches wherein the extension information indicates an extension factor, wherein the extension factor is a ratio of the M to the Q [page 1201, section E, wherein the extension information indicates an extension factor, wherein the extension factor is a ratio of the M to the Q (wherein the extension information indicates an extension factor, wherein the extension factor is a ratio of the M to the Q (α denotes the extension factor that can be expressed as α= Q/M))].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to improve upon the device described in Azadet by including an extension factor as taught by Nasarre because it would provide the Azadet's device with the enhanced capability of improving coverage [Nasarre, page 1189, 1202].
As per claim 4, Azadet discloses the electronic device according to claim 2, Azadet does not explicitly discloses wherein the extension information indicates at least one of a first extension parameter and a second extension parameter, wherein a ratio of the first extension parameter to the second extension parameter is equal to the ratio of the M to the Q.
However, Nasarre teaches wherein the extension information indicates at least one of a first extension parameter and a second extension parameter, wherein a ratio of the first extension parameter to the second extension parameter is equal to the ratio of the M to the Q [page 1201, section E, wherein the extension information indicates at least one of a first extension parameter and a second extension parameter, wherein a ratio of the first extension parameter to the second extension parameter is equal to the ratio of the M to the Q (wherein the extension information indicates an extension factor, wherein the extension factor is a ratio of the M to the Q (α denotes the extension factor that can be expressed as α= Q/M))].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to improve upon the device described in Azadet by including an extension factor as taught by Nasarre because it would provide the Azadet's device with the enhanced capability of improving coverage [Nasarre, page 1189, 1202].
As per claim 5, Azadet discloses the electronic device according to claim 2, Azadet does not explicitly discloses wherein, the receiving unit is configured to receive an indication of whether the data deletion operation being a single-side data deletion operation or a double-side data deletion operation.
However, Nasarre teaches wherein, the receiving unit is configured to receive an indication of whether the data deletion operation being a single-side data deletion operation or a double-side data deletion operation [page 1191, 1200, 1201, wherein, the receiving unit is configured to receive an indication of whether the data deletion operation being a single-side data deletion operation or a double-side data deletion operation (one side of the DFT output and both sides of the DFT output)].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to improve upon the device described in Azadet by including a single-side operation as taught by Nasarre because it would provide the Azadet's device with the enhanced capability of improving coverage [Nasarre, page 1189, 1202].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Berardinelli et al., U.S. Patent No. 9,544,173 discloses generating sequences for zero-tail discrete fourier transform (DFT)-spread-orthogonal frequency division multiplexing (OFDM) (ZT DFT-s-OFDM) reference signals.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACKIE ZUNIGA ABAD whose telephone number is (571)270-7194. The examiner can normally be reached Monday - Friday, 8:00am - 4:00pm.
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/JACKIE ZUNIGA ABAD/ Primary Examiner, Art Unit 2469
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