DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/26/2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2-4, 6, 10, 11 and 13-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miyamoto et al. U.S. Patent Publication No. 2008/0218451 (hereinafter Miyamoto) in view of Kim U.S. Patent Publication No. 2020/0074938 (hereinafter Kim) and further in view of Ahn et al. U.S. Patent Publication No. 2018/0182333 (hereinafter Ahn).
Consider claim 2, Miyamoto teaches a display device, comprising (Figure 1): a plurality of subpixels, each including a light-emitting element ([0050] and figure 2a, pixels): a first power supply unit and a second power supply unit, each electrically connected to each of the plurality of subpixels (Figure 2a, Vd and ground); a line memory configured to store degradation information ([0061-0062] and figure 4, MR2); and a control unit configured to: obtain, at time intervals, the degradation information on the plurality of subpixels ([0058-0059], detection of OLED and deteriorated), set a data signal to be supplied to each of the plurality of subpixels based on the degradation information ([0062], correction amount), determine, from the degradation information, a presence or an absence of a short circuit between the first power supply unit and the second power supply unit, calculate, for each of the plurality of subpixels, a difference between a degradation level indicated in current degradation information and a degradation level indicated in past degradation information ([0065], figure 7 and figure 9, it is possible to distinguish the normal pixel from the abnormal one in reference to the preliminarily obtained voltage-current property of the standard OLED device. [0066], short circuit in the OLED device (see also figures 2-3)), detect an abnormal subpixel for which the difference exceeds a threshold value (Figure 7, figure 9 and [0066], see current above I2 for abnormal), and perform: an operation to acquire the degradation information for each of a plurality of lines and to store the acquired degradation information in the line memory ([0061-0062] and figure 4, MR2), and an operation to determine the presence or the absence of the short circuit for each of the plurality of lines for every predetermined number of times degradation information acquisition operation are performed ([0051], abnormal pixels, short circuit. [0067], abnormal current. [0055] and [0061], each voltage-current property of the respective OLED devices 11 is measured for detecting the property of the OLED device 11 at every line).
Miyamoto does not appear to specifically disclose acquire the degradation information for each of a plurality of lines within one frame period.
However, in a related field of endeavor, Kim teaches light emitting display device (abstract) and further teaches acquire the degradation information for each of a plurality of lines within one frame period ([0049], the data driver may sense the sensing node of the subpixel in real time, during a non-display period of an image, or during an N frame (N is an integer of 1 or greater) and generate a sensing result. [0032], deviation (degradation)).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to acquire information within one frame period as taught by Kim in order to sense in real time as suggested in [0049].
Miyamoto does not appear to specifically disclose determine once for every predetermined number of times.
However, in a related field of endeavor, Ahn teaches diagnosing a short-circuit failure (abstract) and further teaches determine once for every predetermined number of times (Figure 9 and [0028], a short-circuit failure).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to determine short-circuit once as shown in figure 9 so that a short-circuit failure is sequentially checked for respective rows as suggested in [0028].
Consider claim 3, Miyamoto, Kim and Ahn teach all the limitations of claim 2. In addition, Miyamoto teaches in wherein, in a case that a total number of abnormal subpixels ([0050], number of the abnormal pixels) exceeds a first reference value, the presence of the short circuit is determined (Figure 2a, figure 7 and figure 9, abnormal).
Consider claim 4, Miyamoto, Kim and Ahn teach all the limitations of claim 2. In addition, Miyamoto teaches wherein the plurality of subpixels is arranged over a plurality of blocks (Figure 1 and [0061], detection is performed by each line), wherein in a case that a number of abnormal subpixels in the plurality of blocks exceeds a second reference value, the presence of the short circuit is determined ([0050], number of the abnormal pixels).
Consider claim 6, Miyamoto, Kim and Ahn teach all the limitations of claim 2.
Miyamoto does not appear to specifically disclose wherein each of the plurality of subpixels further includes a first transistor connecting to the light-emitting and the degradation level is a shift amount of an ON voltage of the first transistor.
However, in a related field of endeavor, Kim teaches a short detecting unit in [0084] and further teaches wherein each of the plurality of subpixels (Figure 1, SP) further includes a first transistor connecting to the light-emitting (Figure 6, DR and OLED) and the degradation level is a shift amount of an ON voltage of the first transistor ([0069], threshold voltage of the driving transistor).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to detect a shift amount of the transistor as taught by Kim with the benefit that when the threshold voltage is changed, a compensation value is generated so as to have a value before the change as suggested in [0069].
Consider claim 10, Miyamoto, Kim and Ahn teach all the limitations of claim 6. In addition, Miyamoto teaches a plurality of data signal lines (Figure 4, data 6. Plurality of data for the corresponding pixels/subpixels), wherein each of the plurality of subpixels further includes a second transistor connected to the first transistor and to one of the plurality of data signal lines (Figure 5 and [0058], SWA).
Consider claim 11, Miyamoto, Kim and Ahn teach all the limitations of claim 6. In addition, Miyamoto teaches wherein the first transistor is connected to the first power supply unit (Figure 5, 12 and corresponding high supply (see Vd in figure 2a)).
Consider claim 13, Miyamoto, Kim and Ahn teach all the limitations of claim 2. In addition, Miyamoto teaches wherein the control unit is configured to calculate, for each of the plurality of subpixels, the difference between the degradation level indicated in the current degradation information and a degradation level indicated in previous degradation information ([0065], figure 7 and figure 9, it is possible to distinguish the normal pixel from the abnormal one in reference to the preliminarily obtained voltage-current property of the standard OLED device)
Miyamoto does appear to specifically disclose the threshold value is 0.5 to 2 times the degradation level indicated in the previous degradation information.
However, Miyamoto teaches abnormal level above a normal range in figure 9. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a particular threshold in order to meet design choices. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art, In re Aller, 105 USPQ 233 (C.C.P.A. 1955).
Consider claim 14, Miyamoto, Kim and Ahn teach all the limitations of claim 2. In addition, Miyamoto teaches wherein the first power supply unit is supplied with a high-potential power and the second power supply unit is supplied with a low-potential power (Figure 2a, Vd and ground (see also figure 5)).
Consider claim 15, Miyamoto, Kim and Ahn teach all the limitations of claim 14.
Miyamoto does not appear to disclose wherein, in a case that the presence of the short circuit is determined, the control unit is further configured to stop supplying at least one of the high-potential power or the low-potential power.
However, Kim teaches wherein, in a case that the presence of the short circuit is determined, the control unit is further configured to stop supplying at least one of the high-potential power or the low-potential power ([0090], block the operation of the power supply).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to block or stop power supply as taught by Kim in order to fire such as burnt as suggested in [0090].
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miyamoto, Kim and Ahn as applied to claim 10 above, and further in view of Yoo et al. U.S. Patent Publication No. 2011/0254871 (hereinafter Yoo).
Consider claim 12, Miyamoto, Kim and Ahn teach all the limitations of claim 10.
Miyamoto does not appear to specifically disclose wherein the control unit is further configured to calculate the shift amount from a sensing current flowing from the second transistor to the one of the plurality of data signal lines.
However, in a related field of endeavor, Yoo teaches display comprising pixels PX in figure 1 and further teaches wherein the control unit is further configured to calculate the shift amount from a sensing current flowing from the second transistor to the one of the plurality of data signal lines (Figure 3, [0063] and [0067], second transistor M3a, Dj).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a second transistor connected to a data line as taught by Yoo so that when the sensing transistor M3a is turned on, a pixel current Ids flows to the measurement resistor RDDa. Thus, the actual threshold voltage and actual mobility of the driving transistor M2 of each measured pixel is calculated as suggested in [0063] and [0067].
Response to Arguments
Applicant’s arguments with respect to claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument (see new reference Ahn).
Conclusion
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/ROBERTO W FLORES/Primary Examiner, Art Unit 2621