DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statement (lDS) submitted on August 21, 2024 is in compliance with the provisions of 37 CFR 1.97 and has been considered by the Examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 recites the limitation “said third phase final settling” in line 1. There is insufficient antecedent basis for this limitation in the claim. The Examiner believes that claim 14 should be amended to depend from claim 11, in order to provide proper antecedent support. For purposes of examination, claim 14 will be interpreted as best understood by the Examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 2, 3, and 10 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Joshi et al. (US Pub. 2008/0218614).
In regard to claim 1, note Joshi discloses a device for imaging having both integration time gain and readout gain comprising a plurality of pixels comprising a frame (paragraph 0027, and figure 1: 102, 104), each said pixel comprising a first integration time output, and a second integration time output, wherein a duration time of said first integration time output is shorter than a duration time of said second integration time output (paragraph 0024-0025; an array of pixels each operated during an integration period that is broken up into two integration stages where the second stage may be longer then the first stage), a Read Out Integrated Circuit (ROIC) comprising at least one column cell comprising a gain selection component wherein each of said first integration time output and said second integration time output are compared to a threshold, producing gain bits (paragraphs 0013, 0025, 0033, 0074, and figure 1: 114, 120, 125, 126; the readout circuitry 114, 120, 125, 126 receive and process the output signals from the pixels and samples each output at least twice, and compares each to a programmable threshold voltage, and if it meets the conditions, produces a gain bit), and an Analog to Digital Converter (ADC) producing data bits from said first integration time output and said second integration time output of each of said plurality of pixels, wherein said column cell outputs said data bits from said ADC and said gain bits for each of said plurality of said pixels (paragraphs 0033-0035, 0074, and figure 1: 125, 126; the ADC 125 receives signal from each integration period that is sampled from the column buffer signal and produces pixel output signals, wherein the pixel output signals are combined with gain bits after they are converted to digital signals sent to the output interface circuit 126).
In regard to claim 2, note Joshi discloses that each of said gain bits and said data bits is read out for each said pixel for each said frame (paragraphs 0013, 0025, 0033-0035, 0074, and figure 7: 706-712; each pixel is connected to a column buffer that sends an output signal comprising the gain bits and data bits, which is sent to the output interface circuit 126).
In regard to claim 3, note Joshi discloses that gain selection of said gain selection component is based on said first integration time output signal and said second integration time output signal of that pixel for that frame (paragraphs 0013, 0025, 0034, 0074, and figure 7: 706-708; the column buffer samples each pixel output signal, of each pixel array, at least twice during a first and second integration time, and selects the appropriate gain to compensate integration time).
In regard to claim 10, note Joshi discloses a method for imaging having both integration time gain and readout gain comprising receiving, at a plurality of pixels, photons from an image (paragraph 0027, and figure 1: 102, 104), providing a first, short, integration time output and a second, long, integration time output from each pixel of said plurality of pixels (paragraph 0024-0025; an array of pixels each operated during an integration period that is broken up into two integration stages where the second stage may be longer then the first stage), receiving said short integration time output and said long integration time output at a gain selection component of a column cell of a Read Out Integrated Circuit (ROIC), comparing, in said gain selection component of said column cell, said pixel long integration time output and a gain to at least one threshold (paragraphs 0013, 0025, 0033, 0074, and figure 1: 114, 120, 125, 126; the readout circuitry 114, 120, 125, 126 receive and process the output signals from the pixels and samples each output at least twice, and compares each to a programmable threshold voltage, and if it meets the conditions, produces a gain bit), determining a data bit output and a gain bit output from said comparison (paragraphs 0033-0035, 0074, figure 1: 125, 126, and figure 7: 712; the ADC 125 receives signal from each integration period that is sampled from the column buffer signal and produces pixel output signals, wherein the pixel output signals are combined with gain bits after they are converted to digital signals sent to the output interface circuit 126), whereby a dynamic range of said imaging method is extended (paragraph 0025; the operation of the imaging method prevents saturation and thereby increases dynamic range).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Joshi et al. (US Pub. 2008/0218614), in view of Hammer et al. (US Pub. 2021/0377461).
In regard to claim 4, note Joshi discloses a device for imaging, as discussed with respect to claim 1 above. Therefore, it can be seen that the primary reference fails to explicitly disclose that said gain bits comprise two bits and said data bits comprise 14 bits.
In analogous art, Hammer discloses an imaging device that includes the use of gain bits comprising two bits and said data bits comprising 14 bits (paragraphs 0115-0120). Hammer teaches that the use of gain bits comprising two bits and said data bits comprising 14 bits is preferred in order to represent a plurality of selectable gains for the image data (paragraph 0115). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference such that said gain bits comprise two bits and said data bits comprise 14 bits, in order to represent a plurality of selectable gains for the image data, as suggested by Hammer.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Joshi et al. (US Pub. 2008/0218614), in view of Sun et al. (US Pub. 2014/0197878).
In regard to claim 5, note Joshi discloses a device for imaging, as discussed with respect to claim 1 above. Therefore, it can be seen that the primary reference fails to explicitly disclose that said pixel comprises direct injection input with two Sample-and-Holds (SHs).
In analogous art, Sun discloses an imaging device having pixels comprising direct injection input with two Sample-and-Holds (paragraph 0039, 0044, and figure 1). The Examiner notes that the use of pixels comprising direct injection input with two Sample-and-Holds is commonly used in order to simplify circuit design by have a shared readout circuit for multiple pixel signals. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference such that said pixel comprises direct injection input with two Sample-and-Holds, in order to simplify circuit design by have a shared readout circuit for multiple pixel signals.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Joshi et al. (US Pub. 2008/0218614), in view of Malone et al. (US Pub. 2021/0377470).
In regard to claim 6, note Joshi discloses a device for imaging, as discussed with respect to claim 1 above. Therefore, it can be seen that the primary reference fails to explicitly disclose that said pixel comprises a 20 Me− well.
In analogous art, Malone discloses an imaging device having pixels that include a 20 Me− well (paragraph 0010, and figure 1). Malone teaches that the use of pixels having a 20 Me− well is preferred in order to allow for a large well capacity to reduce noise and increase storage available for longer integration of dim targets without saturation on bright parts of a scene (paragraphs 0010-0011). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference to include pixels having a 20 Me− well, in order to allow for a large well capacity to reduce noise and increase storage available for longer integration of dim targets without saturation on bright parts of a scene, as suggested by Malone.
Claims 12, 13, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Joshi et al. (US Pub. 2008/0218614), in view of Gulbransen et al. (US Pub. 2004/0169753).
In regard to claim 12, note Joshi discloses a method for imaging, as discussed with respect to claim 10 above. Therefore, it can be seen that the primary reference fails to explicitly disclose that said first phase readout gain selection comprises establishing said readout gain in a high gain configuration, comparing a value of said long integration time output to a readout gain threshold, if said long integration time output value is greater than said readout gain threshold, then switching said high readout gain to a low readout gain configuration.
In analogous art, Gulbransen discloses an imaging method, that include a first phase readout gain selection comprises establishing said readout gain in a high gain configuration (paragraphs 0040, 0043, figure 11B: 38A; high gain output corresponding to line 38A), comparing a value of said long integration time output to a readout gain threshold, if said long integration time output value is greater than said readout gain threshold, then switching said high readout gain to a low readout gain configuration (paragraphs 0040, 0043, and figures 8, 11B; if the high gain is greater than a threshold voltage, corresponding to a saturated condition, a lower gain sample is selected for use). Gulbransen teaches that the use of a first phase readout gain selection comprising establishing said readout gain in a high gain configuration comparing a value of said long integration time output to a readout gain threshold, if said long integration time output value is greater than said readout gain threshold, then switching said high readout gain to a low readout gain configuration is preferred in order to prevent saturated pixel signal from being used (paragraphs 0040, 0043). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference to include a first phase readout gain selection comprising establishing said readout gain in a high gain configuration comparing a value of said long integration time output to a readout gain threshold, if said long integration time output value is greater than said readout gain threshold, then switching said high readout gain to a low readout gain configuration, in order to prevent saturated pixel signal from being used, as suggested by Gulbransen.
In regard to claim 13, note Joshi discloses a method for imaging, as discussed with respect to claim 10 above. Therefore, it can be seen that the primary reference fails to explicitly disclose that said second phase integration time gain selection comprises comparing a value of said long integration time output multiplied by a readout gain to an integration time gain threshold, if said long integration time output value multiplied by said readout gain is greater than said integration time gain threshold, then switching to said short integration time output.
In analogous art, Gulbransen discloses an imaging method, that includes a second phase integration time gain selection comprises comparing a value of said long integration time output multiplied by a readout gain to an integration time gain threshold (paragraphs 0040, 0043, and figure 11B; a high gain output, amplified (multiplied) by CTIA 40A is compared to a voltage threshold), if said long integration time output value multiplied by said readout gain is greater than said integration time gain threshold, then switching to said short integration time output (paragraphs 0040, 0043, and figures 8, 11B; if the high gain is greater than a threshold voltage, corresponding to a saturated condition, a lower gain sample is selected for use). Gulbransen teaches that the use of a second phase integration time gain selection comprises comparing a value of said long integration time output multiplied by a readout gain to an integration time gain threshold, if said long integration time output value multiplied by said readout gain is greater than said integration time gain threshold, then switching to said short integration time output is preferred in order to prevent saturated pixel signal from being used (paragraphs 0040, 0043). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference to include a second phase integration time gain selection comprises comparing a value of said long integration time output multiplied by a readout gain to an integration time gain threshold, if said long integration time output value multiplied by said readout gain is greater than said integration time gain threshold, then switching to said short integration time output, in order to prevent saturated pixel signal from being used, as suggested by Gulbransen.
In regard to claim 17, note Joshi discloses a method for imaging, as discussed with respect to claim 10 above. Therefore, it can be seen that the primary reference fails to explicitly disclose that readout starts at a highest readout gain and lowers said gain if output exceeds said threshold.
In analogous art, Gulbransen discloses an imaging method, that includes readout that starts at a highest readout gain and lowers said gain if output exceeds said threshold (paragraphs 0040, 0043, and figures 8, 11B; if the high gain is greater than a threshold voltage, corresponding to a saturated condition, a lower gain sample is selected for use). Gulbransen teaches that having readout start at a highest readout gain and lowers said gain if output exceeds said threshold is preferred in order to prevent saturated pixel signal from being used (paragraphs 0040, 0043). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference such that readout starts at a highest readout gain and lowers said gain if output exceeds said threshold, in order to prevent saturated pixel signal from being used, as suggested by Gulbransen.
Allowable Subject Matter
Claims 7-9, 11, 15-16, and 18-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 14 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Claim 20 is allowed.
The following is a statement of reasons for the indication of allowable subject matter:
As for claim 20, the prior art does not teach or fairly suggest the use of a system for imaging having both integration time gain and readout gain comprising a plurality of pixels comprising a frame, each said pixel comprising a direct injection input with two Sample-and-Holds (SHs), a short integration time output, and a long integration time output, whereby said integration time gain extends a range to higher fluxes with shorter integration times, a Read Out Integrated Circuit (ROIC) comprising at least one column cell comprising a gain selection component wherein each of said short integration time output and said long integration time output are compared to a threshold producing gain bits, and an Analog to Digital Converter (ADC) producing data bits, wherein a first phase readout gain selection comprises establishing said readout gain in a high gain configuration, comparing a value of said long integration time output to a readout gain threshold, if said long integration time output value is greater than said readout gain threshold, then switching said high readout gain to a low readout gain configuration, wherein a second phase integration time gain selection comprises comparing a value of said long integration time output multiplied by a readout gain to an integration time gain threshold, if said long integration time output value multiplied by said readout gain is greater than said integration time gain threshold, then switching to said short integration time output, wherein a third phase final settling comprises maintaining a readout gain and an integration time gain, connecting to a capacitor of said sample-and-hold for final setting, outputting said gain bits, and outputting said data bits, wherein said column cell outputs said data bits from said ADC and said gain bits for each said pixel, whereby a dynamic range of said imaging device is extended, in conjunction with the other limitations of the claims.
Conclusion
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/CHRISS S YODER III/Examiner, Art Unit 2638
/LIN YE/Supervisory Patent Examiner, Art Unit 2638