Prosecution Insights
Last updated: July 17, 2026
Application No. 18/840,509

Display Substrate and Driving Method and Preparation Method Therefor, and Display Apparatus

Non-Final OA §102
Filed
Aug 22, 2024
Priority
Oct 26, 2023 — nonprovisional of PCTCN2023126746
Examiner
ZHENG, XUEMEI
Art Unit
2629
Tech Center
2600 — Communications
Assignee
Beijing Boe Technology Development Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
611 granted / 721 resolved
+22.7% vs TC avg
Moderate +14% lift
Without
With
+13.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
22 currently pending
Career history
743
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
62.3%
+22.3% vs TC avg
§102
9.1%
-30.9% vs TC avg
§112
25.0%
-15.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 721 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims The amendment filed on 8/22/2024 has been entered. In the amendment, Applicant amended claims 7, 14 and 17, cancelled claim 15. Currently claims 1-14 and 16-21 are pending. Claim Objections Claims 1, 16, 18 and 21 are objected to because of the following informalities: Claim 1, ll. 3 from the bottom of the claim: “in at least one circuit unit” should be changed to “in the at least one circuit unit”; Claim 16, ll. 4: “at least one circuit unit” should be changed to “the at least one circuit unit”; Claim 18, ll. 3 from the bottom of page 8: “in at least one circuit unit” should be changed to “in the at least one circuit unit”; Claim 21, ll. 3 from the bottom of the claim: “in at least one circuit unit” should be changed to “in the at least one circuit unit”. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3, 7 and 17-21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yang et al. (US 2021/0335235). Regarding claim 1, Yang teaches a display substrate (Fig. 4A: inherent substrate on which pixel circuits are disposed; Fig. 5: inherent substrate of electroluminescent display panel), comprising a plurality of circuit units (Fig. 4A: pixel circuit unit), wherein at least one circuit unit comprises a pixel driving circuit (Fig. 4A: a data writing circuit 1 and a light-emitting drive circuit 2 connectively form a pixel driving circuit), a sensing circuit (Fig. 4A: initialization circuit 4 and photosensitive drive circuit 5 collectively from a sensing circuit) and a photosensitive device (Fig. 4A: photosensitive device 7), the pixel driving circuit at least comprises a driving transistor (Fig. 4A: first drive transistor DTFT1) and at least one light emitting control transistor (Fig. 4A: fourth thin film transistor T4); a first end of the light emitting control transistor (Fig. 4A: upper terminal of T4) is connected to a first power supply line (Fig. 4A: first reference signal terminal VDD), and a second end of the light emitting control transistor (Fig. 4A: lower terminal of T4) is connected to a first end of the driving transistor (Fig. 4A: upper terminal of first drive transistor DTFT1); or the first end of the light emitting control transistor is connected to a second end of the driving transistor (Fig. 4A: upper terminal of T4 is connected to lower terminal of first drive transistor DTFT1 when light-emitting device 3 is turned on, i.e., in time period/light-emitting period t3), and the second end of the light emitting control transistor is connected to a light emitting device (Fig. 4A: lower terminal of T4 is connected to light-emitting device 3 when light-emitting device 3 is turned on, i.e., in time period/light-emitting period t3); the sensing circuit at least comprises a sensing control transistor (Fig. 4A: fifth thin film transistor T5), a first end of the sensing control transistor is connected with the photosensitive device (Fig. 4A: left terminal of T5 is connected to photosensitive device 7), a second end of the sensing control transistor is connected to a sensing signal line (Fig. 4A: initialization signal terminal Vint), and the light emitting control transistor and the sensing control transistor are different types of transistors (Fig. 4A: T4 is P-type transistor and T5 is P-type transistor); and in the at least one circuit unit, the light emitting control transistor and the sensing control transistor are connected to a same light emitting signal line (Fig. 4A: second control signal terminal EM2), and the light emitting signal line is configured to provide a light emitting control signal to the pixel driving circuit (Fig. 4A: EM2=0 corresponds to light-emitting period). Regarding claim 3, Yang further teaches the display substrate according to claim 1, wherein the light emitting control transistor at least comprises a light emitting control gate electrode (Fig. 4A: gate of T4), the sensing control transistor at least comprises a sensing control gate electrode (Fig. 4A: gate of T5), the light emitting control gate electrode is directly connected to the light emitting signal line (Fig. 4A: gate of T4 and gate of T5 directly connected to second control signal terminal EM2), and the sensing control gate electrode is connected to the light emitting signal line through a light emitting connection electrode (Fig. 4A: connection electrode corresponding to to second control signal terminal EM2). Regarding claim 7, Yang further teaches the display substrate according to claim 1, wherein the photosensitive device comprises at least a photosensitive first electrode (Fig. 4A: upper electrode of photosensitive device 7), a photosensitive second electrode (Fig. 4A: lower electrode of photosensitive device 7), and a photosensitive layer (Fig. 4A: photosensitive layer associated with PN junction of photosensitive device 7 in view of [0079]) disposed between the photosensitive first electrode and the photosensitive second electrode, the photosensitive first electrode is connected to a sensing power supply line (Fig. 4A ground-level power supply line directly connected to photosensitive device), and the photosensitive second electrode is connected to a first electrode of the sensing control transistor (Fig. 4A: lower electrode of photosensitive device 7 connected to left terminal of T5). Regarding claim 17, Yang further teaches a display apparatus (Abstract), comprising a display substrate according to claim 1. Regarding claim 18, Yang teaches a driving method of a display substrate (Fig. 4A: inherent substrate on which pixel circuits are disposed; Fig. 5: inherent substrate of electroluminescent display panel), which comprises a plurality of circuit units (Fig. 4A: pixel circuit unit), and at least one circuit unit comprises a pixel driving circuit (Fig. 4A: a data writing circuit 1 and a light-emitting drive circuit 2 connectively form a pixel driving circuit), a sensing circuit (Fig. 4A: initialization circuit 4 and photosensitive drive circuit 5 collectively from a sensing circuit) and a photosensitive device (Fig. 4A: photosensitive device 7), wherein the pixel driving circuit at least comprises a driving transistor (Fig. 4A: first drive transistor DTFT1) and at least one light emitting control transistor (Fig. 4A: fourth thin film transistor T4); wherein a first end of the light emitting control transistor (Fig. 4A: upper terminal of T4) is connected to a first power supply line (Fig. 4A: first reference signal terminal VDD), and a second end of the light emitting control transistor (Fig. 4A: lower terminal of T4) is connected to a first end of the driving transistor (Fig. 4A: upper terminal of first drive transistor DTFT1); or the first end of the light emitting control transistor is connected to a second end of the driving transistor (Fig. 4A: upper terminal of T4 is connected to lower terminal of first drive transistor DTFT1 when light-emitting device 3 is turned on, i.e., in time period/light-emitting period t3), and the second end of the light emitting control transistor is connected to a light emitting device (Fig. 4A: lower terminal of T4 is connected to light-emitting device 3 when light-emitting device 3 is turned on, i.e., in time period/light-emitting period t3); the sensing circuit at least comprises a sensing control transistor (Fig. 4A: fifth thin film transistor T5), wherein a first end of the sensing control transistor is connected with the photosensitive device (Fig. 4A: left terminal of T5 is connected to photosensitive device 7), a second end of the sensing control transistor is connected to a sensing signal line (Fig. 4A: initialization signal terminal Vint), and the light emitting control transistor and the sensing control transistor are different types of transistors (Fig. 4A: T4 is P-type transistor and T5 is P-type transistor); in the at least one circuit unit, the light emitting control transistor and the sensing control transistor are connected to a same light emitting signal line (Fig. 4A: second control signal terminal EM2), the light emitting signal line is configured to provide a light emitting control signal to the pixel driving circuit (Fig. 4A: EM2=0 corresponds to light-emitting period); and the driving method comprises following periods: in a first sensing period (Fig. 4B: first period t1 and second period t2), controlling, by the light emitting signal line, the sensing circuit to generate a photosensitive current ([0075]-[0079]); and in a second sensing period (Fig. 4B: third period t3), controlling, by the light emitting signal line, the pixel driving circuit to output a driving current ([0080]-[0081]). Regarding claim 19, Yang teaches the driving method according to claim 18, wherein the controlling, by the light emitting signal line, the sensing circuit to generate a photosensitive current comprises: outputting a first signal (Fig. 4B: EM2=1) by the light emitting signal line, turning off the light emitting control transistor (Fig. 4A: T4 being turned off when EM2=1), turning on the sensing control transistor (Fig. 4A: T5 being turned on when EM2=1), and generating a photosensitive current by the sensing circuit ([0079]: “When the photosensitive device 7 is illuminated by ambient incident light, under the excitation of optical quanta, an electron hole pair is generated on a PN junction of the photosensitive device 7, which makes charges on the PN junction capacitor be recombined, resulting in potential decline of the third node C, and makes the recombined charges be stored at two ends of the second capacitor C2. In this case, the gate voltage of the second drive transistor DTFT2 changes due to a change of the potential of the third node C, which thereby makes the drain current of the second drive transistor DTFT2 changes. At the same time, the third thin film transistor T3 that is turned on provides the drain current of the second drive transistor DTFT2 to the reading signal terminal R for export”). Regarding claim 20, Yang teaches the driving method according to claim 18, wherein the controlling, by the light emitting signal line, the pixel driving circuit to output a driving current comprises: outputting a second signal (Fig. 4B: EM2=0 in period t3) by the light emitting signal line, turning off the sensing control transistor (Fig. 4A: T5 being turned off when EM2=0), turning on the light emitting control transistor (Fig. 4A: T4 being turned on when EM2=0), and outputting a driving current by the pixel driving circuit (Fig. 4A: driving current provided by first drive transistor DTFT1 in light-emitting period t3). Regarding claim 21, Yang teaches a preparation method (Fig. 4A: preparation method for resulting in a display panel including pixel circuits each of which illustrated in the figure) for a display substrate (Fig. 4A: inherent substrate on which pixel circuits are disposed; Fig. 5: inherent substrate of electroluminescent display panel) comprising a plurality of circuit units (Fig. 4A: pixel circuit unit), the method comprising: forming a pixel driving circuit (Fig. 4A: a data writing circuit 1 and a light-emitting drive circuit 2 connectively form a pixel driving circuit), a sensing circuit (Fig. 4A: initialization circuit 4 and photosensitive drive circuit 5 collectively from a sensing circuit) and a photosensitive device (Fig. 4A: photosensitive device 7)in at least one circuit unit; wherein the pixel driving circuit at least comprises a driving transistor (Fig. 4A: first drive transistor DTFT1) and at least one light emitting control transistor (Fig. 4A: fourth thin film transistor T4); wherein a first end of the light emitting control transistor (Fig. 4A: upper terminal of T4) is connected to a first power supply line (Fig. 4A: first reference signal terminal VDD), and a second end of the light emitting control transistor (Fig. 4A: lower terminal of T4) is connected to a first end of the driving transistor (Fig. 4A: upper terminal of first drive transistor DTFT1); or the first end of the light emitting control transistor is connected to a second end of the driving transistor (Fig. 4A: upper terminal of T4 is connected to lower terminal of first drive transistor DTFT1 when light-emitting device 3 is turned on, i.e., in time period/light-emitting period t3), and the second end of the light emitting control transistor is connected to a light emitting device (Fig. 4A: lower terminal of T4 is connected to light-emitting device 3 when light-emitting device 3 is turned on, i.e., in time period/light-emitting period t3); the sensing circuit at least comprises a sensing control transistor (Fig. 4A: fifth thin film transistor T5), wherein a first end of the sensing control transistor is connected with the photosensitive device (Fig. 4A: left terminal of T5 is connected to photosensitive device 7), a second end of the sensing control transistor is connected to a sensing signal line (Fig. 4A: initialization signal terminal Vint), and the light emitting control transistor and the sensing control transistor are different types of transistors (Fig. 4A: T4 is P-type transistor and T5 is P-type transistor); in the at least one circuit unit, the light emitting control transistor and the sensing control transistor are connected to a same light emitting signal line (Fig. 4A: second control signal terminal EM2), the light emitting signal line is configured to provide a light emitting control signal to the pixel driving circuit (Fig. 4A: EM2=0 corresponds to light-emitting period). Allowable Subject Matter Claims 2, 4-6 and 8-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 16 would be allowable if rewritten to overcome the objection(s) set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 2: specific semiconductor materials used for the light emitting control transistor and sensing control transistor; Claim 4: specific arrangement of some electrodes and lines of the display substrate in different conductive layers; Claim 8: specific arrangement of some electrodes and layers on first semiconductor layer and second semiconductor layer Claim 16: inclusion of specifically shaped sensing power supply connection line in the at least one circuit unit Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2021/0335238 by Song et al. teaches in Fig. 4 a pixel unit including a photosensitive element D1, the arrangement of which related to light-emitting element D2 is different from this instant application, however. US 2020/0410918 by Gai et al., teaches in Fig. 6 a pixel unit including a photosensitive element D, the arrangement of which related to light-emitting element L is different from this instant application, however. US 2020/0035151 by Feng et al., teaches in Fig. 4 a pixel unit including a photosensitive element PD, the arrangement of which related to the light-emitting element is different from this instant application, however. US 2015/0220186 by Tan et al., teaches in Fig. 2 a pixel unit including a photosensitive element D2, the arrangement of which related to the light-emitting element D1 is different from this instant application, however. Any inquiry concerning this communication or earlier communications from the examiner should be directed to XUEMEI ZHENG whose telephone number is (571)272-1434. The examiner can normally be reached Monday-Friday: 9:30 pm-6:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin Lee can be reached at 571-272-2963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /XUEMEI ZHENG/Primary Examiner, Art Unit 2629
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Prosecution Timeline

Aug 22, 2024
Application Filed
Jun 11, 2026
Non-Final Rejection mailed — §102 (current)

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+13.9%)
1y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 721 resolved cases by this examiner. Grant probability derived from career allowance rate.

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