Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The disclosure is objected to because of the following informalities:
a. In paragraph [0039] line 7, and [0041] lines 3-4, “second input terminal i” should read -- second input terminal l-- for an appropriate description.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as failing to set forth the subject matter which the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the applicant regards as the invention.
Claims 9 and 13, in each claim, recites the limitation "a differential amplifier" in claim 9 lines 1-2, and claim 13 line 3. It is unclear if the differential amplifier is the same differential amplifier or a separate differential amplifier. Therefore, the claim has an indefinite scope. Furthermore, Claim 10 recites the limitation "The novel differential amplifier" in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claims 13 lines 4-5 recites the limitation “a first terminal of the fourth resistor is connected to the high-level input terminal of the differential amplifier” and claim 14 line 2 recites the limitation “the differential amplifier is an instrumentation amplifier”. It is unclear which differential amplifier the fourth resistor is connected to in claim 13 and which differential amplifier is an instrumentation amplifier. Therefore, the claims have an indefinite scope.
Regarding claims 10-15 and 16 are rejected due to their dependency on the rejected independent claim 9.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 9, 10, and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hurwitz (US 10523166 B2), hereafter referred to as “Hurwitz”.
Regarding claims 9 and 16, in the embodiment of Figs. 7-9, Hurwitz discloses:
A device (the amplifier of Figs. 7-9 would inherently be used on a device as mentioned in column 1 lines 21-25, per claim 16) comprising a differential amplifier with a feedforward bias correction circuit (the amplifier of Fig. 8) comprising a differential amplifier (amplifier 12, shown as a differential amplifier with differential inputs and outputs) and a bias correction circuit (common mode feed forward circuit 120, functions as a bias correction circuit),
the differential amplifier comprising:
an operational amplifier (Fig. 7-9, amplifier 12 functions as an operational amplifier per column lines 52-55),
an input terminal of the bias correction circuit (120 inputs shown in Figs. 8 and 9) is connected to a high-level input terminal (input of 120 is connected to input signal Vin+) and a low-level input terminal of the differential amplifier (120 shown to be connected to input signal Vin-),
an output terminal of the bias correction circuit (120 output) is connected to the operational amplifier (12, as shown in Fig. 8), and
the bias correction circuit dynamically adjusts common-mode voltage output of the differential amplifier based on a voltage at an input terminal of the differential amplifier (column 1, lines 50-55, feed forward path (i.e. feed forward circuit 120) adjusts the common mode output voltage (i.e. VOUTCM), shown in Fig. 9).
Regarding claim 10, in the embodiment of Fig. 7, Hurwitz discloses:
a first resistor (resistor R3),
a second resistor (resistor R1),
a first feedback circuit (feedback with resistor R4), and
a second feedback circuit (feedback with resistor R2), wherein
a first terminal of the first resistor (left of R3) is connected to the high-level input terminal of the differential amplifier (resistor R3 connected to Vin+),
a second terminal of the first resistor (right of R3) is connected to a first input terminal of the operational amplifier (positive input of amplifier 12),
a first terminal of the second resistor (left of R1) is connected to the low-level input terminal of the differential amplifier (resistor R1 connected to Vin-),
a second terminal of the second resistor (right of R1) is connected to a second input terminal of the operational amplifier (negative input of amplifier 12),
a first terminal of the first feedback circuit (left of R4) is connected to the first input terminal of the operational amplifier (left of R4 connected to positive input of amplifier 12),
a first terminal of the second feedback circuit (left of R2) is connected to the second input terminal of the operational amplifier (left of R2 is connected to negative input of amplifier 12),
a second terminal of the first feedback circuit (right of R4) and a second terminal of the second feedback circuit (right of R2) are separately connected to an output terminal of the operational amplifier (output of amplifier 12 Vout- and Vout+, shown connected to R4 and R2, respectively).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Hurwitz (US 10523166 B2) in view of James et al. (US 6201442 B1), hereafter referred to as “Hurwitz” and “James”, respectively.
Regarding claim 11, in the embodiment of Figs. 7-9, Hurwitz discloses:
the bias correction circuit (common mode feed forward circuit 120, functions as a bias correction circuit), the high-level and low-level input terminal of the differential amplifier (input signals Vin+ and Vin-), and an output terminal connected to the operational amplifier (feed forward circuit 120 output is connected to amplifier 12).
However, Hurwitz is silent in teaching a clamping voltage setting circuit, a common-mode voltage regulation circuit, a first terminal of the clamping voltage setting circuit is connected to a reference voltage setting circuit, a second terminal of the clamping voltage setting circuit is connected to a first input terminal of the common-mode voltage regulation circuit, wherein the first and a second input terminal of the common mode voltage regulation circuit is connected to the high-level and low-level input terminals, and the clamping voltage setting circuit is configured to set a clamping voltage of the common-mode voltage regulation circuit.
James teaches:
a clamping voltage setting circuit (Figs. 8a,14a-14c, 16a-16f, examples of the clamp circuit comprising operational amplifier A1 are shown in Figs 16a-16f and utilized in Figs. 8A and 14a-14c), a common-mode voltage regulation circuit (operational amplifier A2, amplifier A2 receives a common mode signal from amplifier A1), a first terminal of the clamping voltage setting circuit is connected to a reference voltage setting circuit (positive input of amplifier A1 of Figs. 8a and Fig. 14a are connected to Vin via RF Input Filter), a second terminal of the clamping voltage setting circuit is connected to a first input terminal of the common-mode voltage regulation circuit (amplifier A1 output is connected to the positive input of amplifier A2), wherein the first and a second input terminal of the common mode voltage regulation circuit is connected to the high-level and low-level input terminals (positive and negative terminals of amplifier A2 are connected to positive and negative voltages V2+ and V2-, as shown in Figs. 8a and 14a-14c), and the clamping voltage setting circuit is configured to set a clamping voltage of the common-mode voltage regulation circuit (Figs. 16a-16f shows alternative methods for clamping the discursion of the intermediate signal by clamping the output of the first Op. Amp (i.e. amplifier A1) per column 6 lines 64-67, wherein amplifier A1 provides a common mode signal to amplifier A2, per column 10 lines 26-33).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the feed forward circuit taught by Hurwitz (Fig. 8) to contain the clamp circuit and common mode circuit as taught by James (Figs. 8a and 14a-14c) to eliminate a possible non-linear and sometimes transient instability, and also to improve recovery from voltage overload (per column 5 lines 42-45), thereby suggesting the obviousness of such a combination.
Allowable Subject Matter
Claims 12-15 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MALANE LIENG whose telephone number is (571)272-5739. The examiner can normally be reached Monday-Friday 6:30 - 4:00 CST.
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/Malane Lieng/ Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/ Supervisory Patent Examiner, Art Unit 2843
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