DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 10/02/2023 and 08/28/2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 8, 11-13 and 23 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by IIDA (WO 2020/121724 A1). Please note that an English Machine Translation version of the document is being used in this Office Action.
Re. claim 1, IIDA discloses a solid-state imaging device including a unit pixel, the unit pixel comprising:
a first photoelectric converter (101) having a first sensitivity; a second photoelectric converter (102) having a second sensitivity lower than the first sensitivity (Fig. 2 and par. [0006], [0052]);
a first capacitive element (107/C10) connected to the first photoelectric converter; and a second capacitive element (111) connected to the second photoelectric converter (Fig. 2 and par. [0031]-[0032]).
Re. claim 8, IIDA also discloses that the second capacitive element (111) includes a MOS capacitance (par. [0031]).
Re. claim 11, further disclosed in IIDA is that the unit pixel includes a switching transistor (FCG/FDG) that switches conversion efficiency (Fig. 2 and par. [0036]-[0039]).
Re. claim 12, IIDA also discloses that the unit pixel further includes a transfer transistor (106) that transfers charge generated by the second photoelectric converter (102) to the second capacitive element between the second photoelectric converter and the second capacitive element (Fig. 2 and par. [0038]).
Re. claim 13, as also seen IIDA, the unit pixel further includes a discharge transistor (103) that transfers a charge overflowing from the first photoelectric converter (101) to the first capacitive element (Fig. 2 and par. [0039]).
Re. claim 23, IIDA discloses all limitations of claim 23 as discussed in claim 1 above. In addition, IIDA discloses an electronic device as a camera in Fig. 32 and paragraph [0175].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9, 10 and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over IIDA in view of Roffet (US 2017/0251153 A1).
Re. claim 9, although IIDA is silent about the first capacitive element includes a MOS capacitance, and the second capacitive element includes a MIM capacitance, such lack of teaching is well known in the art as taught by Roffet in Fig. 3 and paragraph [0057] in which various types of capacitors with vertical electrodes may be used for high dynamic range image sensor, for example, a MOM (metal-oxide-metal) capacitor, a MIM (metal-insulator-metal) capacitor, or a MOS (metal-oxide-semiconductor) capacitor.
Therefore, it would have been obvious to one of ordinary skill in the art to combine the teaching of IIDA and Roffet to obtain the applicant’s claimed invention in obvious configurations or variants without departing from the scope of the invention.
Re. claim 10, the subject matter of this claim is also met by the combined teaching of IIDA and Roffet as both capactive elements would have been MIM capacitance in obvious variants as discussed in claim 9.
Re. claim 14, although IIDA is silent regarding a mode being provided in which unit pixel outputs three or more different signals by a single exposure, this feature is well taught by Roffet. As shown in Fig. 4 in Roffet, the unit pixel outputs four different signals to the column line (CL) in a single exposure period (Tframe), indicated by RD_Ref, RD_L, RD_M and RD_S when the select transistor RD is active high (Figs. 3 & 4 and par. [0072]-[0083]). Therefore, it would have been obvious to one of ordinary skill in the art to further incorporate teachings of Roffet and IIDA to arrive at the applicant’s claimed invention for improvement of the dynamic range of the image sensor that would be capable of detecting blinking light sources with greater reliability than existing sensors as taught by Roffet in paragraph [0012].
Re. claim 15, the combined teaching of IIDA and Roffet also discloses that at least one of the three or more different signals is a signal corresponding to an accumulated charge of the first capacitive element (see Roffet, Figs. 3 & 4 and par. [0072]-[0083], wherein each capacitive element MEM_M, MEM_S and FD outputs one of the four signals, and therefore the claimed limitations are encompassed by the combined teaching).
Re. claim 16, the combination of IIDA and Roffet also discloses a mode of reading a signal of the first photoelectric converter with different conversion efficiency and a mode of outputting a signal corresponding to an accumulated charge of the first capacitive element are provided as the mode (see Roffet, par. [0056]-[0057], [0061]-[0089], wherein different readout modes are selectively performed based on lighting conditions to increase signal dynamic range, and different conversion efficiency is indicated by different conversion gain of the pixel signal).
Allowable Subject Matter
Claims 2-7 and 17-22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Re. claim 2, none of the prior art references of record teaches or suggests: “the first capacitive element includes a diffusion layer capacitance formed of a diffusion layer and a capacitance other than the diffusion layer capacitance, and a magnitude relationship of the capacitances has the following relationship:(the diffusion layer capacitance of the first capacitive element) < (a capacitance other than the diffusion layer capacitance of the first capacitive element) < (a capacitance other than the diffusion layer capacitance of the first capacitive element) < (a capacitance of the second capacitive element).”
Re. claim 3, none of the prior art references of record teaches or suggests: “the first capacitive element includes a diffusion layer capacitance formed of a diffusion layer and a capacitance other than the diffusion layer capacitance, and the capacitance per unit area has the following relationship:(capacitance other than the diffusion layer capacitance of the first capacitive element) < (capacitance of the second capacitive element).”
Re. claim 4, none of the prior art references of record teaches or suggests: “the first capacitive element includes a diffusion layer capacitance formed of a diffusion layer and a capacitance other than the diffusion layer capacitance, and a capacitance other than the diffusion layer capacitance of the first capacitive element and the second capacitive element are arranged in different layers.”
Re. claim 5, none of the prior art references of record teaches or suggests: “the first capacitive element includes a diffusion layer capacitance formed of a diffusion layer and a capacitance other than the diffusion layer capacitance, and a capacitance other than the diffusion layer capacitance of the first capacitive element is configured by a wiring capacitance formed in a plurality of wiring layers.”
Re. claims 6 and 7, these claims are dependent from claim 5.
Re. claim 17, none of the prior art references of record teaches or suggests: “a first mode and a second mode for outputting low illuminance sensitivity with different sensitivities are provided as the mode.”
Re. claim 18, none of the prior art references of record teaches or suggests: “a control section configured to switch between two modes in which three or more different signals are output by single exposure in conjunction with a temperature.”
Re. claim 19, none of the prior art references of record teaches or suggests: “as the mode, a mode is provided for outputting a signal obtained by detecting the charge of the first photoelectric converter with a first conversion efficiency, a signal obtained by detecting the charge of the first photoelectric converter with a second conversion efficiency, a signal corresponding to the accumulated charge of the first capacitive element, and a signal detected by the second photoelectric converter.”
Re. claim 20, none of the prior art references of record teaches or suggests: “as the mode, a mode is provided for outputting a signal obtained by detecting a charge of the first photoelectric converter with a first conversion efficiency, a signal obtained by detecting a charge of the first photoelectric converter with a second conversion efficiency, a signal corresponding to an accumulated charge of only the second photoelectric converter, and a signal corresponding to an accumulated charge including the second capacitive element.”
Re. claim 21, none of the prior art references of record teaches or suggests: “the unit pixel includes: a selection transistor that selects the unit pixel; and a transfer transistor that transfers the charge generated by the second photoelectric converter, the solid-state imaging device further comprises: a first driver circuit that outputs a selection drive signal for controlling the selection transistor; and a second driver circuit that outputs a transfer drive signal for controlling the transfer transistor, and OFF voltages of the selection drive signal and the transfer drive signal are supplied to the first driver circuit and the second driver circuit by common supply wiring.”
Re. claim 22, this claim is dependent from claim 21.
Conclusion
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/NHAN T TRAN/ Primary Examiner, Art Unit 2638
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