Prosecution Insights
Last updated: October 02, 2026
Application No. 18/842,403

Display Substrate, Preparation Method Therefor, and Display Apparatus

Non-Final OA §103§112
Filed
Aug 29, 2024
Priority
Oct 19, 2023 — nonprovisional of PCTCN2023125426
Examiner
NGUYEN, SOPHIA T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE Technology Group Co., Ltd.
OA Round
1 (Non-Final)
45%
Grant Probability
Moderate
1-2
OA Rounds
8m
Est. Remaining
59%
With Interview

Examiner Intelligence

Grants 45% of resolved cases
45%
Career Allowance Rate
236 granted / 528 resolved
-23.3% vs TC avg
Moderate +14% lift
Without
With
+14.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
71 currently pending
Career history
617
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
53.6%
+13.6% vs TC avg
§102
14.6%
-25.4% vs TC avg
§112
26.5%
-13.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 528 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Applicant’s amendment dated 08/9/2024, in which claim 16-18 were amended, claim 20 was added, has been entered. Claim Objections Claims 1, 3-7, 9-14,17, 19 are objected to under 37 CFR 1.75(e) and 37 CFR 1.75(i) as being in improper form because 37 CFR 1.75(e) requires any independent claim should contain in the following order: (1) A preamble comprising a general description of all the elements or steps of the claimed combination which are conventional or known, (2) A phrase such as "wherein the improvement comprises," and (3) Those elements, steps and/or relationships which constitute that portion of the claimed combination which the applicant considers as the new or improved portion. 37 CFR 1.75(i) requires Where a claim sets forth a plurality of elements or steps, each element or step of the claim should be separated by a line indentation. See also MPEP § 608.01(i) and § 608.01(m). Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-18 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 1, claim 1 recites the limitation "the circuit unit" in line 4. There is insufficient antecedent basis for this limitation in the claim. For the purpose of this Action, the above limitation of claim 1 will be interpreted and examined as --the plurality of circuit units— Regarding claim 4, claim 4 recites “the first line segment is connected with the pixel drive circuit in the circuit unit”; “the third line segment is connected with the pixel drive circuit in the circuit unit”; “a second end of the fifth line segment extends to the circuit unit of the (M+2)th unit row and the Nth unit column, and is connected with a first end of a first line segment in the circuit unit”. It is unclear “the circuit unit” in each of the above limitation refers to which circuit unit. It is unclear “a first line segment” in the above limitation is the same or different from “a first line segment” previously recited in the limitation “the at least one of the first data signal line, the second data signal line, the third data signal line, and the fourth data signal line comprises a first line segment, a second line segment, a third line segment, a fourth line segment, and a fifth line segment connected in sequence.” In addition, the limitation is confusing. It is unclear the terms ‘a first line segment, a second line segment, a third line segment, a fourth line segment, and a fifth line segment” in each of claims 4-7 refers to which element in the drawings. “The meaning of every term used in any of the claims should be apparent from the descriptive portion of the specification with clear disclosure as to its import; and in mechanical cases, it should be identified in the descriptive portion of the specification by reference to the drawing, designating the part or parts therein to which the term applies.” MPEP 608.01 (o) “The meaning of every term used in a claim should be apparent from the prior art or from the specification and drawings at the time the application is filed. Claim language may not be "ambiguous, vague, incoherent, opaque, or otherwise unclear in describing and defining the claimed invention." In re Packard, 751 F.3d 1307, 1311, 110 USPQ2d 1785, 1787 (Fed. Cir. 2014)… Until the meaning of a term or phrase used in a claim is clear, a rejection under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph is appropriate.” MPEP 2173.05 (a). Regarding claim 9, claim 9 recites “the data signal line”. There is insufficient antecedent basis for this limitation in the claim. It is unclear “the data signal line” refers to which data signal line. Regarding claims 10-13, claim 10 recites “the circuit unit” in line 10, claim 11 recites “the circuit unit” in lines 10-11, claim 12 recites “the circuit unit” in line 10, claim 13 recites “the circuit unit” in line 10. It is unclear “the circuit unit” in each of the above limitation refers to which circuit unit. Claims depending from the rejected claims noted above are rejected at least on the same basis as the claim(s) from which the dependent claims depend. Appropriated correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 18 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Shang et al. (WO2022267016), hereafter (US Pub. 20240169908) is used as English translation, in view of Choi et al. (US Pub. 20210183900). Regarding claim 1, Shang et al. discloses in Fig. 1-Fig. 3, Fig. 6a, Fig. 13b, Fig. 15a a display substrate, comprising: a drive structure layer [102] disposed on a base substrate [101] and a light emitting structure layer [103] disposed on a side of the drive structure layer [102] away from the base substrate [101], wherein the drive structure layer [102] comprises a plurality of circuit units, the plurality of circuit units at least comprise pixel drive circuits, the light emitting structure layer [103] comprises a plurality of light emitting units, the light emitting units at least comprise anodes [paragraph [0082]-[0083]; the plurality of light emitting units at least comprise a first light emitting unit [P1] emitting red light, a third light emitting unit [P2] emitting blue light, and a second light emitting unit [P3] and a fourth light emitting unit [P4] emitting green light, the first light emitting unit, the second light emitting unit, the third light emitting unit, and the fourth light emitting unit are periodically arranged in a first direction, the first light emitting unit [P1] and the third light emitting unit [P2] are alternately arranged in a second direction, the second light emitting unit [P3] and the fourth light emitting unit [P4] are alternately arranged in the second direction, the first direction and the second direction intersect; the first light emitting unit [P1] at least comprises a first anode, the second light emitting unit [P3] at least comprises a second anode, the third light emitting unit [P2] at least comprises a third anode, and the fourth light emitting unit [P4] at least comprises a fourth anode [paragraph [0087]]; the plurality of circuit units at least comprise a first circuit unit, a second circuit unit, a third circuit unit, and a fourth circuit unit, wherein a pixel drive circuit in the first circuit unit is connected with the first anode, a pixel drive circuit in the second circuit unit is connected with the second anode, a pixel drive circuit in the third circuit unit is connected with the third anode, and a pixel drive circuit in the fourth circuit unit is connected with the fourth anode [Fig. 14a, Fig. 15a]; the drive structure layer [102] further comprises at least a first data signal line, a second data signal line, a third data signal line, and a fourth data signal line, the first data signal line is connected with the pixel drive circuit in the first circuit unit, the second data signal line is connected with the pixel drive circuit in the second circuit unit, the third data signal line is connected with the pixel drive circuit in the third circuit unit, and the fourth data signal line is connected with the pixel drive circuit in the fourth circuit unit [Fig. 3, Fig. 6a]. PNG media_image1.png 458 634 media_image1.png Greyscale PNG media_image2.png 573 596 media_image2.png Greyscale PNG media_image3.png 581 716 media_image3.png Greyscale Shang et al. fails to disclose an orthographic projection of the first data signal line on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode on the base substrate, and/or, an orthographic projection of the third data signal line on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode on the base substrate. Choi et al. discloses in Fig. 2, Fig. 3, Fig. 7, Fig. 8, Fig. 9, Fig. 10, paragraph [0075], [0084], [0124], [0128]-[0131], [0178], [0180], [0215], [0217] an orthographic projection of the first data signal line [DL4i-3] on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode [the second anode [AE2]] on the base substrate, and/or, an orthographic projection of the third data signal line [DL4i-1] on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode on the base substrate [the fourth anode [AE4]]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Choi et al. into the method of Shang et al. to include an orthographic projection of the first data signal line on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode on the base substrate, and/or, an orthographic projection of the third data signal line on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode on the base substrate. The ordinary artisan would have been motivated to modify Shang et al. in the above manner for the purpose of increasing light extraction efficiency of the green light and increasing luminance of the unit pixel [paragraph [0221] of Choi et al.] Regarding claim 18, the combination of Shang et al. and Choi et al. discloses a display apparatus, comprising a display substrate according to claim 1 Regarding claim 19, Shang et al. discloses in Fig. 1-Fig. 3, Fig. 6a, Fig. 13b, Fig. 15a a preparation method of a display substrate, comprising: forming a drive structure layer [102] on a base substrate [101]; wherein the drive structure layer [102] comprises a plurality of circuit units, the circuit units at least comprise pixel drive circuits, the plurality of circuit units comprise at least a first circuit unit, a second circuit unit, a third circuit unit, and a fourth circuit unit; the drive structure layer [102] further at least comprises a first data signal line, a second data signal line, a third data signal line, and a fourth data signal line, the first data signal line is connected with a pixel drive circuit in the first circuit unit, the second data signal line is connected with a pixel drive circuit in the second circuit unit, the third data signal line is connected with a pixel drive circuit in the third circuit unit, and the fourth data signal line is connected with a pixel drive circuit in the fourth circuit unit [Fig. 3, Fig. 6a]; and forming a light emitting structure layer [103] on the drive structure layer [102], wherein the light emitting structure layer [103] comprises a plurality of light emitting units, the light emitting units at least comprise anodes [paragraph [0082]-[0083]]; the plurality of light emitting units comprise at least a first light emitting unit [P1] emitting red light, a third light emitting unit [P2] emitting blue light, and a second light emitting unit [P3] and a fourth light emitting unit [P4] emitting green light, the first light emitting unit, the second light emitting unit, the third light emitting unit, and the fourth light emitting unit are periodically arranged in a first direction, the first light emitting unit [P1] and the third light emitting unit [P2] are alternately arranged in a second direction, the second light emitting unit [P3] and the fourth light emitting unit [P4] are alternately arranged in the second direction, the first direction and the second direction intersect; the first light emitting unit [P1] at least comprises a first anode, the second light emitting unit [P3] at least comprises a second anode, the third light emitting unit [P2] at least comprises a third anode, and the fourth light emitting unit [P4] at least comprises a fourth anode [paragraph [0087]]; and the first anode is connected with the pixel drive circuit in the first circuit unit, the second anode is connected with the pixel drive circuit in the second circuit unit, the third anode is connected with the pixel drive circuit in the third circuit unit, and the fourth anode is connected with the pixel drive circuit in the fourth circuit unit [Fig. 14a, Fig. 15a]. PNG media_image1.png 458 634 media_image1.png Greyscale PNG media_image2.png 573 596 media_image2.png Greyscale PNG media_image3.png 581 716 media_image3.png Greyscale Shang et al. fails to disclose an orthographic projection of the first data signal line on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode on the base substrate, and/or, an orthographic projection of the third data signal line on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode on the base substrate. Choi et al. discloses in Fig. 2, Fig. 3, Fig. 7, Fig. 8, Fig. 9, Fig. 10, paragraph [0075], [0084], [0124], [0128]-[0131], [0178], [0180], [0215], [0217] an orthographic projection of the first data signal line [DL4i-3] on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode [the second anode [AE2]] on the base substrate, and/or, an orthographic projection of the third data signal line [DL4i-1] on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode on the base substrate [the fourth anode [AE4]]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Choi et al. into the method of Shang et al. to include an orthographic projection of the first data signal line on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode on the base substrate, and/or, an orthographic projection of the third data signal line on the base substrate is at least partially overlapped with an orthographic projection of at least one of the second anode and the fourth anode on the base substrate. The ordinary artisan would have been motivated to modify Shang et al. in the above manner for the purpose of increasing light extraction efficiency of the green light and increasing luminance of the unit pixel [paragraph [0221] of Choi et al.] Claims 2-3 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Shang et al. (WO2022267016), hereafter (US Pub. 20240169908) is used as English translation, in view of Choi et al. (US Pub. 20210183900) as applied to claim 1 above and further in view of Inna et al. (US Pub. 20080094530) and Kawasaki et al. (US Pub. 20070229554). Regarding claims 2-3, and 8, Shang et al. fails to disclose wherein at least one of the first data signal line, the second data signal line, the third data signal line, and the fourth data signal line is in a shape of a character "S"; wherein the at least one of the first data signal line, the second data signal line, the third data signal line and the fourth data signal line is connected with a pixel drive circuit in a following connection mode: being connected with a pixel drive circuit in a circuit unit of an Mth unit row and an Nth unit column, being connected with a pixel drive circuit in a circuit unit of an (M+1)th unit row and an (N+2)th unit column, being connected with a pixel drive circuit in a circuit unit of an (M+2)th unit row and an Nth unit column, and being connected with a pixel drive circuit in a circuit unit of an (M+3)th unit row and an (N+2)th unit column; and M and N are positive integers greater than or equal to 1; wherein at least one of the first data signal line, the second data signal line, the third data signal line, and the fourth data signal line has a dendritic shape. Ina et al. discloses in Fig. 1, Fig. 8, paragraph [0063]-[0065] wherein at least one of the first data signal line, the second data signal line, the third data signal line, and the fourth data signal line is in a shape of a character "S"; wherein the at least one of the first data signal line, the second data signal line, the third data signal line and the fourth data signal line is connected with a pixel drive circuit in a following connection mode: being connected with a pixel drive circuit in a circuit unit of an Mth unit row and an Nth unit column, being connected with a pixel drive circuit in a circuit unit of an (M+1)th unit row and an (N+2)th unit column, being connected with a pixel drive circuit in a circuit unit of an (M+2)th unit row and an Nth unit column, and being connected with a pixel drive circuit in a circuit unit of an (M+3)th unit row and an (N+2)th unit column; and M and N are positive integers greater than or equal to 1; wherein at least one of the first data signal line, the second data signal line, the third data signal line, and the fourth data signal line has a dendritic shape. For further support, Kawasaki et al. is cited. Kawasaki discloses in Fig. 6, paragraph [0007]-[0008] wherein at least one of the first data signal line, the second data signal line, the third data signal line, and the fourth data signal line is in a shape of a character "S"; wherein the at least one of the first data signal line, the second data signal line, the third data signal line and the fourth data signal line is connected with a pixel drive circuit in a following connection mode: being connected with a pixel drive circuit in a circuit unit of an Mth unit row and an Nth unit column, being connected with a pixel drive circuit in a circuit unit of an (M+1)th unit row and an (N+2)th unit column, being connected with a pixel drive circuit in a circuit unit of an (M+2)th unit row and an Nth unit column, and being connected with a pixel drive circuit in a circuit unit of an (M+3)th unit row and an (N+2)th unit column; and M and N are positive integers greater than or equal to 1; wherein at least one of the first data signal line, the second data signal line, the third data signal line, and the fourth data signal line has a dendritic shape. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Ina et al. and Kawasaki into the method of Shang et al. to include wherein at least one of the first data signal line, the second data signal line, the third data signal line, and the fourth data signal line is in a shape of a character "S"; wherein the at least one of the first data signal line, the second data signal line, the third data signal line and the fourth data signal line is connected with a pixel drive circuit in a following connection mode: being connected with a pixel drive circuit in a circuit unit of an Mth unit row and an Nth unit column, being connected with a pixel drive circuit in a circuit unit of an (M+1)th unit row and an (N+2)th unit column, being connected with a pixel drive circuit in a circuit unit of an (M+2)th unit row and an Nth unit column, and being connected with a pixel drive circuit in a circuit unit of an (M+3)th unit row and an (N+2)th unit column; and M and N are positive integers greater than or equal to 1; wherein at least one of the first data signal line, the second data signal line, the third data signal line, and the fourth data signal line has a dendritic shape. The ordinary artisan would have been motivated to modify Shang et al. in the above manner for the purpose of providing suitable pixel arrangement for improving definition and providing suitable shape of data signal lines to connect pixels of the same color to each other by one signal line [paragraph [0007], [0011] of Kawasaki, paragraph [0061]-[0062] of Ina et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOPHIA T NGUYEN whose telephone number is (571)272-1686. The examiner can normally be reached 9:00am -5:00 pm, Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, BRITT D HANLEY can be reached at (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SOPHIA T NGUYEN/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Aug 29, 2024
Application Filed
Sep 01, 2026
Non-Final Rejection mailed — §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
45%
Grant Probability
59%
With Interview (+14.4%)
2y 9m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 528 resolved cases by this examiner. Grant probability derived from career allowance rate.

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