Prosecution Insights
Last updated: July 17, 2026
Application No. 18/843,445

OVERCURRENT PROTECTION APPARATUS AND PROTECTION METHOD FOR T-TYPE THREE-LEVEL INVERTER

Non-Final OA §102§Other
Filed
Sep 03, 2024
Priority
Mar 03, 2022 — CN 202210201802.3 +1 more
Examiner
LAXTON, GARY L
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Solax Power Network Technology (Zhejiang) Co. Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
957 granted / 1107 resolved
+18.4% vs TC avg
Moderate +6% lift
Without
With
+5.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
20 currently pending
Career history
1127
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
50.2%
+10.2% vs TC avg
§102
13.3%
-26.7% vs TC avg
§112
11.5%
-28.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1107 resolved cases

Office Action

§102 §Other
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Inventorship This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Information Disclosure Statement The information disclosure statement (IDS) submitted on 4/22/2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1 is/are rejected under 35 U.S.C. 102a1/a2 as being anticipated by Zhen et al. (CN103944148 – IDS). Zhen et al. disclose a protection method for a T-type three-level inverter, which is used for overcurrent protection, and discloses (see description, paragraphs [0045]-[0098], and figures 1-8): a T-type three- level inverter, a controller 21, and a detection circuit 23, wherein the controller 21 outputs control signals to drive switch transistors, the detection circuit 23 is connected to an output end of the inverter, the detection circuit 23 is connected to the detection circuit 23, and the controller 21 is connected to the switch transistors, which comprise switch transistors T1 and T4 on a vertical bridge and switch transistors T2 and T3 on a horizontal bridge. The controller 21 acquires, from the detection circuit, a current output by the T-type three-level inverter, wherein if the current output by the inverter is greater than a first threshold, the controller stops outputting control signals to the switch transistors on the vertical bridge in the T-type three-level inverter, and after a first preset duration from the time the controller stops outputting control signals to the switch transistors on the vertical bridge in the T-type three-level inverter, the controller stops outputting control signals to the switch transistors on the horizontal bridge in the T-type three-level inverter, the control signals being used to control the switch transistors in the T-type three-level inverter. Allowable Subject Matter Claims 2-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Prior art fails to disclose or fairly suggest, inter alia, the AC side current detection unit is connected to the overcurrent determination unit, the overcurrent determination unit is connected to the delay unit and an I01 port of the DSP unit, the delay unit is connected to an I02 port of the DSP unit; the DSP unit is connected to the switch tube driver unit; the AC side current detection unit is configured to detect an AC side current of the T-type three- level inverter circuit in real time; the overcurrent determination unit is configured to determine whether the T-type three-level inverter circuit has overcurrent and output the overcurrent signal; the delay unit is used to perform the delay process to the overcurrent signal and then output the overcurrent delay signal; the DSP unit is configured to receive the overcurrent signal and the overcurrent delay signal and transmit a corresponding instruction to the switch tube driver unit according to the overcurrent signal and the overcurrent delay signal; the switch tube driver unit controls the turn-off the vertical transistors and the horizontal transistors of the T-type three-level inverter circuit according to the instruction of the DSP unit. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. 6995994 Bijlenga et al. disclose a converter and method for controlling. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GARY L LAXTON whose telephone number is (571)272-2079. The examiner can normally be reached Monday-Friday, 8 am-4 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal Hammond can be reached at 571-270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GARY L LAXTON/Primary Examiner, Art Unit 2838 5/29/2026
Read full office action

Prosecution Timeline

Sep 03, 2024
Application Filed
Jun 03, 2026
Non-Final Rejection mailed — §102, §Other (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
92%
With Interview (+5.6%)
2y 2m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1107 resolved cases by this examiner. Grant probability derived from career allowance rate.

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