Prosecution Insights
Last updated: August 17, 2026
Application No. 18/843,835

ELECTRIC POWER STEERING DEVICE

Final Rejection §103
Filed
Sep 04, 2024
Priority
Apr 26, 2022 — nonprovisional of PCTJP2022018808
Examiner
CHANG, MINKI
Art Unit
2834
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mitsubishi Electric Corporation
OA Round
2 (Final)
72%
Grant Probability
Favorable
3-4
OA Rounds
9m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
288 granted / 401 resolved
+3.8% vs TC avg
Moderate +10% lift
Without
With
+10.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
44 currently pending
Career history
443
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
52.8%
+12.8% vs TC avg
§102
25.6%
-14.4% vs TC avg
§112
18.7%
-21.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 401 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 07/10/2026 have been fully considered but they are not persuasive. Applicant argues “Although the Office Action does not explicitly specify the exact boundaries of the alleged “concave portion,” it appears that the Examiner may consider the vertical wall of the frame (28) located to the right of the switching element (311U) in FIG. 2 as part of a “concave portion” that encloses the elements. However, even if this is the Examiner's interpretation, such an interpretation is structurally incorrect and fails to meet the claim limitation. As clearly shown in FIG. 2 of Urimoto, the vertical wall of the frame (28) is located only at the lateral side (radial direction) of the switching elements (311U, 34U) and the current-detecting element (33U). In contrast, the specific surface of the frame (28) that actually faces (opposes) the bottom surface of the elements is completely flat and horizontal. The surface directly opposing the elements is merely the flat, horizontal bottom floor of the frame (28), which completely lacks any individual holes, recesses, or concave profiles tailored to the elements. Therefore, there is absolutely no concave profile formed at the position of the heatsink facing the current-detecting element (33U) in Urimoto.” Examiner disagrees. First, the concave portion is labelled below for clarity. The concave portion has two walls on the radially outer side of the switching devices 34U and 311U, and the frame’s bottom surface is concaved from the axially upper portion of the frame, which is not “merely flat, horizontal bottom floor.” The concave portion of the frame 28 is facing the current-detecting element in the switching devices as seen below. PNG media_image1.png 310 542 media_image1.png Greyscale Also, the claim does not require the concave portion to be tailored to the element, merely that the concave portion has to accommodate and face the element. Thus, the argument is not persuasive. Applicant argues “Furthermore, the claim language describes a specific structural relationship where "a concave portion in which the current-detecting element is accommodated" is provided. A reasonable interpretation of this phrase dictates a targeted, local configuration where the concave portion is dimensioned and dedicated to receive the thickness/shape of the current-detecting element itself to achieve axial thinning. In Urimoto, the large horizontal space inside the frame (28) is an architectural chamber designed to encompass the entire inverter circuit (3a, 3b) and multiple heavy components. Regardless of the broad room inside the frame (28) where various components are distributed, such a broad layout space is structurally distinct from the specific "concave portion" recited in present Claim 1. Interpreting the large component-layout floor of the cited reference as the claimed "concave portion for accommodating the current-detecting element" does not align with the clear technical context and purpose of the present invention.” Examiner disagrees. Merriam-Webster defines accommodate as “to make room for, to hold without crowding or inconvenience.” Urimoto in FIG. 2 discloses a concave portion as discussed above, and the concave portion accommodates the element by also accommodating the entire inverter circuit. The Applicant’s definition of accommodate is overly narrow in stating that it dictates “a targeted, local configuration where the concave portion is dimensioned and dedicated to receiving the thickness/shape of the current-detecting element itself to achieve axial thinning.” If the Applicant desires to claim such a structure, the Applicant should claim such a structure explicitly. Thus, the argument is not persuasive. Applicant argues “In Urimoto, FIG. 2 shows a gap between the board 4 on which the alleged current-detecting elements 33U are placed. … there is no disclosure of a board 4 disposed on a surface of the heatsink.” Examiner disagrees. Urimoto in ¶ [0064] discloses that the switching devices of the circuit board are attached on the surface of the frame, which would dispose the circuit board on the surface of the heatsink. Thus, the argument is not persuasive. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-2 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Urimoto et al. (US 2019/0016371 A1) in view of Endo et al. (US 2020/0251966 A1). Regarding claim 1, Urimoto discloses an electric power steering device (¶ [0024]) comprising: a motor (2); a heatsink (28; ¶ [0057] frame functions as heat sink) in which a bearing (29a) configured to rotatably support a rotary shaft (21) of the motor (2) is provided; and a circuit board (4), on which an inverter circuit (3a, 3b) configured to drive the motor (2) is provided, disposed on a surface of the heatsink (28) opposite to the motor (2; FIG. 2), wherein a heat generating element (3a, 3b; ¶ [0064]) that constitutes the inverter circuit (3a, 3b) is disposed in a projection region (area with circuits) of the circuit board (4) on which an outer shape of the heatsink (28) is projected when seen in an axial direction of the rotary shaft (21; FIG. 2), and the heat generating element (3a, 3b) comprises a current-detecting element (33U) provided on a surface of the circuit board (FIG. 2; inverter circuit facing the frame 28) facing the heatsink, and a concave portion in which the current-detecting element (33U) is accommodated is formed at a position of the heatsink (28) facing the current-detecting element (33U; FIG. 2; inverter 3a, 3b is in the concave portion of the frame 28). Urimoto does not explicitly disclose the inverter circuit is configured to be driven by a first voltage of 20 V or more. Endo discloses the inverter circuit (410, 420) is configured to be driven by a first voltage of 20 V or more (¶ [0041]). It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to have modified Urimoto in view of Endo to disclose the inverter circuit is configured to be driven by a first voltage of 20 V or more, as disclosed in Endo, choosing an operating voltage of an inverter to be 20 V or more is a simple substitution for one of ordinary skill in the art. Regarding claim 2/1, Urimoto in view of Endo was discussed above in claim 1. Endo further discloses the circuit board (CB1, CB2) is provided with: a step-down circuit (311, 321) configured to generate a second voltage lower than the first voltage from the first voltage supplied from the outside (¶ [0074], [0076]); and a control circuit (314, 324) driven at the second voltage generated in the step-down circuit (311, 321) and configured to control the inverter circuit (FIG. 5). Regarding claim 5/1, Urimoto in view of Endo was discussed above in claim 1. Urimoto further discloses a plurality of the inverter circuits (3a, 3b) are provided on the circuit board (4), and each of the plurality of inverter circuits (3a, 3b) drives the motor (2, 201, 202). Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Urimoto et al. (US 2019/0016371 A1) in view of Endo et al. (US 2020/0251966 A1) as applied to claim 1 above, and further in view of Kosaka et al. (US 2020/0163245 A1). Regarding claim 3/1, Urimoto in view of Endo was discussed above in claim 1. Urimoto in view of Endo does not disclose the circuit board is provided with a voltage-boosting circuit configured to generate the first voltage from a second voltage supplied from the outside and lower than the first voltage, and the inverter circuit is driven at the first voltage generated by the voltage-boosting circuit. Kosaka discloses the circuit board is provided with a voltage-boosting circuit configured to generate the first voltage from a second voltage supplied from the outside and lower than the first voltage, and the inverter circuit is driven at the first voltage generated by the voltage-boosting circuit (¶ [0020]-[0021], [0023]). It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to have modified Urimoto in view of Endo, further in view of Kosaka to disclose the circuit board is provided with a voltage-boosting circuit configured to generate the first voltage from a second voltage supplied from the outside and lower than the first voltage, and the inverter circuit is driven at the first voltage generated by the voltage-boosting circuit, for the advantages of allowing DC power to be converted to AC power. Regarding claim 4/3, Urimoto in view of Endo and Kosaka was discussed above in claim 3. Urimoto further discloses wherein the circuit board (4) is provided with a control circuit (4a, 4b) configured to control the inverter circuit (3a, 3b; FIG. 1), and the control circuit (4a, 4b) is driven at the second voltage supplied from the outside (battery 9). Urimoto discloses in FIG. 1 a separate power input from the battery 9 through ignition switch 7. The voltage booster of Kosaka would be implemented between the battery 9 and the inverters 3a and 3b, while the control circuits 4a and 4b is connected directly to the battery 9. Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Urimoto et al. (US 2019/0016371 A1) in view of Endo et al. (US 2020/0251966 A1) as applied to claim 1 above, and further in view of Shimakawa (US 2018/0331012 A1). Regarding claim 7/1, Urimoto in view of Endo was discussed above in claim 1. Urimoto in view of Endo does not disclose a thermal-via for radiation is disposed around the heat generating element in the circuit board. Shimakawa discloses a thermal-via (250) for radiation is disposed around the heat generating element (D) in the circuit board (FIG. 26). It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to have modified Urimoto in view of Endo, further in view of Shimakawa to disclose a thermal-via for radiation is disposed around the heat generating element in the circuit board, for the advantages of increased heat transfers through the thermal vias to increase circuit board efficiency. Regarding claim 8/1, Urimoto in view of Endo was discussed above in claim 1. Urimoto in view of Endo does not disclose a copper inlay is disposed in the circuit board at a position between the heat generating element and the heatsink in the axial direction. Shimakawa discloses a copper inlay (311) is disposed in the circuit board (300) at a position between the heat generating element (D) and the heatsink (1000). Modifying Urimoto to incorporate the copper inlay of Shimakawa would place the copper inlay between the circuit board and the heatsink in the axial direction. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to have modified Urimoto in view of Endo, further in view of Shimakawa to disclose a copper inlay is disposed in the circuit board at a position between the heat generating element and the heatsink in the axial direction, for the advantages of increased heat transfers through the thermal vias to increase circuit board efficiency. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MINKI CHANG whose telephone number is (571)270-0521. The examiner can normally be reached 9:00 AM - 5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Seye Iwarere can be reached at (571) 270-5112. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MINKI CHANG/Examiner, Art Unit 2834 /OLUSEYE IWARERE/Supervisory Patent Examiner, Art Unit 2834
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Prosecution Timeline

Sep 04, 2024
Application Filed
Apr 20, 2026
Non-Final Rejection mailed — §103
Jul 10, 2026
Response Filed
Aug 06, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
72%
Grant Probability
82%
With Interview (+10.3%)
2y 8m (~9m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 401 resolved cases by this examiner. Grant probability derived from career allowance rate.

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